Microchip Technology AT24CM01-XHM-B
- Part No.:
- AT24CM01-XHM-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24CM01-XHM-B.pdf
- Description:
- IC EEPROM 1MBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24CM01-XHM-B from Microchip Technology is a 1-Mbit I²C-compatible serial EEPROM organized as 131,072 × 8 bits, operating from 1.7V to 5.5V with industrial temperature range (−40°C to +85°C), Fast Mode Plus support up to 1 MHz at ≥2.5V, and hardware write protection via dedicated WP pin - deployed in embedded control modules for firmware parameter storage.
For engineers reviewing the AT24CM01-XHM-B datasheet, AT24CM01-XHM-B pinout, AT24CM01-XHM-B application, or AT24CM01-XHM-B equivalent, key selection criteria include voltage flexibility (1.7–5.5V), page-write capability (256-byte pages), ultra-low standby current (≤6 µA), built-in error detection/correction, and compatibility with multi-device I²C bus topologies using A1/A2 address inputs.
Technical Context
The AT24CM01-XHM-B implements a two-wire I²C slave interface with Schmitt-triggered, noise-filtered SDA/SCL inputs and open-drain SDA output requiring external pull-up. It supports Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) timing modes with strict AC parameters including tLOW ≤500 ns and tBUF ≤500 ns under FM+ conditions.
Internally, it features a 512-page × 256-byte memory array with hardware address decoding via A1/A2 pins, full-array write protection via WP pin, and on-chip high-voltage generation for EEPROM programming. Power-on reset (POR) ensures reliable initialization with tPUP = 100 µs and VPOR = 1.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Mbit (131,072 × 8), enabling storage of large configuration sets or calibration data in space-constrained systems. |
| Supply Voltage Range | 1.7V to 5.5V - supports direct interfacing with 1.8V, 2.5V, 3.3V, and 5V microcontrollers without level shifters. |
| I²C Speed Modes | 100 kHz (Std), 400 kHz (Fast), 1 MHz (FM+) - FM+ enables faster firmware updates in production test environments. |
| Write Cycle Time | ≤5 ms max - guarantees deterministic timeout handling in real-time systems during nonvolatile writes. |
| Endurance & Retention | 1,000,000 write cycles / 100-year data retention at 55°C - validated for long-life industrial deployments. |
| Standby Current | ≤6 µA at VCC = 5.5V - critical for battery-powered IoT nodes requiring years of operation between charges. |
| Operating Temperature | −40°C to +85°C - qualified for automotive body electronics, industrial PLCs, and outdoor metering equipment. |
Pinout & Package
AT24CM01-XHM-B is packaged in an 8-lead SOIC (Small Outline Integrated Circuit) with standard 150-mil width, RoHS-compliant lead-free finish, and marked per Microchip's product identification system (XHM-B denotes SOIC package, industrial temp, Pb-free).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: NC | No-connect terminal | Unused silicon pad; must be left floating or tied to GND - no electrical function or internal connection. |
| 2: A1 | Hardware device address input | Configures LSB of 3-bit slave address (1010xxR/W); pulled down internally if unconnected - requires explicit tie-high/low for multi-drop bus design. |
| 3: A2 | Hardware device address input | Configures MSB of 3-bit slave address (1010xxR/W); enables up to four AT24CM01 devices on one I²C bus. |
| 4: GND | Power ground reference | Return path for VCC and all I/O; must be low-impedance connection to system ground plane to ensure noise immunity. |
| 5: SDA | Serial data bidirectional I/O | Open-drain output/input; requires external pull-up resistor (≤10 kΩ); supports wire-OR with other I²C slaves. |
| 6: SCL | Serial clock input | Master-generated clock; latches input data on rising edge, outputs data on falling edge; filtered for EMI resilience. |
| 7: WP | Write-protect control input | Active-high hardware lock: tied to VCC disables all writes to entire memory array - prevents accidental corruption during power transitions. |
| 8: VCC | Device power supply | Single-supply input powering logic and EEPROM core; slew rate limited to ≤0.1 V/µs for robust POR behavior. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in error detection and correction | Prevents silent data corruption during read operations - essential for safety-critical configuration storage in medical or industrial controllers. |
| 256-byte page write mode | Enables burst programming of up to 256 bytes per write cycle, reducing total programming time by >90% vs. byte-wise writes. |
| Schmitt-triggered, filtered inputs | Rejects fast transients and bus noise up to 100 ns spikes - improves reliability in electrically noisy factory-floor environments. |
| Ultra-low active current (≤3 mA) | Minimizes power budget impact during active reads/writes - allows co-location with low-power MCUs without thermal derating. |
| Green packaging (RoHS/halide-free) | Complies with global environmental regulations and eliminates halogenated flame retardants in PCB assembly processes. |
Applications
| Industrial Sensor Calibration | Smart Meter Firmware Storage |
|---|---|
|
Use Scenario: Storing factory-calibrated sensor coefficients and linearization tables in temperature/humidity sensors deployed in HVAC systems. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding trim values accessed at boot; retains data across 10+ year field life. Use Value: Eliminates need for external calibration EEPROM or MCU flash wear-leveling - reduces BOM count and firmware complexity. |
Use Scenario: Holding tariff schedules, billing history, and communication protocol stacks in utility smart meters with 15-year service life. IC Role / Device Role / Timing Role: Secure, tamper-resistant memory for revenue-critical data; WP pin prevents unauthorized firmware modification. Use Value: Meets ANSI C12.22 and DLMS/COSEM security requirements via hardware write lock and 1Mbit capacity for encrypted logs. |
| Automotive Body Control Module | Medical Infusion Pump Settings |
|
Use Scenario: Saving user preferences (seat position, mirror angle, lighting profiles) in automotive BCMs subjected to wide thermal cycling. IC Role / Device Role / Timing Role: Persistent parameter store accessed over I²C by 32-bit ARM-based BCM MCU during startup and runtime. Use Value: −40°C to +85°C rating and 100-year retention ensure settings survive vehicle lifetime without degradation or refresh. |
Use Scenario: Archiving drug library metadata, dose limits, and audit trails in Class II infusion pumps requiring FDA 21 CFR Part 11 compliance. IC Role / Device Role / Timing Role: Tamper-evident configuration vault; write-protection enforced during delivery to prevent runtime parameter override. Use Value: Built-in error correction ensures integrity of life-critical dosage parameters - avoids undetected bit flips in long-term storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C1024-SSHD-T | Same 1-Mbit density but only supports up to 400 kHz I²C; lacks Fast Mode Plus (1 MHz) and has higher standby current (10 µA). | Targeted at cost-sensitive consumer electronics where speed and ultra-low power are secondary. | Select when FM+ is unnecessary and legacy 400 kHz bus timing suffices; verify WP pin behavior matches design intent. |
| M95M01-RDW6TP/K | 1-Mbit SPI EEPROM (not I²C); supports 10 MHz SPI clock; no A1/A2 addressing; different pinout (SO8, but SCK/MOSI/MISO/CS instead of SCL/SDA). | Used where existing MCU SPI peripherals are preferred over I²C, or where higher throughput justifies interface change. | Only viable if redesigning PCB layout and firmware driver stack; not drop-in compatible due to protocol and pin mismatch. |
Compared with AT24C1024-SSHD-T, the AT24CM01-XHM-B delivers faster field-upgrade capability and lower power in always-on systems; versus M95M01-RDW6TP/K, it preserves I²C bus simplicity and multi-slave addressing but trades off peak throughput for protocol compatibility.
Availability
AT24CM01-XHM-B is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, automotive body control modules, and medical infusion pump settings requiring stable component supply across extended product lifecycles.
Supply support for AT24CM01-XHM-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with ISO 9001-certified manufacturing and global distribution.
The AT24CM01-XHM-B belongs to Microchip's AT24C-series serial EEPROM product line, designed specifically for robust, low-voltage, multi-vendor I²C bus interoperability in industrial and automotive applications.
FAQ
What is the maximum I²C clock frequency supported by the AT24CM01-XHM-B?
The AT24CM01-XHM-B supports 100 kHz (Standard Mode), 400 kHz (Fast Mode), and 1 MHz (Fast Mode Plus). FM+ operation requires VCC ≥ 2.5V and meets tLOW ≤500 ns and tBUF ≤500 ns timing constraints. This enables faster firmware updates than legacy EEPROMs while maintaining backward compatibility with existing I²C masters.
Does the AT24CM01-XHM-B require external pull-up resistors on SDA and SCL lines?
Yes - the AT24CM01-XHM-B has open-drain SDA and input-only SCL pins. External pull-up resistors (≤10 kΩ recommended) are mandatory on both lines to establish valid logic-high levels and ensure proper I²C bus arbitration. Pull-up value must be selected based on bus capacitance and target clock speed per I²C specification.
How does the Write-Protect (WP) pin function on the AT24CM01-XHM-B?
When WP is driven high (to VCC), the AT24CM01-XHM-B inhibits all write operations to its entire memory array - preventing accidental overwrites during power transitions or software faults. If left floating, WP is internally pulled down to GND, enabling normal writes. Microchip recommends hardwiring WP to a known state for deterministic behavior.
What is the memory organization of the AT24CM01-XHM-B?
The AT24CM01-XHM-B organizes its 1-Mbit capacity as 131,072 words × 8 bits, segmented into 512 pages of 256 bytes each. This structure enables efficient page-write operations and supports both random and sequential read modes. Addressing uses a 17-bit word address transmitted across two 8-bit bytes after the device address.
Is the AT24CM01-XHM-B compatible with other AT24C-series EEPROMs on the same I²C bus?
Yes - the AT24CM01-XHM-B uses the standard I²C device type identifier '1010' and supports hardware address inputs A1/A2, allowing up to four AT24CM01 devices or mixed AT24Cxxx devices (e.g., AT24C512, AT24C256) on one bus, provided their 3-bit slave addresses do not conflict.
AT24CM01-XHM-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24CM01-XHM-B FAQ
1.How can I place an order for AT24CM01-XHM-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24CM01-XHM-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24CM01-XHM-B reliable?
The price and inventory of AT24CM01-XHM-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24CM01-XHM-B is usually 5 days.
3.What payment methods are accepted for AT24CM01-XHM-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24CM01-XHM-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24CM01-XHM-B?
AT24CM01-XHM-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24CM01-XHM-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24CM01-XHM-B?
For technical support, including AT24CM01-XHM-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24CM01-XHM-B requirements.
6.How does Aetrix verify that AT24CM01-XHM-B is sourced from the original manufacturer or authorized distributors?
All AT24CM01-XHM-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24CM01-XHM-B meets industry standards.
7.What is the process for return or replacement of AT24CM01-XHM-B?
All AT24CM01-XHM-B units undergo pre-shipment inspection (PSI). If there is an issue with AT24CM01-XHM-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24CM01-XHM-B part is unused and in its original packaging.
Return procedure for AT24CM01-XHM-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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