Microchip Technology AT24CM02-U1UM0B-T
- Part No.:
- AT24CM02-U1UM0B-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-XFBGA, WLCSP
- Datasheet:
-
AT24CM02-U1UM0B-T.pdf
- Description:
- IC EEPROM 2MBIT I2C 1MHZ 8WLCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24CM02-U1UM0B-T from Microchip Technology is a 2-Mbit I²C-compatible serial EEPROM organized as 262,144 × 8 bits, operating from 1.7V to 5.5V with industrial temperature range (−40°C to +85°C), 1 MHz Fast Mode Plus support, and hardware write protection via WP pin - used for nonvolatile parameter storage in embedded controllers, power management units, and sensor calibration modules.
For engineers reviewing the AT24CM02-U1UM0B-T datasheet, AT24CM02-U1UM0B-T pinout, AT24CM02-U1UM0B-T application, or AT24CM02-U1UM0B-T equivalent, key selection criteria include voltage flexibility (1.7–5.5V), page-write capability (256-byte pages), ultra-low standby current (≤3 µA), built-in error detection, and dual-package availability (SOIC-8/WLCSP-8) for space-constrained designs.
Technical Context
The AT24CM02-U1UM0B-T implements a two-wire I²C interface with Schmitt-triggered, noise-filtered SDA/SCL inputs and supports Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) clock rates depending on VCC level. It uses an internal high-voltage generation circuit for EEPROM programming and includes a Power-on Reset (POR) circuit with 100 µs tPUP delay before command acceptance.
Memory is organized into 1,024 pages of 256 bytes each, enabling efficient partial-page writes and sequential reads. Device addressing uses a fixed 4-bit type code (1010b), one hardware address bit (A2), two MSB address bits (A17/A16), and R/W bit - allowing up to two devices per bus when A2 is hardwired.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 Mbit (262,144 × 8), sufficient for firmware configuration, calibration data, and device identity storage in resource-limited systems. |
| Interface | I²C-compatible two-wire (SCL/SDA), open-drain with external pull-ups - enables shared-bus multi-device topology without additional logic. |
| Supply voltage | 1.7V to 5.5V (low-voltage grade), supports direct interfacing with 1.8V, 2.5V, 3.3V, and 5V microcontrollers without level shifters. |
| Write speed | Page write (256 bytes) completes in ≤10 ms; self-timed operation eliminates need for host polling or timeout management. |
| Endurance & retention | 1,000,000 write cycles and 100-year data retention at 55°C - validated for long-life industrial deployments requiring infrequent but reliable updates. |
| Power consumption | Active current ≤3 mA (5V, 1 MHz), standby current ≤3 µA - extends battery life in always-on IoT edge nodes and portable instrumentation. |
| Protection | Hardware write-protect (WP pin) disables all writes when pulled high; prevents accidental overwrites during power transients or firmware faults. |
Pinout & Package
AT24CM02-U1UM0B-T is supplied in an 8-ball WLCSP (Wafer-Level Chip Scale Package) with 0.4 mm pitch, footprint of 2.0 mm × 1.6 mm, and bottom-side solder balls - optimized for ultra-compact PCB layouts in wearables, medical sensors, and miniaturized power modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A2 | Device address input | Hardwired to GND or VCC to select one of two possible I²C addresses (1010xxx0/1); floating state defaults to GND via strong internal pull-down. |
| GND | Ground reference | System ground return path for VCC and signal integrity; must be low-impedance connection to minimize noise coupling into SDA/SCL. |
| SDA | Serial data bidirectional I/O | Open-drain output/input requiring external pull-up (≤10 kΩ); supports wire-OR with other I²C devices on same bus. |
| SCL | Serial clock input | Input-only clock line; must be pulled high externally or driven actively; timing-critical for data latching (rising edge) and output (falling edge). |
| WP | Write-protect control | Active-high hardware lock: tied to VCC to disable all writes; tied to GND for normal operation; internal pull-down ensures safe default state. |
| VCC | Power supply | Single-supply input (1.7–5.5V); monotonically ramped at ≤0.1 V/µs to ensure proper POR behavior and avoid spurious writes. |
Key Features
| Feature | Design Value |
|---|---|
| Fast Mode Plus support | 1 MHz I²C operation at VCC ≥2.5V enables faster configuration loading vs. legacy 400 kHz EEPROMs - reduces boot time in real-time systems. |
| Built-in error detection | Detects and flags memory corruption during read/write; prevents silent data failure in safety-critical applications like power supply sequencing or sensor offset storage. |
| Schmitt-trigger inputs | Filters noise on SCL/SDA lines without external RC networks - improves robustness in electrically noisy environments (e.g., motor drives, industrial PLCs). |
| 256-byte page write | Allows partial-page writes (1–256 bytes per cycle), minimizing write latency when updating small parameter sets without erasing full pages. |
| Green packaging | RoHS-compliant, halide-free, lead-free WLCSP meets environmental compliance requirements for global electronics manufacturing and end-of-life recycling. |
Applications
| Industrial Sensor Calibration | Power Supply Configuration |
|---|---|
Use Scenario: Storing factory-trimmed gain/offset coefficients and temperature compensation tables in MEMS pressure sensors and RTD interfaces. IC Role / Device Role / Timing Role: Nonvolatile parameter storage IC providing persistent, byte-addressable access during cold start and runtime recalibration. Use Value: Enables single-pass calibration at production test; eliminates need for external OTP or flash programming infrastructure. | Use Scenario: Holding digital setpoints, fault thresholds, and startup sequencing delays in digitally controlled DC-DC modules and AC-DC adapters. IC Role / Device Role / Timing Role: Configuration register backup device synchronized to I²C host during power-up initialization and dynamic reconfiguration. Use Value: Guarantees consistent output voltage/current behavior across power cycles without host MCU firmware reload dependency. |
| Embedded Controller Identity | IoT Edge Node Settings |
Use Scenario: Storing unique MAC addresses, serial numbers, and cryptographic keys in networked microcontroller-based gateways and HMI panels. IC Role / Device Role / Timing Role: Secure identity storage element with hardware write-protection (WP) preventing unauthorized key overwrite. Use Value: Supports secure boot chain and device attestation by preserving immutable identifiers across firmware updates and field service events. | Use Scenario: Retaining Wi-Fi credentials, OTA update status flags, and sensor sampling intervals in battery-powered environmental monitors and asset trackers. IC Role / Device Role / Timing Role: Low-power configuration manager interfacing directly with ultra-low-power MCUs (e.g., ARM Cortex-M0+) in sleep mode. Use Value: Achieves <3 µA standby draw while maintaining network readiness - extends coin-cell battery life beyond 5 years in typical deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C256B-SSHL-T | 1.8–5.5V only; max 400 kHz I²C; SOIC-8 only; no FM+ support; 256 Kbit capacity. | Lacks 1 MHz operation and 1.7V support - unsuitable for 1.8V-only or high-speed configuration loads. | Select when cost sensitivity outweighs speed/voltage flexibility and 256 Kbit capacity suffices. |
| BR24G256FJ-WE2 | Rohm part; 1.7–5.5V; supports 1 MHz; 256 Kbit; WLCSP-8 available; no built-in error detection. | Half the density and missing ECC - requires external validation logic for mission-critical data integrity. | Choose for footprint compatibility where lower density and absence of error correction are acceptable. |
Compared with AT24C256B-SSHL-T and BR24G256FJ-WE2, the AT24CM02-U1UM0B-T delivers double density, 1 MHz I²C, 1.7V operation, and integrated error detection - making it optimal for next-generation compact, low-power, and high-reliability embedded systems where parameter integrity and boot speed are critical.
Availability
AT24CM02-U1UM0B-T is available at Aetrix Electronics and suitable for industrial sensor calibration, power supply configuration, embedded controller identity, and IoT edge node settings requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for AT24CM02-U1UM0B-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog components, and memory solutions, with a focus on reliability, longevity, and industrial-grade qualification.
The AT24CM02-U1UM0B-T belongs to Microchip's AT24Cxx family of I²C EEPROMs, designed specifically for robust, low-voltage, high-density nonvolatile storage in space-constrained and power-sensitive embedded systems.
FAQ
What is the maximum I²C clock frequency supported by the AT24CM02-U1UM0B-T?
The AT24CM02-U1UM0B-T supports up to 1 MHz Fast Mode Plus operation when VCC is 2.5V or higher. At 1.7–2.4V, it operates in Fast Mode (400 kHz) or Standard Mode (100 kHz). This graded speed support allows designers to maximize throughput without compromising low-voltage functionality in mixed-supply systems.
Does the AT24CM02-U1UM0B-T require external pull-up resistors on SDA and SCL lines?
Yes, the AT24CM02-U1UM0B-T requires external pull-up resistors on both SDA and SCL lines because its SDA pin is open-drain and SCL is an input-only pin. Microchip specifies maximum values of 10 kΩ for SDA and recommends matching pull-up strength to bus capacitance and target I²C speed - e.g., ≤1.3 kΩ for 1 MHz operation.
How does the write-protect (WP) pin function on the AT24CM02-U1UM0B-T?
On the AT24CM02-U1UM0B-T, the WP pin is active-high: when pulled to VCC, it disables all write operations to the entire memory array; when pulled to GND, normal writes are enabled. If left floating, the internal strong pull-down defaults WP to GND - but Microchip recommends hardwiring WP to avoid noise-induced glitches.
What is the endurance rating and data retention specification for the AT24CM02-U1UM0B-T?
The AT24CM02-U1UM0B-T is rated for 1,000,000 write cycles per memory location and guarantees 100 years of data retention at 55°C. These specifications are validated per JEDEC standards and apply across the full industrial temperature range (−40°C to +85°C), ensuring long-term reliability in unattended equipment.
Is the AT24CM02-U1UM0B-T compatible with standard I²C protocol stacks and drivers?
Yes, the AT24CM02-U1UM0B-T is fully compliant with the NXP I²C-bus specification, supporting standard Start/Stop conditions, ACK/NACK handshaking, 7-bit addressing with R/W bit, and repeated Start sequences. It interoperates with common MCU I²C peripherals (e.g., STM32, PIC, ESP32) without custom driver modifications.
AT24CM02-U1UM0B-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-XFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WLCSP
AT24CM02-U1UM0B-T FAQ
1.How can I place an order for AT24CM02-U1UM0B-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24CM02-U1UM0B-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24CM02-U1UM0B-T reliable?
The price and inventory of AT24CM02-U1UM0B-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24CM02-U1UM0B-T is usually 5 days.
3.What payment methods are accepted for AT24CM02-U1UM0B-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24CM02-U1UM0B-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24CM02-U1UM0B-T?
AT24CM02-U1UM0B-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24CM02-U1UM0B-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24CM02-U1UM0B-T?
For technical support, including AT24CM02-U1UM0B-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24CM02-U1UM0B-T requirements.
6.How does Aetrix verify that AT24CM02-U1UM0B-T is sourced from the original manufacturer or authorized distributors?
All AT24CM02-U1UM0B-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24CM02-U1UM0B-T meets industry standards.
7.What is the process for return or replacement of AT24CM02-U1UM0B-T?
All AT24CM02-U1UM0B-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24CM02-U1UM0B-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24CM02-U1UM0B-T part is unused and in its original packaging.
Return procedure for AT24CM02-U1UM0B-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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