Microchip Technology AT24HC02BN-SH-T
- Part No.:
- AT24HC02BN-SH-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24HC02BN-SH-T.pdf
- Description:
- IC EEPROM 2KBIT I2C 1MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,165
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24HC02BN-SH-T from Microchip Technology is an I²C-compatible automotive-grade serial EEPROM with 2-Kbit (256 × 8) memory organization, operating across 2.5V–5.5V supply and qualified to AEC-Q100 Grade 1 (−40°C to +125°C). It features hardware write protection via WP pin, 16-byte page write capability, and ultra-low standby current (≤18 μA at 5.0V), deployed in infotainment control modules for nonvolatile configuration storage.
For engineers reviewing the AT24HC02BN-SH-T datasheet, AT24HC02BN-SH-T pinout, AT24HC02BN-SH-T application, or AT24HC02BN-SH-T equivalent, key selection criteria include I²C fast-mode timing compliance (400 kHz), guaranteed write endurance (1,000,000 cycles), data retention (100 years), and SOIC-8 packaging with automotive temperature qualification.
Technical Context
The AT24HC02BN-SH-T implements a two-wire I²C slave interface with Schmitt-triggered, noise-filtered SDA/SCL inputs and open-drain bidirectional data transfer. Its internal address decoder supports up to four devices on one bus using A1/A2 pins, and its hardware write-protection logic disables writes to upper half of memory when WP = VCC.
Memory is organized as 256 words × 8 bits, mapped into 16 pages of 16 bytes each. Write operations use self-timed internal programming with ≤5 ms completion, and read modes include current-address, random, and sequential access-all compliant with I²C standard- and fast-mode timing requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2-Kbit (256 × 8), enabling compact firmware parameter storage without external address latches |
| Supply Voltage | 2.5V to 5.5V - supports direct interfacing with 3.3V and 5V microcontrollers in automotive ECUs |
| Operating Temp | −40°C to +125°C (AEC-Q100 Grade 1) - validated for under-hood and dashboard module deployment |
| I²C Speed | Up to 400 kHz Fast mode - enables rapid configuration loading during boot without bus contention delays |
| Write Endurance | 1,000,000 cycles - sustains daily calibration updates over 10+ years of vehicle service life |
| Data Retention | 100 years at 55°C - ensures infotainment settings persist across full vehicle lifecycle without refresh |
| Standby Current | ≤18 μA at 5.0V - minimizes parasitic drain in always-on vehicle networks |
| Page Write Size | 16 bytes per cycle - reduces I²C transaction count when updating multi-byte configuration blocks |
Pinout & Package
AT24HC02BN-SH-T is supplied in an 8-lead SOIC package (body width 3.9 mm), RoHS-compliant and halide-free, with gull-wing leads suitable for automated surface-mount assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NC) | No Connect | Unbonded die pad - must remain floating; no PCB trace or pull-up/pull-down required |
| 2 (A1) | Hardware Address Input | Configures LSB of device address (1010A2A1R/W); pulled down internally if unconnected |
| 3 (A2) | Hardware Address Input | Configures MSB of device address (1010A2A1R/W); enables up to four devices on same I²C bus |
| 4 (GND) | Ground Reference | System return path for VCC and I/O; requires low-impedance connection to PCB ground plane |
| 5 (SDA) | Serial Data I/O | Open-drain bidirectional line - requires external 1.3 kΩ pull-up for 400 kHz operation |
| 6 (SCL) | Serial Clock Input | Master-generated clock; rising edge latches input, falling edge outputs data - filtered for EMI immunity |
| 7 (WP) | Write-Protect Control | High = lock upper half (1K) of memory; low = full write access; internal pull-down if floating |
| 8 (VCC) | Power Supply | 2.5V–5.5V input; must ramp monotonically at ≤0.1 V/µs with ≥100 µs stabilization before first command |
Key Features
| Feature | Design Value |
|---|---|
| Automotive Qualification | AEC-Q100 Grade 1 certified - eliminates need for additional reliability validation in Tier 1 ECU designs |
| Hardware Write Protection | WP pin disables writes to upper 1K-bit memory segment - prevents accidental corruption of critical calibration data |
| Noise-Resilient Interface | Schmitt-trigger inputs + spike suppression filters - maintains I²C communication integrity in high-EMI engine bay environments |
| Low-Power Operation | 3 mA max active current and 18 μA max standby current - extends battery runtime in always-on telematics modules |
| Page Write Efficiency | 16-byte burst writes reduce I²C overhead by 87% vs. byte-by-byte writes for 16-byte parameter sets |
| Green Packaging | Lead-free, halide-free SOIC - satisfies automotive OEM substance restrictions (e.g., ELV, IMDS) |
Applications
| Infotainment System Settings Storage | Body Control Module (BCM) Configuration |
|---|---|
Use Scenario: Storing user preferences (volume, EQ, display brightness) and radio station presets across power cycles in automotive head units. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via I²C during boot and runtime by MCU firmware. Use Value: Guarantees settings persistence for 100 years at 55°C, eliminating reconfiguration after battery disconnect or long-term storage. | Use Scenario: Holding door lock logic states, window auto-up/down thresholds, and mirror position offsets in BCM firmware. IC Role / Device Role / Timing Role: I²C slave EEPROM providing persistent parameter storage with hardware write protection against firmware update errors. Use Value: WP pin isolates critical safety-related parameters (e.g., anti-pinch limits) from accidental overwrite during OTA updates. |
| Engine Control Unit (ECU) Calibration Data | Advanced Driver Assistance Systems (ADAS) Sensor Trim |
Use Scenario: Retaining fuel injection timing maps, idle air control values, and OBD-II trouble code history in gasoline/diesel ECUs. IC Role / Device Role / Timing Role: Automotive-grade serial EEPROM interfaced to ECU's main MCU for field-updatable calibration tables. Use Value: 1,000,000 write cycles support daily recalibration during vehicle testing and dealer service without wear-out risk. | Use Scenario: Storing camera lens distortion coefficients and radar antenna phase trim values in ADAS domain controllers. IC Role / Device Role / Timing Role: Temperature-stable nonvolatile memory accessed during sensor initialization to apply factory-trimmed compensation data. Use Value: −40°C to +125°C operation ensures reliable trim data retrieval during cold-start and high-load thermal conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C02D-SSHM-T | Same 2-Kbit capacity, I²C interface, and SOIC-8 package; rated for industrial temp (−40°C to +85°C), not AEC-Q100 qualified | Lacks automotive qualification - unsuitable for under-hood or safety-critical modules requiring Grade 1 validation | Select only for cost-sensitive non-automotive applications where extended temperature range is unnecessary |
| M95256-DFMN6TP | 256-Kbit SPI EEPROM in SOIC-8; higher density but different interface (SPI vs. I²C), no WP pin, 5.5V max VCC | Requires MCU SPI peripheral and custom driver; no hardware write protection; incompatible with existing I²C firmware stack | Choose only when migrating to SPI architecture and needing >2-Kbit capacity; not drop-in compatible |
Compared with AT24C02D-SSHM-T, the AT24HC02BN-SH-T delivers verified automotive qualification and extended temperature margin; versus M95256-DFMN6TP, it preserves I²C compatibility and hardware write protection at lower density-critical for legacy automotive firmware reuse and functional safety partitioning.
Availability
AT24HC02BN-SH-T is available at Aetrix Electronics and suitable for automotive infotainment systems, body control modules, and engine management units requiring stable component supply with guaranteed AEC-Q100 compliance and long-term production continuity.
Supply support for AT24HC02BN-SH-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with ISO/TS 16949-certified automotive manufacturing processes.
The AT24HC02BN-SH-T belongs to Microchip's automotive-qualified serial EEPROM product line, designed specifically for robust, low-power nonvolatile data storage in harsh-temperature automotive subsystems.
FAQ
What is the maximum I²C clock frequency supported by the AT24HC02BN-SH-T?
The AT24HC02BN-SH-T supports I²C Fast mode up to 400 kHz, with AC timing parameters including tLOW ≥ 1200 ns and tHIGH ≥ 600 ns. This allows high-speed configuration reads during system boot while maintaining noise immunity via integrated Schmitt triggers and input filtering-critical for reliable operation in electrically noisy automotive environments. The AT24HC02BN-SH-T does not support High-Speed mode (3.4 MHz).
How does the write-protect (WP) pin function on the AT24HC02BN-SH-T?
When the WP pin of the AT24HC02BN-SH-T is driven high (VCC), writes to the upper half (1K-bit) of memory are inhibited, protecting critical calibration or safety parameters. When WP is low (GND), full memory access is enabled. If left floating, the pin is internally pulled down to GND-however, Microchip recommends hard-wiring WP to a defined state to prevent capacitive coupling-induced glitches in automotive applications.
Is the AT24HC02BN-SH-T pin-compatible with other Microchip 2-Kbit I²C EEPROMs like the AT24C02?
Yes, the AT24HC02BN-SH-T shares identical 8-lead SOIC pinout, device addressing (1010A2A1R/W), and I²C protocol with AT24C02 variants. However, the AT24HC02BN-SH-T adds AEC-Q100 Grade 1 qualification, extended temperature range (−40°C to +125°C), and tighter DC/AC specs-making it a direct replacement where automotive reliability is required, without PCB layout changes.
What is the typical write cycle time for the AT24HC02BN-SH-T during page write operations?
The AT24HC02BN-SH-T completes internal write cycles in ≤5 ms, regardless of byte or page write mode. During this time, the device does not acknowledge I²C commands and SDA remains high. Host firmware must implement acknowledge polling or fixed-delay waits before initiating subsequent operations-ensuring data integrity in safety-critical automotive logging applications where the AT24HC02BN-SH-T is deployed.
Does the AT24HC02BN-SH-T require external pull-up resistors on SDA and SCL lines?
Yes, the AT24HC02BN-SH-T requires external pull-up resistors on both SDA and SCL lines due to its open-drain I/O architecture. For 400 kHz Fast mode operation, Microchip specifies a 1.3 kΩ pull-up to VCC on SDA; SCL may be driven actively or pulled up similarly. These resistors ensure proper signal rise times (tR ≤ 300 ns) and bus arbitration-essential for deterministic timing in real-time automotive networks using the AT24HC02BN-SH-T.
AT24HC02BN-SH-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24HC02BN-SH-T FAQ
1.How can I place an order for AT24HC02BN-SH-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24HC02BN-SH-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24HC02BN-SH-T reliable?
The price and inventory of AT24HC02BN-SH-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24HC02BN-SH-T is usually 5 days.
3.What payment methods are accepted for AT24HC02BN-SH-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24HC02BN-SH-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24HC02BN-SH-T?
AT24HC02BN-SH-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24HC02BN-SH-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24HC02BN-SH-T?
For technical support, including AT24HC02BN-SH-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24HC02BN-SH-T requirements.
6.How does Aetrix verify that AT24HC02BN-SH-T is sourced from the original manufacturer or authorized distributors?
All AT24HC02BN-SH-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24HC02BN-SH-T meets industry standards.
7.What is the process for return or replacement of AT24HC02BN-SH-T?
All AT24HC02BN-SH-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24HC02BN-SH-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24HC02BN-SH-T part is unused and in its original packaging.
Return procedure for AT24HC02BN-SH-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24HC02BN-SH-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
