Microchip Technology AT24MAC402-MAHM-T
- Part No.:
- AT24MAC402-MAHM-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
AT24MAC402-MAHM-T.pdf
- Description:
- IC EEPROM 2KBIT I2C 1MHZ 8UDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24MAC402-MAHM-T from Microchip Technology (formerly Atmel) is a 2-Kbit I²C-compatible serial EEPROM with factory-programmed EUI-48™ MAC address and guaranteed unique 128-bit serial number, operating from 1.7V to 5.5V, supporting 400kHz (1.7V) and 1MHz (2.5V/5.0V) bus speeds, and featuring hardware write protection via WP pin for full-array data integrity in embedded networking nodes.
For engineers reviewing the AT24MAC402-MAHM-T datasheet, AT24MAC402-MAHM-T pinout, AT24MAC402-MAHM-T application, or AT24MAC402-MAHM-T equivalent, this page delivers verified electrical specs, validated pin functions, confirmed EUI-48 and serial number access protocols, real-world write protection behavior, and precise package mapping for SOIC-8 implementation.
Technical Context
The AT24MAC402-MAHM-T implements a two-wire I²C interface with Schmitt-triggered, noise-filtered SDA/SCL inputs and supports bi-directional data transfer with ACK/NACK protocol. Its memory is organized as 256 × 8 bits (2K), split into 16 pages of 16 bytes each, with standard array (00h–7Fh) and extended read-only block (80h–FFh) containing EUI-48 and 128-bit serial number.
It integrates three independent write protection mechanisms: hardware-based full-array protection via WP pin, permanent software write protection (PSWP) for first-half memory (00h–7Fh), and reversible software write protection (RSWP) - though RSWP is not supported in the SOIC-8 package due to A0–A2 pin availability enabling full address decoding.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 Kbit (256 × 8), fully usable standard array plus dedicated extended memory block |
| Interface | I²C-compatible 2-wire serial; supports 400 kHz @ 1.7V and 1 MHz @ 2.5V/5.0V |
| Voltage Range | 1.7V to 5.5V VCC - enables direct integration with 1.8V, 3.3V, and 5V microcontrollers |
| Write Endurance | 1,000,000 cycles - validated at 25°C, page mode, 3.3V; ensures long-term field reliability |
| Data Retention | 100 years - guaranteed retention under recommended operating conditions (−40°C to +85°C) |
| EUI Address | Factory-programmed, permanently locked 48-bit EUI-48™ stored in read-only extended memory (9Ah–9Fh) |
| Serial Number | Guaranteed unique 128-bit serial number, Atmel-programmed and read-only, located at 80h–8Fh |
Pinout & Package
AT24MAC402-MAHM-T is supplied in an 8-lead JEDEC-standard SOIC package (MAHM = SOIC-8). Pin functions are electrically validated per Atmel-8807E datasheet Figure 1 and Section 5.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A2 | Device Address Inputs | Hard-wired address bits enabling up to eight devices on one I²C bus; decoded during device address match (1010xxxR/W) |
| SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up; carries address, data, and ACK/NACK signals |
| SCL | Serial Clock Input | Positive-edge clock for data input, negative-edge for data output; defines I²C timing compliance |
| WP | Hardware Write Protect | Active-high pin: tied to VCC disables all writes (read-only mode); tied to GND enables full read/write capability |
| GND | Ground Reference | Signal and power return path; required for noise suppression and proper Schmitt trigger operation |
| VCC | Power Supply | 1.7V–5.5V supply input; powers internal high-voltage pump for EEPROM write operations |
Key Features
| Feature | Design Value |
|---|---|
| EUI-48™ MAC Address | Factory-programmed, globally unique 48-bit IEEE identifier stored in dedicated read-only memory (9Ah–9Fh), eliminating need for external MAC storage or host-side generation |
| 128-bit Serial Number | Atmel-guaranteed unique serial number across AT24CS/AT93CS/AT25S families, stored read-only at 80h–8Fh, enabling secure device identification and traceability |
| Multi-layer Write Protection | Combines hardware (WP pin), permanent software (PSWP), and reversible software (RSWP) modes - PSWP and WP active simultaneously lock first-half and full array respectively |
| Noise-Resilient Interface | Schmitt-triggered, filtered SDA/SCL inputs suppress EMI-induced glitches, ensuring reliable I²C communication in industrial environments |
| Page Write Capability | 16-byte page writes reduce bus overhead vs. byte writes; partial page writes allowed; self-timed 5ms max write cycle eliminates host timing dependency |
Applications
| Network Node Identity | Secure Device Authentication |
|---|---|
|
Use Scenario: Ethernet/Wi-Fi-enabled IoT sensor node requiring unique network identity without host MCU intervention. IC Role / Device Role / Timing Role: Provides immutable EUI-48 address directly readable over I²C at boot, eliminating firmware MAC assignment logic. Use Value: Reduces BOM count and firmware complexity; guarantees IEEE-compliant uniqueness across production batches. |
Use Scenario: Industrial gateway validating firmware authenticity before boot using cryptographic keys bound to hardware identity. IC Role / Device Role / Timing Role: Supplies cryptographically tied 128-bit serial number as root-of-trust seed for key derivation and certificate binding. Use Value: Enables hardware-rooted authentication without external secure element; leverages Atmel's cross-family serial number uniqueness guarantee. |
| Configuration Storage | Calibration Data Archiving |
|
Use Scenario: Programmable logic controller storing user-defined I/O mapping and scaling parameters across power cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration store with hardware write protect (WP pin) preventing accidental overwrite during field updates. Use Value: Ensures parameter persistence and system stability; WP pin allows safe in-system programming only when intentionally grounded. |
Use Scenario: Medical diagnostic equipment recording sensor calibration coefficients and date stamps after factory calibration. IC Role / Device Role / Timing Role: High-endurance (1M cycles) EEPROM storing time-critical calibration data with permanent software write protection post-calibration. Use Value: Prevents post-calibration tampering while retaining full read access; PSWP locks first-half memory where coefficients reside. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM with MAC address applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24MAC402-SSHM-T | Same die, identical EUI-48 and serial number features, but in 8-lead TSSOP package (SSHM); 3.0mm × 3.0mm footprint vs. SOIC-8's 4.9mm × 3.9mm | TSSOP variant better suited for space-constrained PCBs; same pinout and electrical behavior; no change to I²C timing or protection logic | Select AT24MAC402-SSHM-T when board area is constrained and reflow compatibility with fine-pitch components is required. |
| AT24MAC602-MAHM-T | Same SOIC-8 package and pinout, but provides factory-programmed 64-bit EUI-64™ (not EUI-48); extended memory includes 8-byte EUI instead of 6-byte; same 128-bit serial number | Required for IPv6 autoconfiguration, Zigbee PRO, or Bluetooth LE where EUI-64 is mandated; no software conversion needed unlike EUI-48-to-EUI-64 encapsulation | Choose AT24MAC602-MAHM-T when EUI-64 native support is mandatory and no post-read bit manipulation can be tolerated. |
Compared with AT24MAC402-SSHM-T, the AT24MAC402-MAHM-T offers identical functionality in a larger SOIC-8 footprint ideal for manual assembly or legacy layouts; versus AT24MAC602-MAHM-T, it delivers EUI-48 natively - avoiding runtime conversion - at the cost of IPv6/EUI-64 protocol readiness.
Availability
AT24MAC402-MAHM-T is available at Aetrix Electronics and suitable for industrial gateways, medical diagnostics, automotive telematics, and smart metering applications requiring stable component supply, guaranteed EUI uniqueness, and long-term data retention.
Supply support for AT24MAC402-MAHM-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product continuity, quality control, and technical documentation for the AT24MAC family.
The AT24MAC402-MAHM-T belongs to Microchip's MAC-address-enabled serial EEPROM product line, designed specifically to simplify IEEE-compliant device identity management in resource-constrained embedded systems.
FAQ
What is the exact memory organization of the AT24MAC402-MAHM-T?
The AT24MAC402-MAHM-T contains 2048 bits organized as 256 words of 8 bits each (00h–FFh), with the standard array occupying 00h–7Fh (first-half) and extended memory at 80h–FFh. The extended block holds the 48-bit EUI-48™ address (9Ah–9Fh) and 128-bit serial number (80h–8Fh), both read-only and factory-programmed. This layout preserves full 2K usability for user data.
How does the WP pin affect write operations on the AT24MAC402-MAHM-T?
When the WP pin of the AT24MAC402-MAHM-T is tied to VCC, all write operations to the entire memory array (00h–FFh) are inhibited - reads remain functional. When WP is grounded or floating, write access depends on software protection status. The AT24MAC402-MAHM-T datasheet confirms WP overrides PSWP/RSWP: even if software protection is disabled, WP=VCC blocks all writes.
Can the EUI-48™ address in the AT24MAC402-MAHM-T be rewritten or customized?
No. The EUI-48™ address in the AT24MAC402-MAHM-T is factory-programmed by Microchip, permanently locked, and stored in a dedicated read-only memory region outside the main array. It cannot be altered, erased, or reprogrammed in-system or at any stage post-manufacture. Custom OUI programming must be arranged pre-production via Microchip's special order services.
What is the difference between permanent and reversible software write protection on the AT24MAC402-MAHM-T?
Permanent Software Write Protection (PSWP) on the AT24MAC402-MAHM-T locks the first-half memory (00h–7Fh) irreversibly - once enabled, it cannot be cleared, even after power cycling. Reversible Software Write Protection (RSWP) also protects 00h–7Fh but can be disabled via a specific command sequence. However, RSWP is not supported on the SOIC-8 package (MAHM) due to A0–A2 pin availability requirements per datasheet Section 11.
Does the AT24MAC402-MAHM-T support standard I²C addressing and ACK polling?
Yes. The AT24MAC402-MAHM-T uses standard 7-bit I²C addressing: '1010' (Ah) prefix for main memory access and '1011' (Bh) for extended memory (EUI/serial number). It fully supports ACK polling - after a write, hosts can issue repeated Start + device address (R/W=0) until the device responds with ACK, confirming write completion without fixed delay timing.
AT24MAC402-MAHM-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UDFN (2x3)
AT24MAC402-MAHM-T FAQ
1.How can I place an order for AT24MAC402-MAHM-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24MAC402-MAHM-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24MAC402-MAHM-T reliable?
The price and inventory of AT24MAC402-MAHM-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24MAC402-MAHM-T is usually 5 days.
3.What payment methods are accepted for AT24MAC402-MAHM-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24MAC402-MAHM-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24MAC402-MAHM-T?
AT24MAC402-MAHM-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24MAC402-MAHM-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24MAC402-MAHM-T?
For technical support, including AT24MAC402-MAHM-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24MAC402-MAHM-T requirements.
6.How does Aetrix verify that AT24MAC402-MAHM-T is sourced from the original manufacturer or authorized distributors?
All AT24MAC402-MAHM-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24MAC402-MAHM-T meets industry standards.
7.What is the process for return or replacement of AT24MAC402-MAHM-T?
All AT24MAC402-MAHM-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24MAC402-MAHM-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24MAC402-MAHM-T part is unused and in its original packaging.
Return procedure for AT24MAC402-MAHM-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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