Microchip Technology AT24MAC602-MAHM-T
- Part No.:
- AT24MAC602-MAHM-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
AT24MAC602-MAHM-T.pdf
- Description:
- IC EEPROM 2KBIT I2C 1MHZ 8UDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24MAC602-MAHM-T from Microchip Technology (formerly Atmel) is a 2-Kbit I²C-compatible serial EEPROM with factory-programmed, permanently locked EUI-64™ address and guaranteed unique 128-bit serial number. It operates from 1.7V to 5.5V, supports 1 MHz I²C at 2.5V/5.0V, and features hardware write protection via WP pin and reversible software write protection for the first-half of memory. Used in networked embedded systems requiring globally unique device identity and tamper-resistant identification.
For engineers reviewing the AT24MAC602-MAHM-T datasheet, AT24MAC602-MAHM-T pinout, AT24MAC602-MAHM-T application, or AT24MAC602-MAHM-T equivalent, key selection considerations include EUI-64 address persistence, dual-layer write protection (hardware + reversible software), extended memory block architecture, 1.7V low-voltage operation, and SOIC-8 package compatibility with industrial temperature range (–40°C to +85°C).
Technical Context
The AT24MAC602-MAHM-T implements a dedicated I²C slave interface with Schmitt-trigger, noise-filtered inputs and bidirectional open-drain SDA. Its memory map separates standard 256 × 8-bit EEPROM (00h–FFh) from an extended read-only block containing the 64-bit EUI address (98h–9Fh) and 128-bit serial number (80h–8Fh), ensuring full 2K array availability for user data.
Write protection is implemented at three levels: hardware (WP pin → full-array lock), reversible software (RSWP register → first-half lock, configurable via A0/A1/A2 control codes), and permanent software (PSWP register → irreversible first-half lock). All protection modes coexist and are validated during command decode, with priority given to hardware WP when asserted.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 Kbit (256 × 8), organized as 16 pages × 16 bytes - enables efficient page-write optimization in firmware. |
| Interface | I²C-compatible 2-wire bus - supports standard and fast-mode speeds up to 1 MHz at ≥2.5V, reducing MCU GPIO count and PCB routing complexity. |
| EUI Address | Factory-programmed, read-only 64-bit EUI-64 - stored in dedicated extended memory (98h–9Fh), guarantees global uniqueness without post-read manipulation. |
| Serial Number | 128-bit factory-programmed, permanently locked serial number (80h–8Fh) - compatible across AT24CS/AT93CS/AT25S families for unified device tracking. |
| Write Protection | Hardware WP pin + reversible software RSWP register - allows dynamic first-half lock/unlock during field updates while preserving full-array read access. |
| Endurance & Retention | 1,000,000 write cycles / 100 years data retention - validated at 25°C, 3.3V, page mode - suitable for infrequent but mission-critical configuration storage. |
| Supply Voltage | 1.7V to 5.5V - supports direct interfacing with 1.8V, 2.5V, 3.3V, and 5V logic domains without level shifters. |
Pinout & Package
AT24MAC602-MAHM-T is packaged in an 8-lead JEDEC-standard SOIC (Small Outline Integrated Circuit) with 1.27 mm pitch, RoHS-compliant and halide-free. The package supports reflow soldering and is rated for industrial temperature operation (–40°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Hard-wired device address inputs | Set static I²C slave address bits; allow up to eight devices on same bus; tied internally in SOIC package per datasheet Figure 1. |
| SDA | Serial Data I/O | Bidirectional open-drain line - requires external pull-up; supports wire-OR with other I²C peripherals; handles ACK/NACK timing per spec. |
| SCL | Serial Clock Input | Positive-edge clock input - synchronizes all data transfers; filtered and Schmitt-triggered for robust noise immunity in noisy environments. |
| WP | Hardware Write Protect | Active-high enable: VCC = full-array write inhibit; GND/floating = enables software-controlled protection modes - critical for secure boot or calibration lock. |
| GND | Ground Reference | Primary return path for VCC and signal currents - must be low-impedance connection to avoid I²C timing violations or write errors. |
| VCC | Power Supply | 1.7V–5.5V supply input - powers internal high-voltage pump for EEPROM writes; decoupling capacitor (0.1 µF) required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| EUI-64™ Address Storage | Dedicated 8-byte read-only block (98h–9Fh) eliminates need for application-level EUI-48-to-EUI-64 conversion - reduces firmware overhead and validation risk. |
| 128-bit Unique Serial Number | Guaranteed unique across AT24CS/AT93CS/AT25S families - enables traceability, anti-cloning, and secure provisioning in production and field service. |
| Reversible Software Write Protection | First-half (00h–7Fh) lock/unlock via A0/A1/A2 control codes (62h/66h) - supports safe field updates of non-critical parameters without risking core configuration. |
| Low-Voltage Operation | 1.7V minimum VCC - enables direct integration into battery-powered or energy-harvesting nodes without voltage boosting circuitry. |
| Page Write Capability | 16-byte atomic page writes - improves write efficiency over byte-by-byte methods and reduces total programming time in configuration storage routines. |
Applications
| Network Interface Cards (NICs) | Industrial IoT Edge Gateways |
|---|---|
Use Scenario: Storing MAC address and device-specific credentials in Ethernet/Wi-Fi modules for IEEE 802.3/802.11 compliance and zero-touch provisioning. IC Role / Device Role / Timing Role: Nonvolatile identity storage IC providing persistent EUI-64 address and cryptographic key binding point during boot and network handshake. Use Value: Eliminates external MAC address programming step in manufacturing; ensures IEEE-compliant uniqueness without host CPU intervention or flash-based lookup tables. | Use Scenario: Securing firmware update metadata and sensor calibration records in edge gateways deployed in remote infrastructure monitoring. IC Role / Device Role / Timing Role: Tamper-resistant configuration vault with hardware-enforced write protection for critical operational parameters. Use Value: Prevents accidental or malicious overwrite of calibration data or update signatures using WP pin assertion during field maintenance windows. |
| Medical Diagnostic Equipment | Automotive Telematics Control Units |
Use Scenario: Storing device serial number, regulatory certification IDs, and usage logs in FDA-cleared diagnostic instruments requiring audit-ready traceability. IC Role / Device Role / Timing Role: Certified identity anchor storing immutable 128-bit serial number aligned with AT24CS/AT93CS family for cross-product lifecycle tracking. Use Value: Meets IEC 62304 traceability requirements by guaranteeing globally unique serials across product families - simplifies regulatory documentation and recall management. | Use Scenario: Holding vehicle VIN-derived identifiers and OTA update counters in telematics units subject to UNECE R155 cybersecurity management system (CSMS) requirements. IC Role / Device Role / Timing Role: Secure boot credential store with permanent EUI-64 and reversible software write protection for update counters. Use Value: Enables secure counter increment under software control while locking VIN storage region via hardware WP - satisfies CSMS integrity and authenticity controls. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM with embedded identity applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24MAC402-MAHM-T | EUI-48 address (48-bit), same 2K memory, identical SOIC-8 package and pinout | Lacks native EUI-64 support - requires application-level FFFEh insertion for EUI-64 compatibility | Select when EUI-48 suffices and legacy MAC-48 addressing is mandated by protocol stack. |
| AT24CS64-MAHM-T | 64-Kbit capacity, no factory-programmed EUI or serial number, supports 1 MHz I²C, same SOIC-8 package | Requires external identity management; lacks guaranteed uniqueness or read-only extended memory blocks | Select when higher density is needed and identity provisioning is handled externally (e.g., via secure element or host MCU). |
Compared with AT24MAC402-MAHM-T, the AT24MAC602-MAHM-T provides native EUI-64 without post-processing, while AT24CS64-MAHM-T trades embedded identity for 32× more user memory - making AT24MAC602-MAHM-T optimal where IEEE 64-bit addressing and traceability are mandatory.
Availability
AT24MAC602-MAHM-T is available at Aetrix Electronics and suitable for industrial IoT gateways, automotive telematics control units, medical diagnostic equipment, and network interface cards requiring stable component supply, long-term lifecycle assurance, and guaranteed device identity.
Supply support for AT24MAC602-MAHM-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering microcontrollers, analog, FPGA, and memory solutions with focus on reliability, security, and longevity for industrial, automotive, and communications markets.
The AT24MAC602-MAHM-T belongs to Microchip's MAC-series serial EEPROM product line, designed specifically to embed globally unique IEEE EUI-64 addresses and factory-locked serial numbers into resource-constrained embedded systems without host CPU overhead.
FAQ
What is the primary function of the AT24MAC602-MAHM-T in a system design?
The AT24MAC602-MAHM-T serves as a secure, factory-programmed identity and configuration storage IC. It delivers a guaranteed unique 64-bit EUI address and 128-bit serial number in dedicated read-only memory, alongside 2 Kbit of user-configurable EEPROM. Its hardware and software write protection mechanisms ensure critical identity data remains immutable while allowing controlled updates to application parameters - making AT24MAC602-MAHM-T ideal for standards-compliant networking and regulated equipment.
How does the EUI-64 address in the AT24MAC602-MAHM-T differ from that in the AT24MAC402-MAHM-T?
The AT24MAC602-MAHM-T contains a true 64-bit EUI-64 address stored in bytes 98h–9Fh of its extended memory block, requiring no post-read processing. In contrast, the AT24MAC402-MAHM-T stores only a 48-bit EUI-48 address (9Ah–9Fh); generating an EUI-64 requires the host to insert FFFEh between the OUI and extension identifier. This makes AT24MAC602-MAHM-T preferable for protocols mandating native EUI-64, such as IPv6 autoconfiguration or IEEE 1394, eliminating firmware complexity and potential errors in AT24MAC602-MAHM-T implementations.
Can the 128-bit serial number in the AT24MAC602-MAHM-T be rewritten or modified after programming?
No, the 128-bit serial number in the AT24MAC602-MAHM-T is factory-programmed, permanently locked, and stored in a separate read-only memory area (80h–8Fh). It cannot be altered, erased, or rewritten by any command sequence, voltage condition, or external signal - including WP pin state or software write protect registers. This immutability is guaranteed across all operating conditions and ensures lifelong traceability for AT24MAC602-MAHM-T devices in production and field use.
What are the valid operating voltage and temperature ranges for the AT24MAC602-MAHM-T?
The AT24MAC602-MAHM-T operates from 1.7V to 5.5V DC supply voltage and is specified for industrial temperature range: –40°C to +85°C. These ratings apply to all functional operations including I²C communication, read/write cycles, and extended memory access. The SOIC-8 package (MAHM-T) is qualified for this range, and electrical characteristics such as tWR (5 ms max), fSCL (up to 1 MHz), and ICC1/ICC2 current draw are guaranteed across the full voltage and temperature envelope - critical for AT24MAC602-MAHM-T deployment in harsh environments.
How does hardware write protection via the WP pin interact with software write protection modes in the AT24MAC602-MAHM-T?
When the WP pin is driven high (VCC), the AT24MAC602-MAHM-T inhibits all write operations to the entire memory array regardless of software write protect register status - overriding both reversible (RSWP) and permanent (PSWP) software locks. When WP is low or floating, software protection modes become active: RSWP can be toggled to lock/unlock the first-half (00h–7Fh), while PSWP provides irreversible first-half lock. This layered approach allows AT24MAC602-MAHM-T to enforce strict write safety during manufacturing (WP = VCC) and flexible field updates (WP = GND + RSWP control).
AT24MAC602-MAHM-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UDFN (2x3)
AT24MAC602-MAHM-T FAQ
1.How can I place an order for AT24MAC602-MAHM-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24MAC602-MAHM-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24MAC602-MAHM-T reliable?
The price and inventory of AT24MAC602-MAHM-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24MAC602-MAHM-T is usually 5 days.
3.What payment methods are accepted for AT24MAC602-MAHM-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24MAC602-MAHM-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24MAC602-MAHM-T?
AT24MAC602-MAHM-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24MAC602-MAHM-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24MAC602-MAHM-T?
For technical support, including AT24MAC602-MAHM-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24MAC602-MAHM-T requirements.
6.How does Aetrix verify that AT24MAC602-MAHM-T is sourced from the original manufacturer or authorized distributors?
All AT24MAC602-MAHM-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24MAC602-MAHM-T meets industry standards.
7.What is the process for return or replacement of AT24MAC602-MAHM-T?
All AT24MAC602-MAHM-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24MAC602-MAHM-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24MAC602-MAHM-T part is unused and in its original packaging.
Return procedure for AT24MAC602-MAHM-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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