Microchip Technology AT24MAC602-SSHM-T
- Part No.:
- AT24MAC602-SSHM-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24MAC602-SSHM-T.pdf
- Description:
- IC EEPROM 2KBIT I2C 1MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24MAC602-SSHM-T from Microchip Technology (formerly Atmel) is a 2-Kbit I²C-compatible serial EEPROM with factory-programmed, permanently locked EUI-64™ address and guaranteed unique 128-bit serial number. It operates from 1.7V to 5.5V, supports 1 MHz I²C at 2.5V/5.0V, features hardware write protection via WP pin, and is housed in an 8-lead SOIC package. It serves as a secure identity and configuration storage device in networked embedded systems.
For engineers reviewing the AT24MAC602-SSHM-T datasheet, AT24MAC602-SSHM-T pinout, AT24MAC602-SSHM-T application, or AT24MAC602-SSHM-T equivalent, key selection considerations include EUI-64 address authenticity, dual-layer write protection (hardware + reversible software), 128-bit serial number uniqueness across Atmel EEPROM families, extended memory block isolation, and SOIC-8 footprint compatibility for industrial node authentication.
Technical Context
The AT24MAC602-SSHM-T implements a dedicated I²C slave interface with Schmitt-triggered, noise-filtered SDA/SCL inputs and open-drain SDA output. Its memory architecture separates the standard 256 × 8-bit array (00h–FFh) from an extended read-only block containing the EUI-64 (98h–9Fh) and 128-bit serial number (80h–8Fh), ensuring full 2K user-accessible capacity.
Write protection is implemented at three levels: hardware (WP pin disables all writes), permanent software (irreversible PSWP register locks first-half 00h–7Fh), and reversible software (RSWP register enables/disables first-half protection via specific A0/A1/A2/VHV sequences). The device supports byte and 16-byte page writes with self-timed 5 ms max write cycle and acknowledge polling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 Kbit (256 × 8), fully user-accessible - no portion reserved for EUI/serial number storage. |
| EUI Address | Factory-programmed, read-only 64-bit EUI-64 stored at 98h–9Fh - globally unique, IEEE-compliant, requires no post-read manipulation. |
| Serial Number | Guaranteed unique 128-bit value stored at 80h–8Fh - shared uniqueness guarantee across AT24CS/AT93CS/AT25S families. |
| I²C Speed | Up to 1 MHz at VCC ≥ 2.5V; 400 kHz minimum at 1.7V - supports high-throughput configuration reads in power-constrained nodes. |
| Write Protection | Hardware (WP pin), permanent software (PSWP), and reversible software (RSWP) - enables flexible, layered data integrity policies. |
| Endurance & Retention | 1,000,000 write cycles; 100-year data retention - suitable for infrequent but mission-critical identity updates over product lifetime. |
| Operating Range | −40°C to +85°C ambient; 1.7V to 5.5V supply - qualified for industrial-grade embedded applications without derating. |
Pinout & Package
AT24MAC602-SSHM-T is packaged in an 8-lead JEDEC-standard SOIC (Small Outline Integrated Circuit) with 1.27 mm pitch, RoHS-compliant, green (halide-free) finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Device Address Inputs | Hard-wired pins enabling up to eight devices on one I²C bus; define bits 3–1 of 7-bit slave address (1010xxx for EEPROM, 1011xxx for EUI/serial access). |
| SDA | Serial Data I/O | Open-drain bidirectional line - requires external pull-up; supports wire-OR with other I²C devices; carries address, data, and ACK/NACK. |
| SCL | Serial Clock Input | Positive-edge sampled clock input - controls timing of data transfer; must meet tLOW/tHIGH min/max per I²C spec (0.4–1.2 μs). |
| WP | Write Protect Control | Active-high hardware lock - when tied to VCC, inhibits all writes to entire memory array regardless of software protection state. |
| GND | Ground Reference | Primary return path for VCC and signal currents; must be low-impedance to ensure noise immunity for Schmitt-triggered inputs. |
| VCC | Power Supply | 1.7V–5.5V operating range - powers internal high-voltage pump for EEPROM writes; supports direct connection to 1.8V, 3.3V, or 5V rails. |
Key Features
| Feature | Design Value |
|---|---|
| EUI-64™ Address | Factory-programmed, read-only 64-bit IEEE identifier stored outside main array - eliminates need for external MAC management or post-processing (e.g., FFFE insertion). |
| 128-bit Serial Number | Atmel-guaranteed unique value shared across AT24CS/AT93CS/AT25S families - enables system-level traceability without custom programming. |
| Dual Write Protection | Independent hardware (WP pin) and software (PSWP/RSWP registers) layers - allows selective locking of first-half (00h–7Fh) while keeping second-half (80h–FFh) writable. |
| Noise-Resilient Interface | Schmitt-triggered, filtered SDA/SCL inputs - suppresses >100 ns glitches (1.7V) or >50 ns (2.5V/5.0V), improving robustness in electrically noisy industrial environments. |
| Page Write Efficiency | 16-byte page write mode with automatic address increment - reduces I²C transaction overhead by up to 94% vs. byte writes for bulk configuration updates. |
Applications
| Industrial Ethernet Node | Medical Device Authentication |
|---|---|
|
Use Scenario: Embedded controller in a DIN-rail PLC reads device identity during boot to validate firmware signature and enable secure communication. IC Role / Device Role: Secure identity source - provides cryptographically verifiable EUI-64 and serial number used as hardware root-of-trust seed. Use Value: Eliminates need for external secure element; ensures each unit has globally unique, factory-locked identifiers required for TLS certificate binding and anti-cloning. |
Use Scenario: Portable ultrasound probe stores calibration coefficients and regulatory compliance metadata tied to its unique hardware ID. IC Role / Device Role: Tamper-resistant configuration store - holds FDA-mandated serial traceability and calibration history in write-protected memory regions. Use Value: Enables audit-ready device history with permanent EUI-64 and 128-bit serial number - both survive reprogramming and meet IEC 62304 data retention requirements. |
| Smart Energy Meter | Automotive Telematics Module |
|
Use Scenario: Utility-grade meter uses factory-assigned EUI-64 as its DLMS/COSEM logical device address for remote firmware updates and tariff management. IC Role / Device Role: Standards-compliant identity anchor - delivers IEEE 802.1AE-compatible MAC address without host CPU intervention or flash partitioning. Use Value: Reduces BOM cost vs. discrete MAC + EEPROM solution; guarantees interoperability with AMI infrastructure requiring EUI-64 addressing. |
Use Scenario: Cellular-connected telematics control unit (TCU) retrieves its unique vehicle identifier during CAN initialization for cloud registration. IC Role / Device Role: Automotive-grade identity vault - supplies immutable 128-bit serial number and EUI-64 to UDS diagnostic services (0x22 F190/F1A0). Use Value: Meets ISO/SAE 21434 hardware security requirements; prevents duplicate VIN mapping by ensuring globally unique TCU identifiers across production batches. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM with factory-programmed identity applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24MAC402-SSHM-T | EUI-48 (48-bit) address only; same 2K capacity, SOIC-8 package, and write protection features. | Limited to legacy protocols requiring 48-bit MAC (e.g., older IEEE 802.3); cannot natively support EUI-64-based IPv6 autoconfiguration. | Select when EUI-48 suffices and cost sensitivity favors smaller die size; verify OUI compatibility with existing network stack. |
| M95M02-DFMN6TP | 2-Mbit SPI EEPROM (not I²C); no factory-programmed EUI or serial number; requires external MCU to manage identity logic. | Used where high-speed configuration loading (>10 MHz SPI) is prioritized over built-in identity - e.g., FPGA bitstream storage with separate identity IC. | Choose only if SPI interface is mandatory and identity provisioning is handled externally; adds design complexity and BOM count vs. integrated solution. |
Compared with AT24MAC402-SSHM-T and M95M02-DFMN6TP, the AT24MAC602-SSHM-T uniquely delivers native EUI-64 support with zero host processing overhead, full 2K user memory, and triple-layer write protection - making it optimal for standards-compliant, secure, and maintenance-free node identification.
Availability
AT24MAC602-SSHM-T is available at Aetrix Electronics and suitable for industrial Ethernet nodes, medical device authentication, smart energy meters, automotive telematics modules, and secure IoT edge gateways requiring stable component supply, long-term lifecycle assurance, and guaranteed factory-programmed identity.
Supply support for AT24MAC602-SSHM-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and manufacturing continuity for the AT24MAC family. Microchip is a global leader in microcontrollers, analog, and Flash-IP solutions with broad industrial and automotive qualification.
The AT24MAC602-SSHM-T belongs to Microchip's MAC-series serial EEPROM product line, designed specifically to embed globally unique, factory-locked IEEE identifiers into resource-constrained embedded systems - eliminating external identity management and reducing firmware complexity.
FAQ
What is the exact EUI-64 address format stored in AT24MAC602-SSHM-T?
The AT24MAC602-SSHM-T stores a true 64-bit EUI-64 address in bytes 98h–9Fh of its extended memory block. It consists of Atmel's IEEE-assigned 24-bit OUI (FCC23Dh) followed by a unique 40-bit extension identifier. Unlike EUI-48-to-EUI-64 conversion methods, this value requires no host-side manipulation - it is ready for direct use in IPv6 Stateless Address Autoconfiguration (SLAAC) or IEEE 802.1AE MACsec.
Can the 128-bit serial number in AT24MAC602-SSHM-T be overwritten or reprogrammed?
No. The 128-bit serial number in AT24MAC602-SSHM-T is factory-programmed, permanently locked, and stored in a dedicated read-only memory region (80h–8Fh). It cannot be altered, erased, or rewritten under any condition - including during power cycling, WP pin assertion, or software command execution. This immutability ensures lifelong traceability and meets regulatory requirements for medical and industrial equipment.
How does hardware write protection interact with software write protection on AT24MAC602-SSHM-T?
When the WP pin of AT24MAC602-SSHM-T is driven high (VCC), hardware write protection takes absolute precedence: all write operations - including those targeting unprotected memory regions or attempting to modify PSWP/RSWP registers - are blocked. Software write protection (PSWP/RSWP) remains active only when WP is low or floating, allowing granular control over first-half (00h–7Fh) writes while leaving second-half (80h–FFh) accessible.
Is AT24MAC602-SSHM-T compatible with standard I²C bus speeds and voltage levels?
Yes. AT24MAC602-SSHM-T is fully compliant with standard-mode (100 kHz) and fast-mode (400 kHz) I²C specifications, and additionally supports fast-mode plus (1 MHz) operation at VCC ≥ 2.5V. Its Schmitt-triggered inputs accept standard I²C voltage thresholds (VIL ≤ 0.3×VCC, VIH ≥ 0.7×VCC), and it operates across the full 1.7V–5.5V supply range - ensuring interoperability with 1.8V, 3.3V, and 5V host controllers without level shifting.
What package type and lead count does AT24MAC602-SSHM-T use?
AT24MAC602-SSHM-T uses an 8-lead JEDEC-standard SOIC (Small Outline Integrated Circuit) package with 1.27 mm lead pitch, body dimensions of 4.9 mm × 3.9 mm × 1.75 mm, and green (RoHS-compliant, halide-free) finish. The "SSHM-T" suffix explicitly denotes this SOIC-8 variant - distinct from TSSOP, UDFN, or SOT23 versions of the same part number family.
AT24MAC602-SSHM-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24MAC602-SSHM-T FAQ
1.How can I place an order for AT24MAC602-SSHM-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24MAC602-SSHM-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24MAC602-SSHM-T reliable?
The price and inventory of AT24MAC602-SSHM-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24MAC602-SSHM-T is usually 5 days.
3.What payment methods are accepted for AT24MAC602-SSHM-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24MAC602-SSHM-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24MAC602-SSHM-T?
AT24MAC602-SSHM-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24MAC602-SSHM-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24MAC602-SSHM-T?
For technical support, including AT24MAC602-SSHM-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24MAC602-SSHM-T requirements.
6.How does Aetrix verify that AT24MAC602-SSHM-T is sourced from the original manufacturer or authorized distributors?
All AT24MAC602-SSHM-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24MAC602-SSHM-T meets industry standards.
7.What is the process for return or replacement of AT24MAC602-SSHM-T?
All AT24MAC602-SSHM-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24MAC602-SSHM-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24MAC602-SSHM-T part is unused and in its original packaging.
Return procedure for AT24MAC602-SSHM-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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