Microchip Technology AT25010AN-10SI-1.8-T
- Part No.:
- AT25010AN-10SI-1.8-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25010AN-10SI-1.8-T.pdf
- Description:
- IC EEPROM 1KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25010AN-10SI-1.8-T from Microchip Technology (formerly Atmel) is a 1-Kbit SPI serial EEPROM organized as 128 words × 8 bits, operating from 1.8 V to 5.5 V, supporting 20 MHz clock rate at 5 V, featuring 8-byte page write mode and hardware/software write protection via WP pin and status register. It serves as nonvolatile configuration storage in industrial microcontroller systems requiring low-voltage operation and automotive-grade reliability.
For engineers reviewing the AT25010AN-10SI-1.8-T datasheet, AT25010AN-10SI-1.8-T pinout, AT25010AN-10SI-1.8-T application, or AT25010AN-10SI-1.8-T equivalent, this page delivers verified electrical parameters, validated SOIC-8 pin mapping, confirmed block write protection levels, and real-world use cases for embedded control, sensor calibration, and power management firmware storage.
Technical Context
The AT25010AN-10SI-1.8-T implements a synchronous SPI slave interface compliant with Modes 0 and 3, using separate SI/SO lines and CS-controlled selection. Its internal architecture includes an 8-bit instruction register, status register with BP1/BP0 nonvolatile protection bits, and automatic address increment during read sequences.
All write operations require prior WREN instruction execution and WP pin high assertion; self-timed write cycles complete in ≤5 ms with no external erase step. The HOLD pin suspends ongoing communication without resetting the sequence, enabling multi-device bus arbitration in resource-constrained systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1024 bits (128 × 8), sufficient for bootloader flags, calibration coefficients, or device ID storage in compact MCU designs. |
| Supply Voltage Range | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V logic families and backward compatibility with 3.3 V/5 V systems without level shifters. |
| Max Clock Frequency | 20 MHz at VCC = 5 V - supports fast configuration loading in time-critical boot sequences. |
| Write Cycle Time | ≤5 ms - ensures predictable latency for firmware update commits without blocking host CPU for extended periods. |
| Endurance & Retention | 1 million write cycles / 100 years data retention - meets long-life requirements for industrial field devices and automotive ECUs. |
| Operating Temperature | −40°C to +85°C - qualified for industrial ambient environments including motor control enclosures and outdoor sensor nodes. |
| Package | 8-lead JEDEC SOIC (8S1), 3.9 mm × 4.9 mm footprint - compatible with standard reflow processes and legacy PCB layouts. |
Pinout & Package
AT25010AN-10SI-1.8-T is housed in an 8-lead JEDEC SOIC package (8S1), 0.150" wide body, with gull-wing leads and standard 1.27 mm pitch. Pin 1 is marked by a beveled corner or dot; the package is lead-free/halogen-free and rated for industrial temperature range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must be held low for entire SPI transaction; high impedance on SO when CS is high. |
| SCK | Serial Clock | Input-only master-generated clock; timing defines bit transfer edges per SPI Mode 0 (CPOL=0, CPHA=0). |
| SI | Serial Data Input | Receives op-code, address, and data; MSB-first; ignored during HOLD or write cycle. |
| SO | Serial Data Output | Drives read data or status register contents; high-impedance when CS is high or HOLD is active. |
| GND | Ground Reference | Primary return path for VCC and I/O signals; requires low-impedance connection to minimize noise coupling. |
| VCC | Power Supply | Single supply input (1.8–5.5 V); decoupling capacitor (0.1 µF) required near pin for stable SPI operation. |
| WP | Write Protect | Hardware lock: low disables all writes regardless of status register or WREN state; critical for fail-safe firmware storage. |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting sequence; allows host to service higher-priority interrupts mid-transaction. |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Mode | 8-byte burst programming reduces total write time vs. byte-by-byte writes - cuts configuration save latency by up to 8×. |
| Block Write Protection | Four selectable protection levels (none, 1/4, 1/2, full array) via nonvolatile BP1/BP0 bits - prevents accidental overwrite of critical calibration data. |
| Dual Write Enable | Combines hardware (WP pin) and software (WREN/WRSR) controls - enables layered security for production programming and field updates. |
| Hold Functionality | Preserves internal state during SCK-low suspension - eliminates need for retransmission or command reissuance after interrupt handling. |
| Low-Voltage Operation | Guaranteed functionality down to 1.8 V - supports battery-backed or energy-harvesting systems where supply voltage droops below 2.7 V. |
Applications
| Industrial Sensor Calibration | Automotive ECU Configuration |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed during power-up initialization; read-only during runtime. Use Value: Enables plug-and-play sensor replacement without manual recalibration; leverages 100-year retention to avoid drift-related field failures. |
Use Scenario: Holding vehicle-specific settings (e.g., transmission shift maps, lighting profiles) in body control modules. IC Role / Device Role / Timing Role: SPI-configurable memory mapped into MCU's peripheral address space for fast read access during CAN message processing. Use Value: Supports over-the-air (OTA) updates via WP-controlled write windows - prevents corruption during power loss during firmware patching. |
| Medical Device Settings Backup | Smart Meter Firmware Storage |
Use Scenario: Preserving user-adjusted therapy parameters and audit logs in portable infusion pumps. IC Role / Device Role / Timing Role: Secure configuration vault with dual-lock protection (WP pin + status register) to meet IEC 62304 safety requirements. Use Value: Achieves Class C software safety integrity via hardware-enforced write disable - eliminates risk of unintended parameter changes during clinical use. |
Use Scenario: Storing meter calibration constants and tariff tables in ANSI C12.22-compliant electricity meters. IC Role / Device Role / Timing Role: Low-power EEPROM interfaced to 8-bit MCU via SPI; accessed only during meter commissioning or firmware upgrade. Use Value: 1.8 V operation extends battery life in AMI endpoints; 1M endurance supports >10 years of daily tariff updates without wear-out. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | 128 Kbit capacity, same SOIC-8 package, 2.5–5.5 V supply, 20 MHz max clock; lacks HOLD pin and 1.8 V support. | Better suited for larger configuration sets but incompatible in ultra-low-voltage (1.8 V) designs or systems requiring suspend capability. | Select M95128-WMN6TP only if memory size >1 Kbit is required and 1.8 V operation is unnecessary. |
| BR24G01FJ-WE2 | 1 Kbit, I²C interface (not SPI), 1.7–5.5 V, 400 kHz/1 MHz speeds; includes write protect pin but no status register BP bits. | Requires I²C bus resources and different driver stack; offers simpler protection but no granular array segmentation. | Choose BR24G01FJ-WE2 only when I²C is already dominant in the system and SPI bus loading must be minimized. |
Compared with M95128-WMN6TP and BR24G01FJ-WE2, AT25010AN-10SI-1.8-T uniquely combines 1.8 V operation, HOLD functionality, and four-level block protection in a SPI interface - making it optimal for space-constrained, low-power industrial controllers needing robust, fine-grained data security.
Availability
AT25010AN-10SI-1.8-T is available at Aetrix Electronics and suitable for industrial sensor calibration, automotive ECU configuration, and medical device settings backup requiring stable component supply across extended product lifecycles.
Supply support for AT25010AN-10SI-1.8-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT25xxx family of serial EEPROMs.
The AT25010A series was designed specifically for SPI-based microcontroller systems needing reliable, low-voltage nonvolatile storage with hardware-enforced write protection - targeting industrial automation, automotive subsystems, and portable medical equipment.
FAQ
What is the minimum supply voltage required for reliable operation of the AT25010AN-10SI-1.8-T?
The AT25010AN-10SI-1.8-T is specified for operation from 1.8 V to 5.5 V. At 1.8 V, it supports SPI communication up to 5 MHz (per Table 4 AC Characteristics), retains full write functionality, and meets all DC parametric limits including input thresholds and output drive strength. This makes AT25010AN-10SI-1.8-T suitable for battery-powered or energy-harvesting applications where supply rails dip below 2.7 V.
Does the AT25010AN-10SI-1.8-T support SPI Mode 3, and how is it enabled?
Yes, the AT25010AN-10SI-1.8-T supports both SPI Mode 0 (CPOL = 0, CPHA = 0) and Mode 3 (CPOL = 1, CPHA = 1). No configuration is required - the device automatically adapts to the master's clock polarity and phase. The datasheet describes Mode 0 operation in detail, but Mode 3 timing is fully functional and validated per the AC characteristics table under "VCC = 1.8–5.5 V" conditions.
How does the HOLD pin function during an active write cycle in the AT25010AN-10SI-1.8-T?
The HOLD pin has no effect during an internal write cycle (tWC = 5 ms); once initiated, the write proceeds to completion regardless of HOLD state. HOLD only operates during active SPI communication - i.e., when CS is low and SCK is toggling. During a write, only RDSR is accepted to monitor RDY status; all other commands, including HOLD assertion, are ignored until the write completes and RDY returns to "0".
Can the AT25010AN-10SI-1.8-T be used as a direct replacement for the AT25010AN-10SI-2.7-T in an existing design?
Yes - the AT25010AN-10SI-1.8-T is pin-compatible and functionally identical to the AT25010AN-10SI-2.7-T, except for its extended 1.8 V minimum supply rating. All timing, pinout, instruction set, and protection features are identical. Migration requires only verification that the 1.8 V supply meets stability and ripple specs; no PCB or firmware changes are needed.
What protection mechanisms prevent unintended writes to the AT25010AN-10SI-1.8-T during power-up or brownout conditions?
The AT25010AN-10SI-1.8-T powers up in write-disable state (WEN = 0), requires explicit WREN instruction before any write, and monitors WP pin state continuously. If WP is low at any time - including during power ramp-up - all write attempts (including WREN) are blocked. Combined with the status register's nonvolatile BP bits, this provides three independent layers of write protection against power-related corruption.
AT25010AN-10SI-1.8-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25010AN-10SI-1.8-T FAQ
1.How can I place an order for AT25010AN-10SI-1.8-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25010AN-10SI-1.8-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25010AN-10SI-1.8-T reliable?
The price and inventory of AT25010AN-10SI-1.8-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25010AN-10SI-1.8-T is usually 5 days.
3.What payment methods are accepted for AT25010AN-10SI-1.8-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25010AN-10SI-1.8-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25010AN-10SI-1.8-T?
AT25010AN-10SI-1.8-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25010AN-10SI-1.8-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25010AN-10SI-1.8-T?
For technical support, including AT25010AN-10SI-1.8-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25010AN-10SI-1.8-T requirements.
6.How does Aetrix verify that AT25010AN-10SI-1.8-T is sourced from the original manufacturer or authorized distributors?
All AT25010AN-10SI-1.8-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25010AN-10SI-1.8-T meets industry standards.
7.What is the process for return or replacement of AT25010AN-10SI-1.8-T?
All AT25010AN-10SI-1.8-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25010AN-10SI-1.8-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25010AN-10SI-1.8-T part is unused and in its original packaging.
Return procedure for AT25010AN-10SI-1.8-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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