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Microchip Technology AT25020B-SSHL-B
- Part No.:
- AT25020B-SSHL-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25020B-SSHL-B.pdf
- Description:
- IC EEPROM 2KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,225
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Product details
Overview
AT25020B-SSHL-B from Microchip Technology is a 2 Kbit (256 × 8) SPI Serial EEPROM IC designed for nonvolatile data storage in embedded control and system configuration circuits. It operates from 1.8V to 5.5V, supports SPI Modes 0 and 3, delivers up to 20 MHz clock rate at 5V, features hardware/software write protection via WP pin and STATUS register, and guarantees 1,000,000 write cycles with 100-year data retention - deployed in industrial sensor nodes and power management firmware storage.
For engineers reviewing the AT25020B-SSHL-B datasheet, AT25020B-SSHL-B pinout, AT25020B-SSHL-B application, or AT25020B-SSHL-B equivalent, key selection criteria include its 8-lead SOIC package, 5 ms max self-timed write cycle, industrial temperature range (−40°C to +85°C), block write protection granularity (1/4, 1/2, or full array), and dual-level data protection using both WP pin and WRSR instruction.
Technical Context
The AT25020B-SSHL-B implements a synchronous SPI slave interface with fixed MSB-first serial protocol, where instructions, addresses, and data are latched on SCK rising edge and output on falling edge. Its internal architecture includes a dedicated high-voltage generation circuit for EEPROM programming, a STATUS register with BP1/BP0 bits for nonvolatile block protection, and a Power-on Reset (POR) circuit ensuring stable initialization before command acceptance.
It supports hold functionality via the HOLD pin to suspend ongoing serial transfers without resetting the sequence, while maintaining independent control of write enable (WEL bit) and ready/busy (RDY/BSY) status. The device defaults to standby mode at power-up with WEL = 0 and RDY/BSY = 0, and ships with memory array pre-programmed to 0xFFh and BP bits cleared.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 Kbit (256 words × 8 bits); sufficient for firmware parameter tables or calibration data in space-constrained designs |
| Supply Voltage Range | 1.8V to 5.5V; enables direct interfacing with 1.8V, 3.3V, and 5V microcontrollers without level-shifting |
| Max Clock Frequency | 20 MHz at VCC ≥ 4.5V; supports high-speed configuration reads in real-time systems |
| Write Cycle Time | ≤ 5 ms maximum; deterministic erase-and-program timing simplifies host polling or interrupt-driven completion handling |
| Endurance & Retention | 1,000,000 write cycles / 100 years data retention at 55°C; meets long-life requirements for industrial field devices |
| Operating Temperature | −40°C to +85°C industrial grade; validated for use in automotive body control modules and factory automation PLCs |
| ESD Protection | > 4 kV HBM; robust against handling and board-level electrostatic discharge during assembly and field service |
Pinout & Package
AT25020B-SSHL-B is packaged in an 8-lead SOIC (Small Outline Integrated Circuit) with standard 150-mil body width and gull-wing leads. This RoHS-compliant, green (lead-free/halide-free) package supports automated surface-mount assembly and provides mechanical stability for industrial environments.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be driven low before any SPI transaction; requires pull-up resistor (≤10 kΩ) tied to VCC for reliable power-up behavior |
| SO | Serial Data Output | Tri-state output; drives data on falling edge of SCK; enters high-impedance state when CS is high or HOLD is asserted |
| WP | Write-Protect | Hardware lock; inhibits all write operations when pulled low; overrides software write-enable state during active CS |
| GND | Ground Reference | System ground return path for VCC supply and I/O signals; must be low-impedance connection to minimize noise coupling |
| SI | Serial Data Input | Command/address/data input; sampled on rising edge of SCK; ignored during HOLD or when CS is high |
| SCK | Serial Clock Input | Master-generated clock; defines timing for SI sampling and SO output; supports idle-high (Mode 3) or idle-low (Mode 0) |
| HOLD | Suspend Control | Pauses ongoing SPI transfer without resetting sequence; requires SCK low to assert/deassert; does not affect active write cycles |
| VCC | Power Supply | 1.8V–5.5V core supply; must ramp monotonically at ≤0.1 V/µs; POR circuit enforces tPUP ≥ 100 µs delay before first command |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Mode | 8-byte page writes reduce total programming time vs. byte-by-byte; improves firmware update throughput in host MCU applications |
| Block Write Protection | BP1/BP0 bits in STATUS register allow selective locking of 1/4, 1/2, or full memory array - critical for safeguarding bootloader or security keys |
| Dual Write Protection | Combines hardware (WP pin) and software (WRSR instruction) control - prevents accidental overwrites during debug or field upgrades |
| Hold Function | Enables multi-master arbitration or CPU context switching by pausing SPI without losing command state or requiring re-synchronization |
| Green Packaging | RoHS-compliant, halide-free SOIC package meets global environmental regulations and supports lead-free reflow profiles |
Applications
| Industrial Sensor Calibration Storage | Medical Device Configuration Memory |
|---|---|
Use Scenario: Storing factory-calibrated offset/gain coefficients and linearization tables for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed during power-up initialization; read-only during normal operation; write-enabled only during calibration procedure. Use Value: Eliminates need for external trimming components; enables field recalibration via service port while preserving integrity of operational parameters. |
Use Scenario: Holding patient-specific therapy settings, device serial number, and usage logs in portable infusion pumps and diagnostic monitors. IC Role / Device Role / Timing Role: Secure parameter repository with hardware write-protection enabled during clinical operation; accessed via SPI under MCU supervision. Use Value: Ensures regulatory compliance (IEC 62304) by preventing unauthorized runtime modification of safety-critical configuration data. |
| Automotive Body Control Module | Smart Energy Meter Firmware Storage |
Use Scenario: Retaining door lock actuator timing profiles, mirror position presets, and lighting dimming curves across ignition cycles in 12V vehicle networks. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3V microcontroller; withstands load-dump transients via robust ESD design. Use Value: Supports AEC-Q100 stress testing due to −40°C to +85°C rating and 1M-cycle endurance - reduces field failure risk in harsh under-hood environments. |
Use Scenario: Storing tariff schedules, meter calibration constants, and firmware patch metadata in ANSI C12.22-compliant utility meters operating on 24V AC/DC supplies. IC Role / Device Role / Timing Role: SPI-configurable memory with 5 ms write cycle enabling fast over-the-air updates without disrupting metering accuracy. Use Value: Enables secure, field-upgradable firmware architecture compliant with DLMS/COSEM standards while minimizing BOM cost vs. FRAM alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SPI EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95256-WMN6TP | 256 Kbit capacity, same 8-lead SOIC package, 20 MHz max clock, but requires 2.5–5.5V supply (no 1.8V support) | Higher density for complex configuration sets; unsuitable for 1.8V-only systems like battery-powered IoT sensors | Select when >2 Kbit storage is needed and VCC ≥ 2.5V; verify compatibility with existing PCB layout and voltage rails |
| CAT25256VI-GT3 | 256 Kbit, 1.8–5.5V operation, same pinout, but lacks HOLD pin and supports only SPI Mode 0 | No suspend capability limits use in multi-master or real-time interrupt contexts; reduced feature set simplifies driver code | Choose for cost-sensitive, single-master applications where hold functionality is unnecessary and firmware footprint must be minimized |
Compared with M95256-WMN6TP and CAT25256VI-GT3, the AT25020B-SSHL-B offers optimal balance of low-voltage operation, industrial temperature tolerance, and dual protection mechanisms - making it preferred for compact, battery-backed, or safety-critical embedded systems where reliability outweighs raw density.
Availability
AT25020B-SSHL-B is available at Aetrix Electronics and suitable for industrial sensor calibration storage, medical device configuration memory, and automotive body control module applications requiring stable component supply across extended product lifecycles.
Supply support for AT25020B-SSHL-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, FPGA, and memory solutions, headquartered in Chandler, Arizona, with global design, manufacturing, and sales operations.
The AT25020B-SSHL-B belongs to Microchip's AT25xxx-B series of SPI Serial EEPROMs, engineered specifically for robust, low-power, nonvolatile data storage in industrial, automotive, and medical systems where long-term reliability and wide voltage operation are mandatory.
FAQ
What is the memory organization of the AT25020B-SSHL-B?
The AT25020B-SSHL-B contains 2,048 bits of EEPROM memory organized as 256 words × 8 bits. This structure supports byte-addressable random access and 8-byte page writes. The device uses a single 8-bit address space (0x00–0xFF) with no bank switching required, simplifying firmware implementation for microcontrollers with limited RAM or stack depth. All memory locations retain data for 100 years at 55°C.
Does the AT25020B-SSHL-B support SPI Mode 3, and how is it configured?
Yes, the AT25020B-SSHL-B supports both SPI Mode 0 (CPOL = 0, CPHA = 0) and Mode 3 (CPOL = 1, CPHA = 0). In Mode 3, the SCK line idles high when CS is deasserted; data is still latched on the rising edge and output on the falling edge. No device configuration is needed - the host controller must match the SCK idle state before and after each CS assertion. Mode 3 is commonly used with certain ARM Cortex-M peripherals and avoids conflicts in multi-slave buses with mixed polarity requirements.
How does hardware write protection work on the AT25020B-SSHL-B?
Hardware write protection on the AT25020B-SSHL-B is implemented via the WP (Write-Protect) pin. When WP is pulled low while CS is active, all write operations (WRITE, WRSR) are immediately inhibited - even if the STATUS register's WEL bit is set. This override persists until WP returns high. Unlike software protection, WP-based blocking requires no SPI communication and remains effective during brown-out conditions or MCU reset events, making it ideal for safeguarding critical boot parameters.
What is the purpose of the HOLD pin on the AT25020B-SSHL-B?
The HOLD pin on the AT25020B-SSHL-B suspends ongoing SPI serial transfers without resetting the command sequence or losing internal state. When asserted (low) during SCK low time, it places SO in high-impedance and ignores SI/SCK inputs, allowing the host MCU to service higher-priority interrupts or switch contexts. HOLD does not pause active write cycles - those complete autonomously. This feature enables deterministic timing in real-time systems where SPI bus arbitration is required.
Is the AT25020B-SSHL-B compatible with 1.8V microcontrollers?
Yes, the AT25020B-SSHL-B is fully compatible with 1.8V microcontrollers. It operates across 1.8V to 5.5V, with guaranteed DC and AC performance down to 1.8V (including 5 MHz SCK max frequency and valid VIH/VIL thresholds). Input leakage is ≤±3 µA, and output drive strength meets VOH/VOL specs at 1.8V (VOH ≥ VCC − 0.2V, VOL ≤ 0.2V). No level shifters are needed when interfacing with 1.8V SPI masters, reducing BOM count and board area.
AT25020B-SSHL-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25020B-SSHL-B FAQ
1.How can I place an order for AT25020B-SSHL-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25020B-SSHL-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25020B-SSHL-B reliable?
The price and inventory of AT25020B-SSHL-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25020B-SSHL-B is usually 5 days.
3.What payment methods are accepted for AT25020B-SSHL-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25020B-SSHL-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25020B-SSHL-B?
AT25020B-SSHL-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25020B-SSHL-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25020B-SSHL-B?
For technical support, including AT25020B-SSHL-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25020B-SSHL-B requirements.
6.How does Aetrix verify that AT25020B-SSHL-B is sourced from the original manufacturer or authorized distributors?
All AT25020B-SSHL-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25020B-SSHL-B meets industry standards.
7.What is the process for return or replacement of AT25020B-SSHL-B?
All AT25020B-SSHL-B units undergo pre-shipment inspection (PSI). If there is an issue with AT25020B-SSHL-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25020B-SSHL-B part is unused and in its original packaging.
Return procedure for AT25020B-SSHL-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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