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Microchip Technology AT25020B-SSPD-T
- Part No.:
- AT25020B-SSPD-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25020B-SSPD-T.pdf
- Description:
- IC EEPROM 2KBIT SPI 5MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,904
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Product details
Overview
AT25020B-SSPD-T from Microchip Technology is a 2 Kbit (256 × 8) SPI-compatible automotive-grade serial EEPROM with AEC-Q100 Grade 1 qualification (-40°C to +125°C), 5 MHz max clock rate at 5V, and hardware/software write protection via WP pin and STATUS register. It serves as nonvolatile configuration storage in engine control units, ADAS sensor modules, and body electronics where robust data retention and low-voltage operation are critical.
For engineers reviewing the AT25020B-SSPD-T datasheet, AT25020B-SSPD-T pinout, AT25020B-SSPD-T application, or AT25020B-SSPD-T equivalent, key selection criteria include its 1.7–5.5 V operating range, 8-byte page write capability, 1,000,000 write endurance, 100-year data retention, and support for SPI Modes 0 and 3 in space-constrained automotive PCBs.
Technical Context
The AT25020B-SSPD-T implements a synchronous SPI slave interface with fixed MSb-first data framing, rising-edge input sampling on SI, and falling-edge output latching on SO. Its internal architecture includes a high-voltage generation circuit for EEPROM programming, a STATUS register with BP1/BP0 block protection bits, and dedicated hardware logic for HOLD and WP pin response independent of firmware state.
It supports dual voltage grades: Grade 1 (2.5–5.5 V, -40°C to +125°C) and Grade 3 (1.7–5.5 V, -40°C to +85°C). The device enters Standby mode at power-up with WEL = 0 and RDY/BSY = 0, requiring explicit WREN before WRITE or WRSR commands. Write cycles complete autonomously within ≤5 ms and are interruptible only by WP assertion prior to internal latch activation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 Kbit (256 × 8) - fixed address space requiring 8-bit addressing; no external address lines needed |
| Interface | SPI slave, Modes 0 & 3 - compatible with standard microcontroller SPI peripherals without protocol translation |
| Max clock frequency | 5 MHz at VCC = 5.0 V - enables sub-200 µs byte reads and efficient page writes in real-time systems |
| Write endurance | 1,000,000 cycles - supports frequent calibration data updates in vehicle lifetime logging applications |
| Data retention | 100 years at TA = 55°C - ensures firmware configuration integrity across full automotive service life |
| Operating voltage | 1.7 V to 5.5 V - interoperable with 1.8 V logic domains and legacy 5 V automotive subsystems |
| Temperature grade | AEC-Q100 Grade 1 (-40°C to +125°C) - qualified for under-hood ECU deployment without derating |
Pinout & Package
AT25020B-SSPD-T is supplied in an 8-lead SOIC package (3.9 mm × 4.9 mm, 1.27 mm pitch), with pins arranged in standard dual-inline configuration and marked "SSPD-T" per Microchip's packaging nomenclature.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select | Active-low enable: must be driven low before SCK transitions; requires pull-up resistor (≤10 kΩ) tied to VCC for robust power-up behavior |
| SO (Pin 2) | Serial Data Output | Tri-state open-drain output: drives data on falling edge of SCK; high-impedance when CS high or HOLD active |
| WP (Pin 3) | Write-Protect | Hardware lock: inhibits all write operations when pulled low; does not affect ongoing internal write cycles once initiated |
| GND (Pin 4) | Ground reference | Common return path for VCC and all I/O; must be low-impedance connection to system ground plane |
| SI (Pin 5) | Serial Data Input | Input-only data line: latches opcode/address/data on rising edge of SCK; MSb-first framing required |
| SCK (Pin 6) | Serial Clock | Asynchronous master-generated clock: defines timing for SI sampling and SO output; idle polarity depends on SPI mode |
| HOLD (Pin 7) | Suspend Serial Input | Pauses SPI transaction mid-sequence without resetting state: asserted during SCK low to enter/exit hold; no effect on active write cycle |
| VCC (Pin 8) | Power supply | Single-supply input: accepts 1.7–5.5 V; requires local 100 nF ceramic decoupling capacitor placed <2 mm from pin |
Key Features
| Feature | Design Value |
|---|---|
| Automotive AEC-Q100 Grade 1 qualification | Validated for -40°C to +125°C operation with full temperature cycling, HTOL, and ESD testing - eliminates need for additional qualification in Tier-1 designs |
| Hardware + software write protection | Combines dedicated WP pin (instant hardware lock) with BP1/BP0 bits in STATUS register (configurable 1/4, 1/2, or full array protection) - enables layered security for boot code and calibration tables |
| 8-byte page write mode | Allows up to 8 sequential bytes to be written in a single command with ≤5 ms internal cycle time - reduces bus occupancy vs. byte-write for parameter sets |
| Hold function with zero-cycle resume | HOLD pin suspends SPI communication while preserving internal state; resumption requires only one SCK low-to-high transition - enables priority interrupt handling in real-time MCUs |
| Green RoHS-compliant packaging | Lead-free, halide-free SOIC package with NiPdAu termination - meets automotive ELV Directive and facilitates Pb-free reflow assembly |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) |
|---|---|
|
Use Scenario: Storing adaptive fuel trim values, misfire counters, and diagnostic trouble codes (DTCs) that persist across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration and runtime data logger interfaced directly to MCU SPI port; operates during cold crank (1.7 V) and hot soak (+125°C). Use Value: Guarantees 100-year data retention and 1M write cycles - exceeds OEM 15-year vehicle lifespan requirements without wear leveling firmware. |
Use Scenario: Holding camera calibration offsets, radar beamforming coefficients, and sensor fusion parameters updated during factory calibration and field OTA updates. IC Role / Device Role / Timing Role: Secure parameter vault with hardware WP pin permanently tied high during normal operation and activated only during authenticated update sequences. Use Value: Block write protection (BP1/BP0) prevents accidental overwrite of safety-critical calibration data while allowing selective field updates to operational parameters. |
| Body Control Module (BCM) | Electric Power Steering (EPS) |
|
Use Scenario: Retaining user preferences (seat position, mirror angle, lighting profiles) and door lock configuration across battery disconnect events. IC Role / Device Role / Timing Role: Low-power SPI EEPROM accessed intermittently by BCM MCU; leverages <2 µA standby current at 1.7 V to minimize parasitic drain. Use Value: 1.7 V minimum VCC enables direct connection to always-on 1.8 V rail - eliminates level-shifter components and associated BOM cost. |
Use Scenario: Storing torque sensor zero-point compensation, motor phase advance tables, and fault history logs subject to ASIL-B functional safety requirements. IC Role / Device Role / Timing Role: Safety-relevant nonvolatile memory with dual protection: WP pin hardwired to MCU GPIO for runtime lock, and STATUS register BP bits set at production test. Use Value: AEC-Q100 Grade 1 qualification provides documented reliability evidence for ISO 26262 FMEDA analysis - reduces safety case development effort. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95256-DFMN6TP | 256 Kbit capacity, 20 MHz max clock, 1.8–5.5 V, SO8 package; no HOLD pin; supports SPI Mode 0 only | Higher density for firmware patch storage; lacks suspend capability for time-critical interrupt handling | Select when >2 Kbit memory is required and HOLD functionality is unnecessary |
| BR25G256FJ-3GE2 | 256 Kbit, 10 MHz, 1.6–5.5 V, TSSOP8; built-in error correction (ECC); supports SPI Mode 0/3; AEC-Q100 Grade 2 (-40°C to +105°C) | ECC enables single-bit error detection/correction; Grade 2 insufficient for under-hood placement | Select when data integrity assurance beyond basic EEPROM reliability is mandated, and ambient temperature stays ≤105°C |
Compared with M95256-DFMN6TP and BR25G256FJ-3GE2, AT25020B-SSPD-T offers optimal balance of AEC-Q100 Grade 1 compliance, HOLD functionality for deterministic MCU interrupt response, and minimal footprint - making it preferred for compact, high-temperature automotive nodes where 2 Kbit suffices.
Availability
AT25020B-SSPD-T is available at Aetrix Electronics and suitable for engine control units, ADAS sensor modules, and body control modules requiring stable component supply across extended automotive product lifecycles.
Supply support for AT25020B-SSPD-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with broad automotive qualification capabilities and ISO/TS 16949-certified manufacturing.
The AT250xxB family delivers SPI EEPROMs optimized for automotive environments, emphasizing AEC-Q100 compliance, wide voltage/temperature operation, and robust write-protection features for safety-critical data storage.
FAQ
What is the maximum clock frequency supported by AT25020B-SSPD-T at 3.3 V operation?
At 3.3 V, the AT25020B-SSPD-T supports up to 5 MHz clock frequency - identical to its 5 V rating. This is confirmed in the AC Characteristics table (DS20006285B, Table 4-3), where fSCK maximum is specified as 5 MHz across the full 1.7–5.5 V range. No derating is required for 3.3 V systems, enabling full-speed SPI communication with common 3.3 V MCUs.
Does AT25020B-SSPD-T support SPI Mode 1 or Mode 2?
No, AT25020B-SSPD-T explicitly supports only SPI Modes 0 and 3, as stated in the Features section and Section 5.1 of the datasheet. It samples SI on the rising edge and outputs SO on the falling edge of SCK in both modes. Modes 1 and 2 - which use opposite edge relationships - are not implemented and will result in communication failure if attempted.
How does the HOLD pin behave during an active write cycle in AT25020B-SSPD-T?
The HOLD pin has no effect on an active internal write cycle in AT25020B-SSPD-T. As documented in Section 5.3, Hold mode suspends serial communication but does not pause the EEPROM programming operation. Once a WRITE command initiates the self-timed ≤5 ms write cycle, asserting HOLD will not interrupt or delay completion - the device continues programming and asserts RDY/BSY = 1 until finished.
Can AT25020B-SSPD-T be used in a 1.8 V system without level shifters?
Yes, AT25020B-SSPD-T operates down to 1.7 V, making it fully compatible with 1.8 V logic systems. Its VIH and VIL thresholds scale with VCC (VIH ≥ 0.7×VCC, VIL ≤ 0.3×VCC), and DC characteristics including ICC and ISB are validated at 1.7 V. No level shifting is needed when interfacing with 1.8 V MCUs, reducing BOM count and board area.
What happens to the STATUS register BP bits after power cycling AT25020B-SSPD-T?
The BP1 and BP0 bits in the STATUS register of AT25020B-SSPD-T are nonvolatile and retain their last programmed value across power cycles. As noted in Section 4.6.5, these bits are unchanged at power-up because they are stored in EEPROM cells. Their state persists even after VCC dropout, ensuring consistent write protection configuration without host MCU reinitialization.
AT25020B-SSPD-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 5 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25020B-SSPD-T FAQ
1.How can I place an order for AT25020B-SSPD-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25020B-SSPD-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25020B-SSPD-T reliable?
The price and inventory of AT25020B-SSPD-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25020B-SSPD-T is usually 5 days.
3.What payment methods are accepted for AT25020B-SSPD-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25020B-SSPD-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25020B-SSPD-T?
AT25020B-SSPD-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25020B-SSPD-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25020B-SSPD-T?
For technical support, including AT25020B-SSPD-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25020B-SSPD-T requirements.
6.How does Aetrix verify that AT25020B-SSPD-T is sourced from the original manufacturer or authorized distributors?
All AT25020B-SSPD-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25020B-SSPD-T meets industry standards.
7.What is the process for return or replacement of AT25020B-SSPD-T?
All AT25020B-SSPD-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25020B-SSPD-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25020B-SSPD-T part is unused and in its original packaging.
Return procedure for AT25020B-SSPD-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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