Microchip Technology AT25080B-PU
- Part No.:
- AT25080B-PU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT25080B-PU.pdf
- Description:
- IC EEPROM 8KBIT SPI 20MHZ 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,875
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25080B-PU from Microchip Technology (formerly Atmel) is an 8-Kbit SPI serial EEPROM organized as 1024 × 8-bit memory, operating from 1.8 V to 5.5 V with 20 MHz max clock rate at 5 V, 32-byte page write capability, and hardware/software write protection. It serves as nonvolatile configuration storage in microcontroller-based industrial control modules requiring low-voltage operation and long data retention.
For engineers reviewing the AT25080B-PU datasheet, AT25080B-PU pinout, AT25080B-PU application, or AT25080B-PU equivalent, key selection criteria include SPI Mode 0/3 compatibility, 1 million write endurance, 100-year data retention, block write protection granularity (1/4, 1/2, or full array), and PDIP-8 package suitability for through-hole prototyping and legacy industrial PCBs.
Technical Context
The AT25080B-PU implements a synchronous slave SPI interface with dedicated SI/SO pins, CS-controlled selection, and HOLD pin for pausing ongoing transfers without resetting sequence state. Its status register includes nonvolatile BP0/BP1 bits for configurable block protection and WPEN bit enabling/disabling hardware write protect via the WP pin.
Internal self-timed write cycles complete in ≤5 ms with no external erase step required; all programming instructions (WREN, WRITE, WRSR) require prior write-enable latch activation, and only RDSR remains functional during active writes. The device supports standard SPI timing with tWH/tWL ≥20 ns at 5 V, and operates across –40°C to +85°C industrial temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 8192 bits (1024 × 8), sufficient for firmware boot parameters or calibration tables in resource-constrained systems |
| Interface | SPI slave with Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) support; requires only CS, SCK, SI, SO, WP, HOLD, VCC, GND |
| Supply Voltage | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level shifting |
| Max Clock Rate | 20 MHz at VCC = 5.0 V - supports high-speed configuration loading in time-critical applications |
| Write Endurance | 1,000,000 cycles - ensures reliable logging or parameter updates over product lifetime |
| Data Retention | 100 years at 25°C - guarantees long-term integrity of stored calibration or security keys |
| Page Write Size | 32 bytes - minimizes write latency per transaction while avoiding excessive overwrites on partial updates |
| Operating Temp | –40°C to +85°C - qualified for industrial environments including factory automation and outdoor metering |
Pinout & Package
AT25080B-PU uses an 8-lead JEDEC PDIP (package code 8P3) with 0.300" body width, suitable for through-hole mounting and manual soldering in development and low-volume production.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select input | Active-low enable: asserts SPI communication only when low; high-impedance SO output when high |
| SCK | Serial clock input | Master-generated clock synchronizing all SI/SO data transfers; must be low during HOLD assertion |
| SI | Serial data input | Receives opcodes (e.g., WREN, WRITE), addresses, and data; ignored during HOLD or write cycles |
| SO | Serial data output | Drives read data MSB-first; enters high-impedance state when CS high or during internal write |
| GND | Ground reference | Return path for all digital I/O and supply current; must be low-impedance to minimize noise coupling |
| VCC | Power supply | 1.8–5.5 V input powering core logic and I/O buffers; bypass capacitor required per datasheet |
| WP | Hardware write protect | Blocks status register writes when low and WPEN=1; tied high for full programmability |
| HOLD | Communication suspend | Pauses ongoing SPI transfer without resetting address counter; requires SCK low to assert/deassert |
Key Features
| Feature | Design Value |
|---|---|
| Block write protection | Configurable via status register to lock 0%, 25%, 50%, or 100% of memory - prevents accidental overwrite of critical firmware sections |
| Hardware + software write disable | WP pin and WRDI instruction independently inhibit writes - enables layered data security in field-deployed devices |
| Self-timed write cycle | No external timing control needed; 5 ms max duration eliminates need for polling delay loops in host firmware |
| Industrial temperature range | –40°C to +85°C operation - validated for use in motor drives, PLC I/O modules, and smart sensors |
| Low-power standby | ≤0.1 µA at 1.8 V - extends battery life in portable instrumentation and wireless sensor nodes |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory automation lines. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via SPI during power-up and runtime reconfiguration. Use Value: Ensures deterministic startup behavior and retains user-defined settings across power cycles and firmware updates. | Use Scenario: Holding factory-calibrated sensor offsets and gain coefficients in portable blood glucose meters and ECG monitors. IC Role / Device Role / Timing Role: Secure, long-retention parameter storage isolated from main MCU flash to prevent corruption during firmware upgrades. Use Value: Maintains measurement accuracy over 10+ years without recalibration, meeting ISO 13485 traceability requirements. |
| Smart Energy Meter Firmware Bootloader | Automotive Body Control Module Settings |
Use Scenario: Storing bootloader version, secure boot keys, and tamper-detection flags in ANSI C12.22-compliant electricity meters. IC Role / Device Role / Timing Role: Trusted configuration store accessed early in boot sequence before main application loads. Use Value: Enables secure firmware authentication and rollback prevention using write-protected memory segments. | Use Scenario: Retaining user preferences (window position, mirror angle, lighting profiles) in automotive BCMs after battery disconnect. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3 V CAN microcontroller for infrequent but persistent writes. Use Value: Guarantees settings persistence even during deep-sleep modes where main MCU supply drops below 2.0 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95080-DW | Same 8-Kbit SPI EEPROM, but rated for 5.5 V max only (no 1.8 V operation); 8-lead SOIC package standard | Lacks 1.8 V compatibility - unsuitable for ultra-low-power designs; requires level-shifting if interfacing with 1.8 V MCUs | Select M95080-DW only when system VCC is fixed at 3.3 V or 5 V and PDIP packaging is not required. |
| BR24G08FJ-WE2 | I²C interface instead of SPI; 1.7–5.5 V supply; 8-lead TSSOP; supports 1 MHz max clock at 1.7 V | Requires different MCU peripheral (I²C vs SPI); slower interface limits high-throughput configuration loading | Choose BR24G08FJ-WE2 when board layout already uses I²C bus and SPI resources are constrained. |
Compared with M95080-DW and BR24G08FJ-WE2, the AT25080B-PU uniquely combines 1.8 V operation, PDIP-8 packaging, and SPI Mode 0/3 flexibility - making it optimal for industrial prototyping, legacy 5 V systems, and mixed-voltage embedded designs where pin-compatible drop-in replacement is not required but voltage and interface alignment are critical.
Availability
AT25080B-PU is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, smart energy meters, and automotive body electronics requiring stable component supply and long-term obsolescence management.
Supply support for AT25080B-PU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT25xxx EEPROM family.
The AT25080B-PU belongs to Microchip's serial EEPROM product line, designed specifically for reliable, low-power nonvolatile storage in industrial, medical, and automotive applications where SPI interface simplicity and robust data retention are essential.
FAQ
What is the maximum clock frequency supported by the AT25080B-PU?
The AT25080B-PU supports up to 20 MHz SCK frequency at VCC = 5.0 V, 10 MHz at 2.7–5.5 V, and 5 MHz at 1.8–5.5 V. These values are specified in Table 0-4 of the datasheet and reflect guaranteed AC timing margins across voltage and temperature ranges. The AT25080B-PU must be operated within these limits to ensure reliable read/write operations and avoid setup/hold violations.
Does the AT25080B-PU require an external erase command before writing?
No, the AT25080B-PU does not require a separate erase command. All write operations are self-timed and automatically erase and program the target memory location in a single internal cycle lasting ≤5 ms. This eliminates firmware complexity associated with managing erase/write sequencing and allows immediate follow-up reads after the write cycle completes, as confirmed by monitoring the RDY bit in the status register.
How is write protection configured on the AT25080B-PU?
Write protection on the AT25080B-PU is configured using two mechanisms: software control via the WRSR instruction to set BP0/BP1 bits (selecting 0%, 25%, 50%, or 100% array protection), and hardware control via the WP pin when the WPEN bit is set to "1". Both methods can be used independently or together - for example, WP can guard against accidental writes during field service while BP bits protect firmware regions during normal operation. The AT25080B-PU status register reflects current protection state in real time.
What package type does the AT25080B-PU use, and is it RoHS compliant?
The AT25080B-PU uses an 8-lead JEDEC PDIP (plastic dual in-line package) with 0.300" body width, designated as package code 8P3. Per the ordering information table, it is explicitly marked "Lead-free/Halogen-free" and qualified for industrial temperature range (–40°C to +85°C). This makes the AT25080B-PU fully RoHS 2011/65/EU and REACH compliant, with NiPdAu lead finish as standard.
Can the AT25080B-PU operate with a 1.8 V microcontroller without level shifters?
Yes, the AT25080B-PU supports true 1.8 V operation across its full specification - including logic thresholds (VIH = 0.7×VCC, VIL = 0.3×VCC), AC timing, and DC characteristics - allowing direct connection to 1.8 V SPI peripherals without level translation. This is verified in Tables 0-3 and 0-4 of the datasheet, where parameters are characterized down to VCC = 1.8 V. The AT25080B-PU maintains full functionality and timing compliance at this voltage.
AT25080B-PU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 8Kbit
- Memory Organization:
- 1K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT25080B-PU FAQ
1.How can I place an order for AT25080B-PU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25080B-PU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25080B-PU reliable?
The price and inventory of AT25080B-PU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25080B-PU is usually 5 days.
3.What payment methods are accepted for AT25080B-PU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25080B-PU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25080B-PU?
AT25080B-PU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25080B-PU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25080B-PU?
For technical support, including AT25080B-PU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25080B-PU requirements.
6.How does Aetrix verify that AT25080B-PU is sourced from the original manufacturer or authorized distributors?
All AT25080B-PU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25080B-PU meets industry standards.
7.What is the process for return or replacement of AT25080B-PU?
All AT25080B-PU units undergo pre-shipment inspection (PSI). If there is an issue with AT25080B-PU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25080B-PU part is unused and in its original packaging.
Return procedure for AT25080B-PU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25080B-PU Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

