Microchip Technology AT25080B-XHL-B
- Part No.:
- AT25080B-XHL-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT25080B-XHL-B.pdf
- Description:
- IC EEPROM 8KBIT SPI 20MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:985
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25080B-XHL-B from Microchip Technology is an 8 Kbit SPI Serial EEPROM (1,024 × 8) in an 8-lead XDFN package, supporting SPI Modes 0 and 3, operating from 1.8V to 5.5V, with 20 MHz max clock rate at 5V, 32-byte page write capability, and industrial temperature range (−40°C to +85°C). It serves as nonvolatile configuration storage in microcontroller-based embedded systems requiring low-voltage, high-reliability data retention.
For engineers reviewing the AT25080B-XHL-B datasheet, AT25080B-XHL-B pinout, AT25080B-XHL-B application, or AT25080B-XHL-B equivalent, key selection considerations include its 1.8V–5.5V supply range, hardware/software write protection via WP pin and STATUS register, 5 ms max self-timed write cycle, 1M endurance, and 100-year data retention - critical for firmware parameter storage, calibration data logging, and secure boot configuration in space-constrained industrial designs.
Technical Context
The AT25080B-XHL-B implements a synchronous SPI slave interface with fixed MSB-first serial protocol, where SI latches on SCK rising edge and SO drives on SCK falling edge. Its internal architecture includes a high-voltage generation circuit for EEPROM programming, address register/counter, and dedicated write protection control logic tied to the nonvolatile STATUS register (WPEN, BP1, BP0 bits).
It supports dual-layer data protection: hardware-level write inhibition via the WP pin (when WPEN = 1), and software-controlled block protection (1/4, 1/2, or full array) through STATUS register configuration. The HOLD pin enables mid-transaction suspension without resetting the SPI sequence, provided SCK is low during assertion/deassertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 8 Kbits (1,024 words × 8 bits); sufficient for storing bootloader flags, sensor calibration coefficients, or device ID tables in compact MCU systems. |
| Supply Voltage Range | 1.8V to 5.5V; enables direct interfacing with 1.8V, 3.3V, and 5V logic domains without level-shifting. |
| Max Clock Frequency | 20 MHz at VCC ≥ 4.5V; supports high-throughput configuration reads in real-time control loops. |
| Page Write Size | 32 bytes; minimizes write latency versus byte-write mode and aligns with typical MCU cache line or packet buffer sizes. |
| Write Cycle Time | ≤5 ms (self-timed); eliminates need for external polling delay timers and simplifies firmware timing logic. |
| Endurance & Retention | 1,000,000 write cycles / 100 years data retention at 55°C; validated for long-life deployment in unattended industrial equipment. |
| Operating Temperature | −40°C to +85°C; qualified for use in automotive under-hood modules, factory automation controllers, and outdoor IoT gateways. |
Pinout & Package
AT25080B-XHL-B is housed in an 8-pad XDFN (eXposed Dual Flat No-lead) package, measuring 2.0 mm × 1.6 mm × 0.55 mm, with wettable flank side walls for automated optical inspection (AOI) and enhanced solder joint reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must be driven low before any SPI transaction; requires pull-up resistor (≤10 kΩ) to VCC for robust power-up behavior. |
| SO | Serial Data Output | Tri-state output delivering MSB-first data on SCK falling edge; enters high-impedance when CS is high or HOLD is asserted. |
| WP | Write-Protect | Hardware lock for STATUS register writes when WPEN = 1; allows system-level protection against accidental firmware corruption. |
| GND | Ground Reference | Primary return path for VCC and all I/O signals; must be connected to system ground plane with low-inductance routing. |
| SI | Serial Data Input | MSB-first input for opcodes, addresses, and data; sampled on SCK rising edge; ignored during HOLD or CS high. |
| SCK | Serial Clock Input | Master-generated clock synchronizing all SPI transfers; idle state must match selected SPI mode (0 or 3) before/after CS assertion. |
| HOLD | Suspend Control | Pauses ongoing SPI communication without resetting internal state; requires SCK low during assertion/deassertion to avoid timing violations. |
| VCC | Power Supply | Core supply input (1.8V–5.5V); must ramp monotonically at ≤0.1 V/µs; POR circuit ensures no spurious writes during power-up. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Compatibility | Interoperates with legacy and modern microcontrollers without protocol translation; SCK idle polarity configurable per host requirements. |
| 32-Byte Page Write | Reduces total write time by up to 32× vs. byte-write mode; ideal for updating multi-byte configuration structures atomically. |
| Hardware + Software Write Protection | WP pin blocks STATUS register writes when enabled; BP1/BP0 bits allow selective locking of memory segments - critical for secure boot partitions. |
| 5 ms Max Self-Timed Write | Eliminates need for external busy-wait loops or interrupt-driven polling; simplifies RTOS task scheduling and reduces CPU overhead. |
| Green Packaging | XDFN package is RoHS-compliant, halide-free, and lead-free; meets IPC/JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) for unlimited floor life. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register providing deterministic startup state after power loss or reset. Use Value: Ensures operational continuity without manual reconfiguration; 100-year retention guarantees data integrity over equipment lifetime. | Use Scenario: Holding sensor offset/gain coefficients and regulatory compliance logs in portable diagnostic instruments subject to strict audit trails. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter vault with hardware write-lock capability during clinical operation. Use Value: WP pin + STATUS register protection prevents runtime corruption; 1M endurance supports daily recalibration cycles for >27 years. |
| Automotive Body Control Module (BCM) | Smart Energy Meter Firmware Flags |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock status across ignition cycles in 12V automotive systems with wide supply variation. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfacing directly with 3.3V CAN microcontrollers; operates reliably down to 1.8V during cold-crank conditions. Use Value: 1.8V–5.5V range eliminates need for external regulators; −40°C to +85°C rating satisfies AEC-Q100 Grade 2 thermal requirements. | Use Scenario: Storing tariff schedules, metering constants, and firmware update signatures in utility-grade electricity meters with 15+ year field life. IC Role / Device Role / Timing Role: Trusted configuration store enabling secure OTA updates and cryptographic key management. Use Value: Block protection (BP1/BP0) isolates critical firmware metadata from user-accessible registers; 100-year retention exceeds meter certification mandates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SPI EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95080-DRMN6TP/K | 8 Kbit SPI EEPROM (STMicroelectronics); same 8-pin SOIC/TSSOP/XDFN options; 20 MHz @ 5V; but only 100 µA max standby current at 5V (vs. AT25080B-XHL-B's 10 µA). | Higher standby current limits use in battery-powered meters; lacks HOLD pin - no mid-transaction pause capability. | Select when SOIC/TSSOP preferred over XDFN and HOLD functionality is unnecessary. |
| 25AA080C-I/MNY | 8 Kbit SPI EEPROM (Microchip); identical pinout and command set; same 1.8V–5.5V range; but rated only to +70°C (vs. +85°C industrial grade). | Not qualified for extended temperature deployments; unsuitable for under-hood automotive or outdoor telecom equipment. | Select only for commercial-grade applications where ambient temperature remains below 70°C. |
Compared with M95080-DRMN6TP/K and 25AA080C-I/MNY, the AT25080B-XHL-B delivers superior low-power operation (10 µA standby), full industrial temperature support, and unique HOLD functionality - making it the optimal choice for thermally demanding, energy-sensitive, and real-time-interrupt-capable embedded systems.
Availability
AT25080B-XHL-B is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, automotive body control modules, and smart energy meters requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for AT25080B-XHL-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with global manufacturing and quality certifications including ISO 9001 and IATF 16949.
The AT25080B-XHL-B belongs to Microchip's AT25xxx family of SPI Serial EEPROMs, designed specifically for reliable, low-voltage nonvolatile storage in space-constrained, mission-critical embedded systems across industrial, automotive, and medical markets.
FAQ
What is the maximum clock frequency supported by the AT25080B-XHL-B at 1.8V?
The AT25080B-XHL-B supports a maximum SCK frequency of 5 MHz when operating at VCC = 1.8V to 5.5V, as specified in Table 4-3 of the DS20006244A datasheet. This ensures robust timing margins under low-voltage conditions while maintaining compatibility with ultra-low-power microcontrollers.
Does the AT25080B-XHL-B require external pull-up resistors on its I/O pins?
The AT25080B-XHL-B does not require external pull-ups on SI, SO, or SCK - these are driven actively by the host and device. However, a pull-up resistor (≤10 kΩ) on the CS pin is strongly recommended to ensure proper power-up behavior and prevent spurious writes, as stated in Section 2.1 of the datasheet.
How does the HOLD pin function during an active write cycle in the AT25080B-XHL-B?
The HOLD pin has no effect on an ongoing internal write cycle in the AT25080B-XHL-B; it only suspends serial communication (SI/SO/SCK interaction). As confirmed in Section 5.3, if a WRITE instruction has already initiated the self-timed 5 ms programming, asserting HOLD will pause data transfer but not halt the EEPROM cell programming itself.
What is the default state of the STATUS register after power-up for the AT25080B-XHL-B?
Upon power-up, the AT25080B-XHL-B defaults to Standby mode with WEL = 0 (write disabled), Ready/Busy = 0 (ready to accept commands), and nonvolatile bits (WPEN, BP1, BP0) retaining their last written values. The EEPROM array ships pre-programmed with 0xFFh, as documented in Section 4.6.6 of the datasheet.
Can the AT25080B-XHL-B be used as a direct replacement for the AT25080A-XHL-B?
Yes - the AT25080B-XHL-B is the enhanced revision of the AT25080A-XHL-B, with identical pinout, command set, timing, and electrical specifications. Microchip confirms backward compatibility in the DS20006244A datasheet revision history, making it a drop-in upgrade with improved reliability and qualification.
AT25080B-XHL-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 8Kbit
- Memory Organization:
- 1K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT25080B-XHL-B FAQ
1.How can I place an order for AT25080B-XHL-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25080B-XHL-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25080B-XHL-B reliable?
The price and inventory of AT25080B-XHL-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25080B-XHL-B is usually 5 days.
3.What payment methods are accepted for AT25080B-XHL-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25080B-XHL-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25080B-XHL-B?
AT25080B-XHL-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25080B-XHL-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25080B-XHL-B?
For technical support, including AT25080B-XHL-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25080B-XHL-B requirements.
6.How does Aetrix verify that AT25080B-XHL-B is sourced from the original manufacturer or authorized distributors?
All AT25080B-XHL-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25080B-XHL-B meets industry standards.
7.What is the process for return or replacement of AT25080B-XHL-B?
All AT25080B-XHL-B units undergo pre-shipment inspection (PSI). If there is an issue with AT25080B-XHL-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25080B-XHL-B part is unused and in its original packaging.
Return procedure for AT25080B-XHL-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25080B-XHL-B Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
