Microchip Technology AT25080BY6-YH-T
- Part No.:
- AT25080BY6-YH-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
AT25080BY6-YH-T.pdf
- Description:
- IC EEPROM 8KBIT SPI 8MINI MAP
- Quantity:
- Payment:

- Shipping:

Inventory:4,168
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25080BY6-YH-T from Microchip Technology (formerly Atmel) is an 8-Kbit SPI serial EEPROM organized as 1024 × 8-bit memory, operating from 1.8 V to 5.5 V, supporting 20 MHz clock rate at 5 V, featuring 32-byte page write and hardware/software write protection. It serves as nonvolatile configuration storage in industrial microcontroller systems requiring low-voltage operation and high data retention.
For engineers reviewing the AT25080BY6-YH-T datasheet, AT25080BY6-YH-T pinout, AT25080BY6-YH-T application, or AT25080BY6-YH-T equivalent, this page delivers verified electrical parameters, JEDEC-compliant MLP 2×3 package details, SPI Mode 0/3 interface behavior, block protection mapping, and validated alternative parts for design-in continuity.
Technical Context
The AT25080BY6-YH-T implements a synchronous slave SPI interface with dedicated SI/SO pins, CS-controlled selection, and HOLD/ WP pins for communication suspension and hardware-level write inhibition. Its status register (BP0/BP1/WPEN bits) enables configurable 1/4, 1/2, or full-array block protection without external logic.
All operations-including WREN, WRITE, RDSR, and WRSR-are MSB-first, initiated by CS falling edge, and fully self-timed with ≤5 ms internal write cycle. The device powers up in write-disabled state and requires explicit WREN before any programming sequence.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 8192 bits (1024 words × 8 bits), sufficient for firmware parameter tables or calibration data storage |
| Supply Voltage Range | 1.8 V to 5.5 V - supports direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level shifters |
| Max Clock Frequency | 20 MHz at VCC = 5 V - enables fast configuration loading in time-critical boot sequences |
| Page Write Size | 32 bytes - minimizes write latency versus byte-write EEPROMs while preserving endurance |
| Write Endurance | 1 million cycles - ensures reliable field updates over product lifetime in programmable logic controllers |
| Data Retention | 100 years at +25°C - guarantees long-term integrity of stored calibration coefficients or security keys |
| Operating Temperature | −40°C to +85°C - qualified for industrial ambient environments including factory automation nodes |
Pinout & Package
AT25080BY6-YH-T uses an 8-lead Ultra Thin Mini-MAP (MLP 2×3 mm, 0.5 mm pitch, DFN-style dual no-lead package), compliant with JEDEC MO-229, with exposed thermal pad (not electrically connected). Pin 1 is marked by index area on top surface.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable: drives device into active SPI mode only when low; high-Z SO when high |
| SCK | Serial Clock Input | Master-generated clock; timing-critical for tWH/tWL (20–80 ns min/max depending on VCC) |
| SI | Serial Data Input | Receives opcodes, addresses, and data; sampled on SCK rising edge in Mode 0 |
| SO | Serial Data Output | Drives read data; high-impedance when CS high or during HOLD assertion |
| GND | Ground Reference | Return path for all I/O and supply currents; must be low-inductance connection in noise-sensitive systems |
| VCC | Power Supply | Single-supply input (1.8–5.5 V); decoupling capacitor required within 10 mm of pin |
| WP | Write Protect | Hardware lock: disables status register writes when WP = low and WPEN = 1 |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting address counter; requires SCK low during assertion |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Compatibility | Interoperates with legacy 68HC11 and modern ARM Cortex-M SPI peripherals without protocol translation |
| Block Write Protection | Four protection levels (none, 1/4, 1/2, full array) controlled via nonvolatile BP0/BP1 bits in status register |
| Dual Write Protection | Combines hardware (WP pin) and software (WRSR + WREN) mechanisms to prevent accidental firmware corruption |
| Self-timed Write Cycle | No external erase step needed; internal timing eliminates need for host-side delay loops or polling overhead |
| Low Standby Current | ≤0.1 µA at 1.8 V (ISB1) - extends battery life in always-on IoT sensor nodes with infrequent config updates |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory-floor cabinets. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed during cold start and runtime reconfiguration via SPI master MCU. Use Value: Enables field-upgradable control logic without requiring external FRAM or battery-backed SRAM, reducing BOM cost and board space. |
Use Scenario: Retaining sensor offset/gain coefficients and patient-specific therapy settings across power cycles in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant memory for FDA-required audit logs and calibration history, accessed during device initialization. Use Value: Meets IEC 62304 Class C data integrity requirements via 100-year retention and hardware write lock on critical registers. |
| Automotive Body Control Module | Smart Energy Meter Firmware Parameters |
Use Scenario: Holding door lock actuation profiles, mirror position presets, and lighting dimming curves in 12 V automotive body ECUs. IC Role / Device Role / Timing Role: SPI slave storing user preferences and system defaults; powered from local 3.3 V LDO rail. Use Value: Qualified for −40°C to +85°C operation and withstands load-dump transients via robust ESD protection (±4 kV HBM). |
Use Scenario: Storing tariff schedules, metering constants, and communication credentials in ANSI C12.22-compliant smart electricity meters. IC Role / Device Role / Timing Role: Tamper-evident configuration store accessed during secure bootloader validation and OTA update staging. Use Value: Block protection prevents unauthorized modification of billing parameters while allowing field updates to non-critical firmware fields. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95080-DFMN6TP | STMicroelectronics 8-Kbit SPI EEPROM; identical 1.8–5.5 V range, 20 MHz max, MLP 2×3 package (8Y6), but uses different status register bit layout (SRWD vs WPEN) | Same industrial temperature grade and pinout; requires firmware adaptation for status register access and protection bit interpretation | Select when sourcing diversification is required and software can accommodate ST's SRWD-based write protection scheme |
| BR24G08NUX-10 | Rohm 8-Kbit I²C EEPROM; 1.7–5.5 V, 1 MHz max clock, 2×3 mm DFN package (same footprint), but uses two-wire interface instead of SPI | Requires MCU I²C peripheral instead of SPI; lacks HOLD pin and page write acceleration (only byte-write) | Choose for designs already using I²C infrastructure and where lower speed is acceptable to reduce signal routing complexity |
Compared with M95080-DFMN6TP and BR24G08NUX-10, the AT25080BY6-YH-T provides faster SPI throughput, native HOLD functionality for multi-master arbitration, and a well-established Atmel/Microchip driver ecosystem-making it optimal for real-time embedded systems demanding deterministic configuration access.
Availability
AT25080BY6-YH-T is available at Aetrix Electronics and suitable for industrial PLCs, medical infusion pumps, automotive body controllers, and smart energy meters requiring stable component supply across extended product lifecycles.
Supply support for AT25080BY6-YH-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and manufacturing continuity for the AT25xxx family of serial EEPROMs.
The AT25080B series was designed specifically for industrial and automotive subsystems needing robust, low-power, SPI-compatible nonvolatile memory with flexible hardware/software write protection-targeting applications where data integrity and long-term reliability are mandatory.
FAQ
What is the exact package type and dimensions of the AT25080BY6-YH-T?
The AT25080BY6-YH-T uses an 8-lead Ultra Thin Mini-MAP (MLP) package, also designated as DFN or 8Y6, measuring 2.00 mm × 3.00 mm with 0.50 mm pitch and 0.30 mm maximum height. It conforms to JEDEC MO-229 and features an exposed thermal pad (non-functional, not connected to GND or VCC). This compact footprint supports high-density PCB layouts in space-constrained industrial modules.
Does the AT25080BY6-YH-T support SPI Mode 0 exclusively, or are other modes compatible?
The AT25080BY6-YH-T supports both SPI Mode 0 (CPOL = 0, CPHA = 0) and Mode 3 (CPOL = 1, CPHA = 1), as explicitly stated in its official datasheet. While Mode 0 operation is fully characterized and described in timing diagrams, Mode 3 compatibility is confirmed in the Features section and validated across voltage ranges (1.8 V to 5.5 V), enabling interoperability with diverse microcontroller families.
How does the write protection mechanism work on the AT25080BY6-YH-T?
The AT25080BY6-YH-T implements dual-layer write protection: software-based via the status register's BP0/BP1 bits (configurable 1/4, 1/2, or full-array lock), and hardware-based via the WP pin. When WPEN = 1 and WP = low, all status register writes-including BP bits and WPEN itself-are blocked. This prevents accidental overwrite of critical configuration data even during firmware updates or power glitches.
What is the maximum clock frequency supported by the AT25080BY6-YH-T at 1.8 V operation?
At VCC = 1.8 V, the AT25080BY6-YH-T supports a maximum SCK frequency of 5 MHz, as specified in Table 0-4 AC Characteristics. This is lower than its 20 MHz rating at 5 V but remains sufficient for most low-power embedded applications such as sensor node configuration or battery-backed real-time clocks, ensuring reliable timing margins across the full 1.8–5.5 V supply range.
Can the AT25080BY6-YH-T be used in place of the AT25080B-TH-T in a TSSOP design?
No-the AT25080BY6-YH-T (MLP 2×3 mm) and AT25080B-TH-T (TSSOP, 4.4 mm body) have incompatible footprints, pad layouts, and thermal characteristics. They are not pin-to-pin or drop-in replacements. Migration requires PCB redesign, requalification of solder profile, and verification of signal integrity due to differing parasitic capacitance and trace length sensitivity in the MLP package.
AT25080BY6-YH-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 8Kbit
- Memory Organization:
- 1K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-Mini Map (2x3)
AT25080BY6-YH-T FAQ
1.How can I place an order for AT25080BY6-YH-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25080BY6-YH-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25080BY6-YH-T reliable?
The price and inventory of AT25080BY6-YH-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25080BY6-YH-T is usually 5 days.
3.What payment methods are accepted for AT25080BY6-YH-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25080BY6-YH-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25080BY6-YH-T?
AT25080BY6-YH-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25080BY6-YH-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25080BY6-YH-T?
For technical support, including AT25080BY6-YH-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25080BY6-YH-T requirements.
6.How does Aetrix verify that AT25080BY6-YH-T is sourced from the original manufacturer or authorized distributors?
All AT25080BY6-YH-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25080BY6-YH-T meets industry standards.
7.What is the process for return or replacement of AT25080BY6-YH-T?
All AT25080BY6-YH-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25080BY6-YH-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25080BY6-YH-T part is unused and in its original packaging.
Return procedure for AT25080BY6-YH-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25080BY6-YH-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

