Microchip Technology AT25128-10PC-1.8
- Part No.:
- AT25128-10PC-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT25128-10PC-1.8.pdf
- Description:
- IC EEPROM 128KBIT SPI 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25128-10PC-1.8 from Atmel (now Microchip Technology) is a 128 Kbit SPI serial EEPROM organized as 16,384 × 8-bit words, designed for low-voltage embedded systems. It operates from 1.8 V to 3.6 V, supports 3 MHz SPI clock rate, features hardware write protection via WP pin, and delivers 100,000 write cycles with >200 years data retention - ideal for firmware storage in battery-powered IoT sensors.
For engineers reviewing the AT25128-10PC-1.8 datasheet, AT25128-10PC-1.8 pinout, AT25128-10PC-1.8 application, or AT25128-10PC-1.8 equivalent, key selection criteria include 1.8 V operation margin, SOIC-8 package compatibility, block-level write protection (1/4, 1/2, or full array), HOLD pin suspend capability, and self-timed 5 ms typical write cycle timing.
Technical Context
The AT25128-10PC-1.8 implements a synchronous SPI slave interface with separate SI (input) and SO (output) pins, supporting only SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1). It uses an 8-bit instruction register with MSB-first transmission and requires explicit WREN before WRITE or WRSR commands.
Internal architecture includes a nonvolatile status register with BP0/BP1 bits controlling block protection, WPEN bit enabling hardware write protection via the WP pin, and READY/BUSY flag (RDY bit) indicating active internal write cycles. All programming is self-timed; no external erase step is needed.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8-bit words) - sufficient for bootloader code, calibration tables, or device configuration in space-constrained designs. |
| Supply Voltage Range | 1.8 V to 3.6 V - enables direct integration with 1.8 V or 3.3 V microcontrollers without level-shifting. |
| Max SPI Clock Frequency | 3 MHz at 1.8–3.6 V - supports fast read/write transfers while maintaining timing margins in low-power systems. |
| Write Cycle Time | 5 ms typical - defines minimum interval between successive write operations; page writes support up to 64 bytes per cycle. |
| Endurance & Retention | 100,000 write cycles / >200 years data retention - ensures long-term reliability in infrequently updated storage applications. |
| Block Protection | Configurable via status register: protect top 1/4 (0x3000–0x3FFF), top 1/2, or entire memory array - prevents accidental firmware corruption. |
| ESD Protection | >4000 V HBM - provides robust handling during board assembly and field service in industrial environments. |
Pinout & Package
AT25128-10PC-1.8 is housed in an 8-pin Plastic Dual In-line Package (PDIP), 0.300" wide, with standard through-hole mounting and JEDEC-compliant footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select | Active-low enable: initiates SPI communication sequence; high impedance on SO when CS is high. |
| 2 SCK | Serial Clock Input | Synchronizes all data transfers; must be low during HOLD assertion to pause ongoing transactions. |
| 3 SI | Serial Data Input | Receives op-codes, addresses, and write data; ignored during HOLD or when CS is high. |
| 4 SO | Serial Data Output | Drives read data; enters high-impedance state when CS is high or during internal write cycles. |
| 5 GND | Ground Reference | Primary return path for VCC and I/O signals; must be low-impedance to ensure stable SPI timing. |
| 6 VCC | Power Supply | 1.8–3.6 V input; decoupling capacitor (0.1 µF) required near pin for noise suppression. |
| 7 WP | Write Protect | Hardware lock: when WPEN=1 and WP=low, blocks status register and protected memory writes. |
| 8 HOLD | Communication Suspend | Pauses SPI transfer without resetting sequence; requires SCK low before asserting HOLD low. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode Compatibility | Supports only Modes 0 and 3 - eliminates ambiguity in clock polarity/phase configuration with host MCU. |
| Page Write Capability | 64-byte page mode - reduces total write time vs. byte-by-byte writes; address auto-increments within page boundary. |
| Multi-Level Block Protection | Four protection states (none, 1/4, 1/2, full) controlled by nonvolatile BP0/BP1 bits - enables flexible firmware partitioning. |
| Hardware + Software Write Protection | WP pin + WRSR instruction - allows layered security: physical disable during programming and runtime software control. |
| HOLD Pin Functionality | Non-disruptive suspend/resume - preserves command state across CPU interrupts or power-save transitions. |
Applications
| Industrial Sensor Calibration Storage | Medical Device Configuration Memory |
|---|---|
|
Use Scenario: Storing factory-calibrated sensor offset/gain coefficients in portable blood glucose meters or ECG monitors. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed during boot; retains values across power cycles and battery replacement. Use Value: Enables traceable, field-updatable calibration without requiring reprogramming of main MCU flash - critical for regulatory compliance and recalibration workflows. |
Use Scenario: Holding user-adjustable therapy parameters (e.g., infusion rate limits, alarm thresholds) in wearable insulin pumps. IC Role / Device Role / Timing Role: Secure parameter repository with hardware write protection activated during normal operation to prevent accidental overwrite. Use Value: Guarantees safety-critical settings persist unaltered unless explicitly unlocked via authenticated service mode - meets IEC 62304 software lifecycle requirements. |
| Smart Meter Firmware Patch Storage | Automotive Body Control Module NVM |
|
Use Scenario: Storing delta patches for firmware updates in utility smart meters deployed in remote locations with intermittent connectivity. IC Role / Device Role / Timing Role: Secondary NVM holding compressed patch images; read during update sequence and written only during secure OTA sessions. Use Value: Reduces required MCU flash size and enables field correction of minor bugs without full firmware reflashing - lowers update bandwidth and risk. |
Use Scenario: Saving seat/mirror position presets and lighting profiles in automotive BCMs operating in 1.8 V logic domains. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 1.8 V CAN/LIN transceiver logic - no level shifters needed. Use Value: Eliminates voltage translation components while meeting AEC-Q100 Grade 2 temperature range (-40°C to +105°C) via industrial-grade variant compatibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | 128 Kbit SPI EEPROM, 1.8–5.5 V, 20 MHz max clock, SOIC-8 package; higher speed but no HOLD pin. | Lacks HOLD functionality - unsuitable where interrupt-driven suspend/resume of SPI transfers is required. | Select when maximum throughput is prioritized over communication pausing capability. |
| BR24G128FJ-WE2 | 128 Kbit I²C EEPROM, 1.7–5.5 V, 1 MHz max clock, SOP-8; uses two-wire interface instead of SPI. | Requires I²C host controller and pull-up resistors; incompatible with SPI-only MCU peripherals. | Choose only if system already uses I²C bus and pin count constraints favor two-wire over four-wire interface. |
Compared with M95128-WMN6TP and BR24G128FJ-WE2, AT25128-10PC-1.8 uniquely balances 1.8 V operation, HOLD pin support, and SPI Mode 0/3 compatibility - making it optimal for resource-constrained, interrupt-sensitive embedded systems needing deterministic serial communication control.
Availability
AT25128-10PC-1.8 is available at Aetrix Electronics and suitable for industrial sensor calibration storage, medical device configuration memory, smart meter firmware patch storage, and automotive body control module NVM requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for AT25128-10PC-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation, now part of Microchip Technology, is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and wireless solutions for embedded systems.
The AT25128-10PC-1.8 belongs to the AT25xxx SPI EEPROM family, engineered for reliable, low-voltage data logging and configuration storage in industrial, medical, and automotive applications where endurance and data integrity are critical.
FAQ
What is the operating voltage range for AT25128-10PC-1.8?
The AT25128-10PC-1.8 operates from 1.8 V to 3.6 V, making it compatible with modern ultra-low-power microcontrollers and battery-operated devices. This range is distinct from the 2.7–5.5 V and 4.5–5.5 V variants in the same family, and voltage tolerance is verified per DC Characteristics Table in the official datasheet.
Does AT25128-10PC-1.8 support SPI Mode 1 or Mode 2?
No, AT25128-10PC-1.8 supports only SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), as explicitly stated in the Features section. Attempting Mode 1 or Mode 2 will result in incorrect data sampling due to mismatched clock edge alignment and phase timing.
How does the HOLD pin function during an active write cycle?
The HOLD pin has no effect during an internal write cycle (e.g., after CS goes high following a WRITE command); the device ignores HOLD until the write completes. HOLD only suspends ongoing serial communication - such as multi-byte READ or WRITE sequences - not self-timed internal operations.
Can AT25128-10PC-1.8 be used in automotive applications?
Yes - while AT25128-10PC-1.8 itself is rated for commercial temperature range (0°C to 70°C), the identical AT25128-10PI-1.8 variant is qualified for -40°C to +85°C and meets AEC-Q100 stress test requirements. Designers targeting automotive use should specify the -PI suffix version for guaranteed qualification.
What happens if the WP pin is held low without setting WPEN=1 in the status register?
If WP is low but WPEN=0, hardware write protection is disabled - all memory and status register writes remain functional. The WP pin only takes effect when WPEN=1, as defined in Table 5 of the datasheet. This allows safe board-level grounding of WP in systems where software-controlled protection is preferred.
AT25128-10PC-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 2.1 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT25128-10PC-1.8 FAQ
1.How can I place an order for AT25128-10PC-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128-10PC-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128-10PC-1.8 reliable?
The price and inventory of AT25128-10PC-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128-10PC-1.8 is usually 5 days.
3.What payment methods are accepted for AT25128-10PC-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128-10PC-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128-10PC-1.8?
AT25128-10PC-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128-10PC-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128-10PC-1.8?
For technical support, including AT25128-10PC-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128-10PC-1.8 requirements.
6.How does Aetrix verify that AT25128-10PC-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25128-10PC-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128-10PC-1.8 meets industry standards.
7.What is the process for return or replacement of AT25128-10PC-1.8?
All AT25128-10PC-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25128-10PC-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128-10PC-1.8 part is unused and in its original packaging.
Return procedure for AT25128-10PC-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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