Microchip Technology AT25128-10PI-1.8
- Part No.:
- AT25128-10PI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT25128-10PI-1.8.pdf
- Description:
- IC EEPROM 128KBIT SPI 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25128-10PI-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit SPI serial EEPROM organized as 16,384 × 8 bits, operating from 1.8 V to 5.5 V with 3 MHz max clock rate, 64-byte page write capability, and hardware/software write protection via WP and HOLD pins. It is used in industrial control modules for nonvolatile parameter storage under low-power conditions.
For engineers reviewing the AT25128-10PI-1.8 datasheet, AT25128-10PI-1.8 pinout, AT25128-10PI-1.8 application, or AT25128-10PI-1.8 equivalent, key selection criteria include 1.8V operation support, SOIC-8 package compatibility, SPI Mode 0/3 interface timing, block write protection granularity (1/4, 1/2, full array), and automotive-grade reliability specs (100K write cycles, >200-year data retention).
Technical Context
The AT25128-10PI-1.8 implements a synchronous serial peripheral interface (SPI) slave architecture with separate SI/SO lines, MSB-first data framing, and op-code–driven command execution (e.g., WREN, WRITE, RDSR). It requires CS assertion followed by an 8-bit instruction byte to initiate any operation.
Its internal status register (8-bit) controls write enable (WEN), ready/busy (RDY), block protection (BP0/BP1), and write-protect enable (WPEN) functions. Block protection is nonvolatile and configurable per Table 8 - enabling hardware-enforced read-only access to top 1/4 (0x3000–0x3FFF), top 1/2, or entire memory array when WPEN = 1 and WP = low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8) - supports firmware configuration storage in space-constrained embedded systems. |
| Supply Voltage Range | 1.8 V to 5.5 V - enables direct interfacing with 1.8V logic families and mixed-voltage microcontrollers without level shifters. |
| Max Clock Frequency | 3 MHz at 1.8V - defines maximum sustained data throughput of ~300 kB/s in page-write mode. |
| Write Cycle Time | 5 ms typical - determines minimum time between successive write commands; impacts real-time logging latency. |
| Endurance | 100,000 write cycles - specifies guaranteed reprogrammability before wear-out in field-deployed devices. |
| Data Retention | >200 years - ensures long-term validity of calibration data or security keys without refresh. |
| Operating Temp | –40°C to +85°C - validated for industrial temperature range operation without derating. |
Pinout & Package
AT25128-10PI-1.8 is supplied in an 8-lead JEDEC SOIC package (8S1), 0.150" wide body, with standard gull-wing leads and 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must be held low for entire SPI transaction; high impedance on SO when CS = high. |
| SCK | Serial Clock Input | Master-generated clock; synchronizes SI sampling and SO output; supports SPI Modes 0 and 3 only. |
| SI | Serial Data Input | Receives op-codes, addresses, and data; MSB-first; ignored during HOLD or write cycle. |
| SO | Serial Data Output | Drives read data or status bits; high-impedance when CS = high or HOLD active. |
| WP | Write Protect | Hardware lock for status register writes when WPEN = 1; no effect on unprotected memory writes if WPEN = 0. |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting sequence; requires SCK = low to assert/deassert. |
| VCC | Power Supply | 1.8–5.5 V input; decoupling capacitor required near pin for noise immunity during write cycles. |
| GND | Ground Reference | Return path for all I/O and supply currents; must be low-impedance connection to minimize ground bounce. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode Support | Compatible with Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1) - ensures interoperability with diverse MCU SPI peripherals. |
| Page Write Capability | 64-byte burst programming - reduces total write time vs. byte-by-byte writes; address auto-increments within page boundary. |
| Block Write Protection | Configurable via status register to protect top 1/4, 1/2, or full memory array - prevents accidental overwrite of critical boot or calibration data. |
| Self-timed Write Cycle | No external erase step required; internal timing eliminates need for host-side delay loops or polling overhead beyond RDSR check. |
| Low Standby Current | 0.1 µA typical at 1.8 V - enables battery-backed operation in always-on monitoring nodes with multi-year runtime. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Memory |
|---|---|
Use Scenario: Storing user-defined I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile parameter repository accessed infrequently during commissioning or maintenance; retains values across power loss. Use Value: Enables field-upgradable configuration without firmware reflashing; 1.8V operation allows direct integration with low-power ARM Cortex-M0+ controllers. | Use Scenario: Holding sensor offset/gain coefficients and regulatory compliance logs in portable diagnostic equipment requiring traceable calibration history. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage for FDA-mandated calibration records; write-protected sections prevent unauthorized modification. Use Value: Meets IEC 62304 software lifecycle requirements via hardware-enforced write protection and >200-year data retention. |
| Automotive Body Control Module | Smart Energy Meter Firmware Parameters |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock settings in 12V automotive systems with transient-suppressed 5V rail. IC Role / Device Role / Timing Role: SPI-connected EEPROM interfaced to an 8-bit automotive MCU; withstands extended temperature cycling (–40°C to +85°C). Use Value: Qualified for automotive use with 100K endurance and AEC-Q100 alignment; HOLD pin allows safe interruption during CAN bus arbitration delays. | Use Scenario: Storing tariff schedules, meter ID, and cryptographic keys in utility-grade electricity meters operating on 3.3V backup power during grid outages. IC Role / Device Role / Timing Role: Low-power, high-reliability memory for secure parameter storage; accessed only during firmware updates or key provisioning. Use Value: 0.1 µA standby current extends supercapacitor hold-up time; WP/HOLD pins support secure over-the-air update protocols. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | STMicroelectronics 128 Kbit SPI EEPROM; identical 8-lead SOIC package, 1.8–5.5 V, 20 MHz max clock, but uses different status register bit layout and lacks HOLD pin. | Higher speed suitable for high-throughput logging; absence of HOLD requires host-side transaction management during interrupts. | Select when system MCU supports faster SPI and does not require hardware suspend capability. |
| 25LC128-I/P | Microchip 128 Kbit SPI EEPROM; same pinout and voltage range, but rated for industrial temp only (–40°C to +85°C), no automotive qualification, and 10 ms typical write cycle. | Lower cost alternative for non-automotive applications where extended temperature or faster write timing is not required. | Choose for cost-sensitive industrial designs where AEC-Q100 compliance and 5 ms write time are unnecessary. |
Compared with M95128-WMN6TP and 25LC128-I/P, the AT25128-10PI-1.8 uniquely combines HOLD functionality, automotive-grade reliability, and 5 ms write timing in a JEDEC SOIC-8 package - making it optimal for interrupt-prone, safety-critical, or battery-constrained deployments.
Availability
AT25128-10PI-1.8 is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, automotive body control units, and smart energy meters requiring stable component supply across extended product lifecycles.
Supply support for AT25128-10PI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with a focus on embedded control and connectivity.
The AT25128-10PI-1.8 belongs to Microchip's legacy Atmel SPI EEPROM family, designed for reliable, low-voltage nonvolatile storage in industrial, automotive, and medical systems where data integrity and long-term retention are critical.
FAQ
What is the maximum SPI clock frequency supported by the AT25128-10PI-1.8 at 1.8 V?
The AT25128-10PI-1.8 supports up to 3 MHz SCK frequency when operating at 1.8 V, as specified in Table 4 AC Characteristics. This limit ensures setup/hold timing margins are met across process/voltage/temperature corners. Exceeding this frequency may result in read corruption or failed write verification, especially at temperature extremes or with marginal PCB layout.
Does the AT25128-10PI-1.8 require an external erase command before writing?
No, the AT25128-10PI-1.8 does not require a separate erase command. Each write operation automatically erases and programs the target byte or page. The device uses self-timed internal erase-and-program cycles, completing in 5 ms typical - eliminating host software complexity associated with discrete erase steps.
How is block write protection configured on the AT25128-10PI-1.8?
Block write protection on the AT25128-10PI-1.8 is set by writing BP0 and BP1 bits in the status register using the WRSR instruction. Valid combinations are: 00 = no protection, 01 = top 1/4 (0x3000–0x3FFF), 10 = top 1/2 (0x2000–0x3FFF), 11 = full array (0x0000–0x3FFF). These bits are nonvolatile and retain settings across power cycles.
Can the AT25128-10PI-1.8 operate with a 3.3 V microcontroller SPI interface without level shifting?
Yes, the AT25128-10PI-1.8 is fully compatible with 3.3 V SPI interfaces. Its VIH threshold is VCC × 0.7 (min), so at VCC = 3.3 V, VIH(min) = 2.31 V - safely exceeded by standard 3.3 V CMOS logic high (~3.0–3.3 V). Likewise, its VOL(max) = 0.2 V at 1.8–3.6 V supplies ensures clean low-level recognition by the MCU.
Is the AT25128-10PI-1.8 pin-compatible with newer Microchip EEPROMs like the AT25128A?
No, the AT25128-10PI-1.8 is not pin-compatible with the AT25128A. While both are 8-lead SOIC EEPROMs, the AT25128A introduces functional enhancements including faster 20 MHz operation, improved ESD robustness, and updated status register mapping. Migration requires PCB layout revision and firmware validation due to timing and command-set differences.
AT25128-10PI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 2.1 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT25128-10PI-1.8 FAQ
1.How can I place an order for AT25128-10PI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128-10PI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128-10PI-1.8 reliable?
The price and inventory of AT25128-10PI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128-10PI-1.8 is usually 5 days.
3.What payment methods are accepted for AT25128-10PI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128-10PI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128-10PI-1.8?
AT25128-10PI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128-10PI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128-10PI-1.8?
For technical support, including AT25128-10PI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128-10PI-1.8 requirements.
6.How does Aetrix verify that AT25128-10PI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25128-10PI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128-10PI-1.8 meets industry standards.
7.What is the process for return or replacement of AT25128-10PI-1.8?
All AT25128-10PI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25128-10PI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128-10PI-1.8 part is unused and in its original packaging.
Return procedure for AT25128-10PI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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