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Microchip Technology AT25128AN-10SI-2.7-T
- Part No.:
- AT25128AN-10SI-2.7-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25128AN-10SI-2.7-T.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,197
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Product details
Overview
AT25128AN-10SI-2.7-T from Microchip Technology (formerly Atmel) is a 128K-bit SPI serial EEPROM organized as 16,384 × 8 bits, operating from 2.7V to 5.5V with 20 MHz max clock rate at 5V, 64-byte page write capability, and hardware/software write protection via WP and HOLD pins. It serves as nonvolatile data storage in microcontroller-based industrial control modules requiring reliable low-voltage operation.
For engineers reviewing the AT25128AN-10SI-2.7-T datasheet, AT25128AN-10SI-2.7-T pinout, AT25128AN-10SI-2.7-T application, or AT25128AN-10SI-2.7-T equivalent, this page delivers verified electrical specs, JEDEC SOIC-8 package details, SPI Mode 0/3 timing compliance, endurance (100,000 cycles), and automotive-grade temperature support (−40°C to +85°C).
Technical Context
The AT25128AN-10SI-2.7-T implements a synchronous SPI slave interface with separate SI/SO lines, MSB-first data transfer, and chip-select–driven op-code protocol. Its internal architecture includes an 8-bit instruction register supporting WREN/WRDI/RDSR/WRSR/READ/WRITE commands and a nonvolatile status register with BP0/BP1/WPEN bits for block protection configuration.
It features dual-voltage compatibility (2.7V–5.5V), self-timed 5 ms max write cycle, and hardware suspend via HOLD pin-enabling interruption of ongoing SPI sequences without reset. Write protection operates through both dedicated WP pin (when WPEN=1) and software-controlled status register bits, allowing selective 1/4, 1/2, or full array lock.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8) - supports firmware parameter storage and calibration data logging in space-constrained designs. |
| Supply Voltage | 2.7V to 5.5V - enables direct integration with 3.3V and 5V MCU systems without level-shifting. |
| Max Clock Rate | 20 MHz at VCC = 5V - achieves up to 2.5 MB/s effective read throughput in high-speed polling applications. |
| Write Endurance | 100,000 cycles - ensures long-term reliability in frequent configuration update scenarios like industrial sensor calibration. |
| Data Retention | >100 years - guarantees persistent storage integrity across product lifecycle without refresh. |
| Operating Temp | −40°C to +85°C - certified for industrial environments including factory automation and motor control enclosures. |
| Package | 8-lead JEDEC SOIC (8S1), 150-mil width - compatible with standard PCB assembly processes and reflow profiles. |
Pinout & Package
AT25128AN-10SI-2.7-T uses an 8-lead JEDEC-standard SOIC package (8S1), 0.150" body width, with gull-wing leads and industry-standard footprint (5.00 mm × 4.00 mm). Pin 1 is marked by a notch or dot; device orientation follows JEDEC MO-001AA.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select Input | Active-low enable: drives device into SPI communication mode; high-Z SO when CS high. |
| SCK | Serial Clock Input | Master-generated clock synchronizing all SI/SO data transfers; supports Modes 0 and 3. |
| SI | Serial Data Input | Receives op-codes, addresses, and write data; ignored during HOLD or write cycle. |
| SO | Serial Data Output | Drives read data and status bits; tri-states automatically when CS high or HOLD active. |
| GND | Ground Reference | Primary return path for VCC and I/O signals; must be low-impedance connection per layout guidelines. |
| VCC | Power Supply | 2.7V–5.5V input; decoupling capacitor (0.1 µF ceramic) required within 10 mm of pin. |
| WP | Hardware Write Protect | Low-active pin blocking status register and protected memory writes when WPEN=1. |
| HOLD | Communication Suspend | Pauses ongoing SPI sequence (e.g., mid-read) without resetting address counter or losing state. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode Compatibility | Supports Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1) - interoperable with most ARM Cortex-M, PIC, and STM32 SPI peripherals. |
| Page Write Capability | 64-byte burst programming - reduces total write time by >90% vs. byte-write for contiguous data blocks like firmware headers. |
| Block Protection Granularity | Configurable 1/4, 1/2, or full array lock via status register - enables secure boot loader partitioning and user-configurable settings isolation. |
| Write Cycle Timing | Self-timed ≤5 ms max - eliminates need for external delay timers or polling overhead in host firmware. |
| Automotive Qualification | AEC-Q100 stress-tested (Grade 3); lead-free/halogen-free - suitable for under-hood telematics and ADAS subsystems. |
Applications
| Industrial PLC I/O Module | Automotive Body Control Unit |
|---|---|
Use Scenario: Storing calibrated sensor offsets and runtime fault logs in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration storage interfaced directly to ARM-based real-time controller via SPI bus. Use Value: Enables field-updatable calibration tables and persistent event history without battery backup or external FRAM. | Use Scenario: Retaining door lock actuator position profiles and lighting dimming curves across ignition cycles in BCMs. IC Role / Device Role / Timing Role: SPI EEPROM providing secure, write-protected parameter storage accessible during cold start. Use Value: Supports AEC-Q100-compliant operation and hardware WP pin locking to prevent corruption during voltage transients. |
| Medical Infusion Pump | Smart Energy Meter |
Use Scenario: Recording drug delivery history, dosage limits, and maintenance alerts in Class II medical devices. IC Role / Device Role / Timing Role: Safety-critical data logger with HOLD pin enabling safe interrupt handling during dose delivery events. Use Value: Guarantees >100-year data retention and 100,000-cycle endurance for audit-trail compliance (IEC 62304). | Use Scenario: Storing tariff schedules, metering registers, and tamper-event timestamps in ANSI C12.20-certified meters. IC Role / Device Role / Timing Role: Secure parameter store with block protection isolating firmware from utility-configurable fields. Use Value: Prevents unauthorized modification of billing parameters using dual-layer (WP pin + status register) protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-DRMN6TP/K | STMicroelectronics 128K SPI EEPROM; identical 8-lead SOIC package, 2.5–5.5V range, but rated for −40°C to +105°C only. | Lacks extended −40°C to +125°C option; no HOLD pin - requires host-side SPI transaction management during interrupts. | Select when ambient temperature stays below +105°C and HOLD functionality is not required. |
| BR24G128FJ-3GE2 | Rohm 128K SPI EEPROM; 1.7–5.5V supply, 10 MHz max clock at 1.8V, same SOIC-8 footprint, but no WP/HOLD pins - protection relies solely on software status register. | No hardware write protect or suspend capability; lower speed at low voltage - unsuitable for high-throughput logging. | Choose for ultra-low-voltage (1.7V) systems where hardware protection is managed externally. |
Compared with M95128-DRMN6TP/K and BR24G128FJ-3GE2, the AT25128AN-10SI-2.7-T uniquely combines HOLD pin suspend, dual-voltage hardware WP, and −40°C to +125°C extended grade support - critical for robust industrial and automotive deployments requiring deterministic SPI session control and fail-safe write blocking.
Availability
AT25128AN-10SI-2.7-T is available at Aetrix Electronics and suitable for industrial PLCs, automotive body control units, medical infusion pumps, and smart energy meters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AT25128AN-10SI-2.7-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product line continuity, quality assurance, and technical documentation for legacy Atmel memory devices.
The AT25128A family was designed specifically for SPI-based embedded systems needing robust, low-power, pin-efficient nonvolatile storage with hardware-assisted data integrity - targeting industrial automation, automotive subsystems, and medical instrumentation.
FAQ
What is the maximum SPI clock frequency supported by the AT25128AN-10SI-2.7-T?
The AT25128AN-10SI-2.7-T supports up to 20 MHz SCK frequency at VCC = 5.0V, 10 MHz at 2.7V–3.6V, and 5 MHz at 1.8V–2.6V. These values are specified in the AC Characteristics table and validated across the full operating temperature range (−40°C to +85°C). The AT25128AN-10SI-2.7-T must be operated within these limits to ensure reliable read/write timing margins and avoid command rejection.
Does the AT25128AN-10SI-2.7-T require an external pull-up resistor on the SO pin?
No, the AT25128AN-10SI-2.7-T has an internally weak pull-up on the SO pin during standby, but it is not intended for bus contention resolution. When multiple SPI slaves share the same SO line, an external pull-up (typically 4.7 kΩ to VCC) is required to maintain defined logic high during high-impedance states. The AT25128AN-10SI-2.7-T datasheet specifies SO output drive strength (IOL = 3.0 mA at 5V), confirming active push-pull operation during reads.
How does the HOLD pin function during an active write cycle in the AT25128AN-10SI-2.7-T?
The HOLD pin is disabled during an internal write cycle (tWC = 5 ms max) - asserting HOLD low will have no effect on the ongoing programming operation. The AT25128AN-10SI-2.7-T only responds to HOLD during active SPI communication (CS low, SCK toggling). This ensures write atomicity: once initiated, the AT25128AN-10SI-2.7-T completes the entire byte or page write before returning to ready state, regardless of HOLD state.
Can the AT25128AN-10SI-2.7-T be used in a 1.8V system?
No - the AT25128AN-10SI-2.7-T is a 2.7V–5.5V device (denoted by "-2.7" suffix). For 1.8V operation, the correct variant is AT25128AN-10SI-1.8, which guarantees full functionality down to 1.8V. Using the AT25128AN-10SI-2.7-T below 2.7V may result in undefined behavior, failed writes, or increased bit-error rates due to insufficient noise margin and internal voltage regulator headroom.
What happens if the WP pin is held low while the WPEN bit is '0' in the AT25128AN-10SI-2.7-T status register?
When WPEN = 0, the WP pin is functionally disabled - holding WP low has no effect on write operations. The AT25128AN-10SI-2.7-T allows full read/write access to the status register and unprotected memory regions regardless of WP pin state. This design permits safe installation in systems where WP is hardwired to GND, while still enabling initial configuration of BP0/BP1 bits before enabling hardware protection.
AT25128AN-10SI-2.7-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25128AN-10SI-2.7-T FAQ
1.How can I place an order for AT25128AN-10SI-2.7-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128AN-10SI-2.7-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128AN-10SI-2.7-T reliable?
The price and inventory of AT25128AN-10SI-2.7-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128AN-10SI-2.7-T is usually 5 days.
3.What payment methods are accepted for AT25128AN-10SI-2.7-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128AN-10SI-2.7-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128AN-10SI-2.7-T?
AT25128AN-10SI-2.7-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128AN-10SI-2.7-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128AN-10SI-2.7-T?
For technical support, including AT25128AN-10SI-2.7-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128AN-10SI-2.7-T requirements.
6.How does Aetrix verify that AT25128AN-10SI-2.7-T is sourced from the original manufacturer or authorized distributors?
All AT25128AN-10SI-2.7-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128AN-10SI-2.7-T meets industry standards.
7.What is the process for return or replacement of AT25128AN-10SI-2.7-T?
All AT25128AN-10SI-2.7-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25128AN-10SI-2.7-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128AN-10SI-2.7-T part is unused and in its original packaging.
Return procedure for AT25128AN-10SI-2.7-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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