Microchip Technology AT25128AN-10SU-1.8
- Part No.:
- AT25128AN-10SU-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25128AN-10SU-1.8.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,655
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25128AN-10SU-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit SPI serial EEPROM organized as 16,384 × 8 bits, operating from 1.8 V to 5.5 V, supporting 20 MHz clock rate at 5 V, and housed in an 8-lead SOIC package. It features hardware write protection via WP pin, HOLD for communication suspension, and block write protection covering 1/4, 1/2, or full memory array - used in industrial control modules requiring nonvolatile parameter storage with low-voltage operation.
For engineers reviewing the AT25128AN-10SU-1.8 datasheet, AT25128AN-10SU-1.8 pinout, AT25128AN-10SU-1.8 application, or AT25128AN-10SU-1.8 equivalent, key selection considerations include 1.8 V–5.5 V supply compatibility, 64-byte page write capability, self-timed 5 ms max write cycle, SPI Mode 0/3 support, and hardware/software data protection via WP/HOLD pins.
Technical Context
The AT25128AN-10SU-1.8 implements a synchronous SPI slave interface with separate SI (input) and SO (output) lines, MSB-first data transfer, and chip-select–driven command framing. It uses an 8-bit instruction register with op-codes for WREN, WRITE, READ, RDSR, WRSR, and WRDI - all requiring CS low assertion before transmission.
Internal architecture includes nonvolatile status register bits (WPEN, BP1/BP0, WEN, RDY) controlling write enable state, block protection level, and hardware write protect activation. The device supports automatic address increment during sequential read and wraps on overflow, enabling continuous full-memory reads without readdressing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), sufficient for firmware configuration tables or calibration data in space-constrained embedded systems. |
| Supply Voltage Range | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V logic families and backward compatibility with 3.3 V/5 V microcontrollers. |
| Max Clock Frequency | 20 MHz at VCC = 5 V - supports high-throughput parameter updates in real-time control loops. |
| Write Cycle Time | 5 ms maximum - defines minimum interval between successive byte/page writes; impacts logging latency in data acquisition systems. |
| Endurance | 1 million write cycles - ensures reliable operation over 10+ years in daily-write applications like metering or event logging. |
| Data Retention | Greater than 100 years - guarantees long-term integrity of stored calibration coefficients or security keys without refresh. |
| Operating Temperature | −40 °C to +85 °C - qualified for industrial environments including factory automation and outdoor telemetry nodes. |
Pinout & Package
AT25128AN-10SU-1.8 is supplied in an 8-lead JEDEC SOIC (package code 8S1), 0.150" wide body, RoHS-compliant and lead-free/halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must be low to accept commands; high impedance SO when CS high. |
| SCK | Serial Clock | Master-generated clock input; timing reference for SI/SO data sampling per SPI Mode 0 (CPOL=0, CPHA=0). |
| SI | Serial Data Input | Command/op-code/address/data input path; sampled on SCK rising edge. |
| SO | Serial Data Output | Read data output path; driven on SCK falling edge; high-impedance when CS high or HOLD active. |
| GND | Ground Reference | Return path for VCC and all I/O signals; requires low-impedance PCB connection to minimize noise coupling. |
| VCC | Power Supply | Single-supply input (1.8–5.5 V); decoupling capacitor (0.1 µF) required near pin for stable operation. |
| WP | Write Protect | Hardware lock for status register and protected memory blocks when WPEN=1 and WP=low. |
| HOLD | Communication Suspend | Pauses ongoing SPI transaction without resetting sequence; requires SCK low during assertion/deassertion. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Compatibility | Interoperates with both common MCU SPI controllers (e.g., ARM Cortex-M, PIC, STM32) without protocol translation. |
| 64-byte Page Write | Reduces write overhead by batching up to 64 bytes per command, cutting firmware execution time vs. single-byte writes. |
| Block Write Protection | Configurable via status register to lock top 1/4 (0x3000–0x3FFF), top 1/2, or entire array - prevents accidental firmware corruption. |
| Self-timed Write Cycle | No external erase step needed; internal timing eliminates need for host-side delay loops or polling beyond RDSR readiness check. |
| 1.8 V Low-Voltage Operation | Enables direct integration into battery-powered IoT sensors and wearables without level-shifting circuitry. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Memory |
|---|---|
Use Scenario: Storing I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory floors. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via SPI during boot and runtime parameter updates. Use Value: Ensures deterministic startup behavior after power loss and supports field recalibration without firmware reflashing. | Use Scenario: Holding sensor offset/gain coefficients and patient-specific therapy parameters in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant data storage with hardware write protection preventing unauthorized modification. Use Value: Meets IEC 62304 safety requirements for persistent medical data integrity across device lifecycle. |
| Automotive Body Control Module | Smart Energy Meter Firmware Settings |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock configurations in 12 V automotive systems with local 3.3 V regulation. IC Role / Device Role / Timing Role: SPI-connected EEPROM interfaced to an automotive-grade MCU (e.g., S32K144) for user preference persistence. Use Value: Qualified for −40 °C to +85 °C operation and withstands load-dump transients via robust power supply design. | Use Scenario: Storing tariff schedules, demand-response settings, and metering calibration constants in ANSI C12.20–compliant utility meters. IC Role / Device Role / Timing Role: High-reliability nonvolatile memory with >100-year retention for regulatory audit trails and firmware update metadata. Use Value: Eliminates need for battery-backed SRAM, reducing BOM cost and eliminating end-of-life battery replacement. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | STMicroelectronics 128 Kbit SPI EEPROM; 2.5–5.5 V supply; 20 MHz max clock; same 8-lead SOIC package; no HOLD pin. | Lacks HOLD functionality - unsuitable where master must pause transactions mid-sequence without reset. | Select when HOLD is unused and ST's qualification for extended temperature or AEC-Q100 is required. |
| BR24G128FJ-WE2 | Rohm 128 Kbit SPI EEPROM; 1.7–5.5 V supply; 10 MHz max clock; 8-lead SOP-J8 package; includes write protect via software only. | Lower max clock limits throughput; no hardware WP pin - relies solely on status register locking. | Choose for ultra-low-power designs where 10 MHz bandwidth suffices and hardware WP is not mandated. |
Compared with M95128-WMN6TP and BR24G128FJ-WE2, AT25128AN-10SU-1.8 uniquely combines 1.8 V operation, HOLD pin support, and hardware WP - making it optimal for low-voltage industrial systems requiring robust, interruptible, and physically protected configuration storage.
Availability
AT25128AN-10SU-1.8 is available at Aetrix Electronics and suitable for industrial PLCs, medical infusion pumps, automotive body control modules, and smart energy meters requiring stable component supply across extended product lifecycles.
Supply support for AT25128AN-10SU-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and continues to manufacture, qualify, and support the AT25xxx family of SPI EEPROMs with full documentation and long-term availability commitments.
The AT25128A series was designed specifically for industrial and commercial applications demanding low-voltage operation, high endurance, and flexible hardware/software data protection - targeting embedded systems where reliability and power efficiency are critical.
FAQ
What is the supply voltage range supported by AT25128AN-10SU-1.8?
AT25128AN-10SU-1.8 operates from 1.8 V to 5.5 V, enabling direct use with 1.8 V, 2.5 V, 3.3 V, and 5 V logic systems. This dual-voltage capability eliminates level shifters in mixed-supply designs and supports battery-powered applications down to 1.8 V nominal.
Does AT25128AN-10SU-1.8 support SPI Mode 3 in addition to Mode 0?
Yes, AT25128AN-10SU-1.8 explicitly supports both SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1), as confirmed in its datasheet Features section. This allows interoperability with a broader set of microcontrollers, including legacy and specialized SPI peripherals that default to Mode 3.
How does the HOLD pin function during an active SPI transaction on AT25128AN-10SU-1.8?
The HOLD pin on AT25128AN-10SU-1.8 suspends serial communication without resetting the command sequence: when asserted low while SCK is low, SO goes high-impedance and SI is ignored; resuming requires bringing HOLD high while SCK remains low. This preserves address/state context for interrupted reads or writes.
What memory protection mechanisms are available on AT25128AN-10SU-1.8?
AT25128AN-10SU-1.8 provides three-tiered protection: (1) hardware write protect via WP pin (when WPEN=1), (2) software-configurable block protection (1/4, 1/2, or full array) via status register bits BP1/BP0, and (3) write enable latch requiring WREN before any programming command - all working in concert to prevent unintended writes.
Is AT25128AN-10SU-1.8 qualified for automotive applications?
No - AT25128AN-10SU-1.8 is specified for industrial temperature range (−40 °C to +85 °C) and is not AEC-Q100 qualified. While it may function in some automotive subsystems, Microchip explicitly states in the datasheet disclaimer that "Atmel's products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life." For automotive use, select the AT25128AW-10SU-1.8 variant, which is automotive-qualified.
AT25128AN-10SU-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25128AN-10SU-1.8 FAQ
1.How can I place an order for AT25128AN-10SU-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128AN-10SU-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128AN-10SU-1.8 reliable?
The price and inventory of AT25128AN-10SU-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128AN-10SU-1.8 is usually 5 days.
3.What payment methods are accepted for AT25128AN-10SU-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128AN-10SU-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128AN-10SU-1.8?
AT25128AN-10SU-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128AN-10SU-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128AN-10SU-1.8?
For technical support, including AT25128AN-10SU-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128AN-10SU-1.8 requirements.
6.How does Aetrix verify that AT25128AN-10SU-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25128AN-10SU-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128AN-10SU-1.8 meets industry standards.
7.What is the process for return or replacement of AT25128AN-10SU-1.8?
All AT25128AN-10SU-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25128AN-10SU-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128AN-10SU-1.8 part is unused and in its original packaging.
Return procedure for AT25128AN-10SU-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25128AN-10SU-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
