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Microchip Technology AT25128AU2-10UI-1.8
- Part No.:
- AT25128AU2-10UI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-VFBGA, DSBGA
- Datasheet:
-
AT25128AU2-10UI-1.8.pdf
- Description:
- IC EEPROM 128KBIT SPI 8DBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,740
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Product details
Overview
AT25128AU2-10UI-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit SPI serial EEPROM organized as 16,384 × 8 bits, operating from 1.8 V to 5.5 V, supporting 20 MHz clock rate at 5 V, featuring hardware/software write protection and 64-byte page write capability. It serves as nonvolatile configuration storage in automotive body control modules requiring low-voltage operation and extended temperature reliability.
For engineers reviewing the AT25128AU2-10UI-1.8 datasheet, AT25128AU2-10UI-1.8 pinout, AT25128AU2-10UI-1.8 application, or AT25128AU2-10UI-1.8 equivalent, this page delivers verified electrical specs, JEDEC SOIC-8 package mapping, SPI Mode 0/3 timing compliance, block write protection behavior, and automotive-grade endurance (100,000 cycles, >100 years retention).
Technical Context
The AT25128AU2-10UI-1.8 implements a synchronous SPI slave interface with dedicated SI/SO pins, CS-controlled selection, and HOLD/ WP pins for suspend and hardware write inhibit. Its instruction set includes WREN, WRDI, RDSR, WRSR, READ, and WRITE - all MSB-first with op-code-driven command execution.
Internally, it uses a nonvolatile status register (BP1/BP0/WPEN/WEN/RDY bits) to configure top-¼/top-½/full-array block protection and enable/disable hardware write protection. All write cycles are self-timed (≤5 ms), require prior WREN, and support automatic address increment during 64-byte page writes without external erase.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8) - sufficient for firmware boot parameters, calibration data, or device ID storage in space-constrained embedded systems. |
| Supply Voltage Range | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V logic families and backward compatibility with 3.3 V/5 V microcontrollers. |
| Max Clock Frequency | 20 MHz at VCC = 5 V - supports high-throughput configuration loading in real-time control loops. |
| Write Endurance | 100,000 write cycles - meets automotive module lifetime requirements for infrequent but critical parameter updates. |
| Data Retention | >100 years at +25°C - ensures long-term integrity of stored calibration or security keys without refresh. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and automotive under-hood applications per AEC-Q100 stress test profiles. |
| Package | 8-lead JEDEC SOIC (8S1), 150-mil width - industry-standard footprint compatible with automated SMT assembly and legacy PCB layouts. |
Pinout & Package
AT25128AU2-10UI-1.8 is housed in an 8-lead JEDEC-compliant SOIC package (package code 8S1), measuring 4.9 mm × 3.9 mm × 1.75 mm, with gull-wing leads and 1.27 mm pitch. Pin 1 is marked by a beveled corner or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select Input | Active-low enable: drives device into active state only when low; SO enters high-Z when CS is high. |
| SCK | Serial Clock Input | Synchronizes all SI/SO data transfers; supports SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1). |
| SI | Serial Data Input | Receives op-codes, addresses, and write data; ignored during HOLD or when CS is high. |
| SO | Serial Data Output | Drives read data and status bits; tri-states automatically when CS goes high or during HOLD. |
| WP | Write Protect Input | Hardware lock: when WP=low and WPEN=1, blocks all status register and protected memory writes. |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting sequence; requires SCK=low to assert/deassert. |
| VCC | Power Supply | 1.8–5.5 V supply; decoupling capacitor (0.1 µF) required within 10 mm of pin for noise immunity. |
| GND | Ground Reference | Return path for VCC and all I/O; must be connected to system ground plane with low-inductance trace. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Compatibility | Interoperates with ARM Cortex-M, PIC, and STM32 microcontrollers without protocol translation logic. |
| 64-byte Page Write | Reduces firmware update time by 64× vs. byte-write; eliminates need for external buffering in host MCU. |
| Configurable Block Protection | BP1/BP0 bits allow selective locking of top-¼ (0x3000–0x3FFF), top-½, or full array - prevents accidental overwrites of critical sectors. |
| Hardware + Software Write Protection | WP pin + WRSR instruction provide dual-layer defense: physical tie-down and runtime-configurable lockdown. |
| Automotive Qualification | AEC-Q100 Grade 3 compliant (−40°C to +85°C); lead-free/halogen-free construction meets RoHS and ELV directives. |
Applications
| Automotive Body Control Unit (BCU) | Industrial PLC Configuration Storage |
|---|---|
Use Scenario: Storing seat position presets, mirror calibration offsets, and door lock logic states across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter archive with guaranteed retention over 15-year vehicle lifespan. Use Value: Eliminates battery-backed SRAM; reduces BOM cost and power domain complexity while meeting ISO 16750-2 voltage transient immunity. |
Use Scenario: Holding ladder logic firmware checksums, I/O mapping tables, and user-defined alarm thresholds in modular controllers. IC Role / Device Role / Timing Role: SPI-configurable configuration vault accessed during cold start and field firmware updates. Use Value: Enables zero-downtime parameter reprogramming via Modbus RTU over RS-485 without controller reset. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Bootloader |
Use Scenario: Archiving flow-rate calibration coefficients, motor step counts, and safety watchdog timeout values after factory calibration. IC Role / Device Role / Timing Role: Tamper-resistant calibration store with hardware write lock enabled post-calibration. Use Value: Meets IEC 62304 Class C software requirements by preventing unauthorized runtime modification of safety-critical constants. |
Use Scenario: Storing secure bootloader images and cryptographic keys used to authenticate firmware updates over DLMS/COSEM. IC Role / Device Role / Timing Role: Trusted boot root-of-trust component interfaced to secure MCU via isolated SPI bus. Use Value: Provides deterministic 5 ms max write latency for key updates while maintaining >100-year key lifetime under meter thermal cycling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-DRMN6TP/K | STMicroelectronics 128 Kbit SPI EEPROM; identical 1.8–5.5 V range, 20 MHz max, SOIC-8 package; differs in HOLD pin function (active-high vs. AT25128AU2-10UI-1.8's active-low). | Requires inverted HOLD signal routing; status register BP bit mapping differs (BP2/BP1 vs. BP1/BP0), necessitating firmware register rewrite. | Select when ST ecosystem alignment or dual-sourcing with M95xxx family is required; verify HOLD polarity and status register layout in firmware. |
| BR24G128FJ-3GE2 | Rohm 128 Kbit SPI EEPROM; same voltage range and SOIC-8 package; lower max clock (10 MHz at 1.8 V), no HOLD pin, and different write protection scheme (software-only via WRSR). | Lacks hardware suspend capability; unsuitable for systems requiring mid-transfer pause; write protection lacks WP pin fallback. | Choose for cost-sensitive consumer applications where HOLD is unused and 10 MHz bandwidth suffices; avoid in automotive or industrial real-time systems. |
Compared with M95128-DRMN6TP/K and BR24G128FJ-3GE2, the AT25128AU2-10UI-1.8 uniquely combines automotive temperature rating, active-low HOLD with defined timing constraints, and dual hardware/software write protection - making it optimal for safety-critical embedded systems requiring deterministic interruptible communication and robust data integrity.
Availability
AT25128AU2-10UI-1.8 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLCs, medical infusion pumps, and smart energy meters requiring stable component supply across multi-year production lifecycles.
Supply support for AT25128AU2-10UI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, qualification, and manufacturing continuity for the AT25xxx EEPROM family.
The AT25128A series was designed specifically for automotive and industrial applications demanding reliable nonvolatile storage at ultra-low voltages, with emphasis on SPI interoperability, extended temperature operation, and robust write protection architecture.
FAQ
What is the maximum clock frequency supported by AT25128AU2-10UI-1.8 at 1.8 V?
The AT25128AU2-10UI-1.8 supports up to 5 MHz SCK frequency when operating at 1.8 V, as specified in the AC Characteristics table for the 1.8–5.5 V voltage range. This is lower than its 20 MHz rating at 5 V but ensures timing margin and signal integrity at minimum supply.
Does AT25128AU2-10UI-1.8 support SPI Mode 1 or Mode 2?
No - the AT25128AU2-10UI-1.8 explicitly supports only SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), as confirmed in the Features section and Serial Interface description. Modes 1 and 2 are not electrically or functionally supported.
How does the WP pin interact with the WPEN bit in the status register of AT25128AU2-10UI-1.8?
In AT25128AU2-10UI-1.8, the WP pin only affects write operations when the WPEN bit (bit 7) is set to '1'. If WPEN=0, the WP pin is ignored entirely. When WPEN=1 and WP=low, writes to the status register and block-protected memory regions are disabled - providing hardware-enforced lockdown independent of firmware state.
What is the purpose of the HOLD pin on AT25128AU2-10UI-1.8, and what timing conditions apply?
The HOLD pin on AT25128AU2-10UI-1.8 suspends ongoing SPI communication without resetting the internal address counter or command state. To activate HOLD, the pin must be driven low while SCK is low; to resume, it must be driven high while SCK remains low - ensuring glitch-free pause/resume behavior aligned with SPI clock phase boundaries.
Is AT25128AU2-10UI-1.8 pin-compatible with AT25128AN-10SI-1.8?
Yes - both AT25128AU2-10UI-1.8 and AT25128AN-10SI-1.8 use the same 8-lead JEDEC SOIC (8S1) package with identical pinout, mechanical dimensions, and thermal characteristics. The 'U2' and 'N' suffixes denote different tape-and-reel packaging and moisture sensitivity levels, not pin or functional differences.
AT25128AU2-10UI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-VFBGA, DSBGA
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-dBGA (2.35x3.73)
AT25128AU2-10UI-1.8 FAQ
1.How can I place an order for AT25128AU2-10UI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128AU2-10UI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128AU2-10UI-1.8 reliable?
The price and inventory of AT25128AU2-10UI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128AU2-10UI-1.8 is usually 5 days.
3.What payment methods are accepted for AT25128AU2-10UI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128AU2-10UI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128AU2-10UI-1.8?
AT25128AU2-10UI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128AU2-10UI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128AU2-10UI-1.8?
For technical support, including AT25128AU2-10UI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128AU2-10UI-1.8 requirements.
6.How does Aetrix verify that AT25128AU2-10UI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25128AU2-10UI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128AU2-10UI-1.8 meets industry standards.
7.What is the process for return or replacement of AT25128AU2-10UI-1.8?
All AT25128AU2-10UI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25128AU2-10UI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128AU2-10UI-1.8 part is unused and in its original packaging.
Return procedure for AT25128AU2-10UI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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