Microchip Technology AT25128AW-10SU-2.7
- Part No.:
- AT25128AW-10SU-2.7
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT25128AW-10SU-2.7.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25128AW-10SU-2.7 from Microchip Technology (formerly Atmel) is a 128 Kbit SPI serial EEPROM organized as 16,384 × 8 bits, operating over 2.7V–5.5V supply, supporting 20 MHz clock rate at 5V, and featuring hardware write protection via WP pin and block-level array protection (1/4, 1/2, or full). It is used in industrial control modules for nonvolatile parameter storage with power-loss resilience.
For engineers reviewing the AT25128AW-10SU-2.7 datasheet, AT25128AW-10SU-2.7 pinout, AT25128AW-10SU-2.7 application, or AT25128AW-10SU-2.7 equivalent, key selection criteria include VCC range compatibility (2.7–5.5 V), 64-byte page write capability, HOLD/CS suspend functionality, and automotive-grade availability per ordering code suffix.
Technical Context
The AT25128AW-10SU-2.7 implements a synchronous SPI slave interface compliant with Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), with separate SI and SO pins for full-duplex operation. Its instruction set includes WREN, WRDI, RDSR, WRSR, READ, and WRITE - all MSB-first, initiated by CS low transition.
Internal architecture features a nonvolatile status register (WPEN, BP1/BP0, WEN, RDY) controlling hardware/software write protection and readiness monitoring. Block protection is implemented via BP0/BP1 bits defining protected address ranges (e.g., 0x3000–0x3FFF for top 1/4), while self-timed write cycles complete in ≤5 ms without external erase commands.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), sufficient for firmware configuration tables or calibration data in space-constrained embedded systems. |
| Supply Voltage Range | 2.7 V to 5.5 V - supports direct interfacing with 3.3 V and 5 V microcontrollers without level-shifting. |
| Max Clock Frequency | 20 MHz at VCC = 5 V - enables fast bulk reads/writes; drops to 10 MHz at 2.7 V for stable timing margin. |
| Write Endurance | 1 million write cycles - ensures long-term reliability in logging or counter applications with frequent updates. |
| Data Retention | >100 years at +25 °C - guarantees persistent storage of critical system parameters across product lifetime. |
| Page Write Size | 64 bytes - optimizes write efficiency by minimizing CS toggling and host overhead during multi-byte programming. |
| Operating Temperature | −40 °C to +85 °C - qualified for industrial environments including motor drives and sensor nodes. |
Pinout & Package
AT25128AW-10SU-2.7 is packaged in an 8-lead EIAJ SOIC (package code "SU", body width 0.200") with gull-wing leads, RoHS-compliant and halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be held low for entire SPI transaction; high impedance on SO when CS high. |
| SCK | Serial Clock Input | Master-generated clock; device operates as slave only; timing validated for tWH/tWL ≥40 ns at 2.7 V. |
| SI | Serial Data Input | Receives op-codes, addresses, and write data; MSB-first; sampled on SCK rising edge in Mode 0. |
| SO | Serial Data Output | Drives read data and status bits; high-impedance when CS high or during HOLD assertion. |
| GND | Ground Reference | Primary return path for VCC and I/O; requires low-impedance PCB connection to minimize noise coupling. |
| VCC | Power Supply | 2.7–5.5 V input; decoupling capacitor (0.1 µF ceramic) required within 10 mm of pin per layout guidelines. |
| WP | Write Protect | Hardware lock for status register and protected memory blocks when WPEN=1 and WP=low. |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting sequence; requires SCK low before asserting HOLD low. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode Compatibility | Supports both Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1), enabling interoperability with diverse MCU families including ARM Cortex-M and PIC. |
| Block Write Protection | Configurable via status register to protect top 1/4 (0x3000–0x3FFF), top 1/2 (0x2000–0x3FFF), or entire array (0x0000–0x3FFF), preventing accidental firmware corruption. |
| Hardware + Software Protection | WP pin disables writes when low *and* WPEN=1; WRDI instruction independently disables all writes regardless of WP state - dual-layer security. |
| Low-Power Standby | Standby current ≤0.5 µA at 2.7 V - suitable for battery-backed systems requiring ultra-low quiescent consumption between writes. |
| Automotive Availability | Qualified per AEC-Q100 Grade 3 (−40 °C to +85 °C); ordering code AT25128AW-10SU-2.7 explicitly denotes automotive-grade variant. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
|
Use Scenario: Storing I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers subject to frequent power cycling. IC Role / Device Role / Timing Role: Nonvolatile parameter repository accessed via SPI during boot; RDY bit confirms write completion before system initialization proceeds. Use Value: Eliminates need for external backup batteries or supercapacitors due to >100-year data retention and 1M endurance. |
Use Scenario: Retaining sensor offset/gain coefficients and user-defined therapy settings in portable infusion pumps. IC Role / Device Role / Timing Role: Secure configuration store with WP-enabled protection against runtime corruption during firmware updates. Use Value: Hardware write lock prevents unintended modification during USB-based reprogramming, meeting IEC 62304 safety requirements. |
| Automotive Body Control Module | Smart Energy Meter Firmware Patching |
|
Use Scenario: Holding door lock logic states, mirror position presets, and lighting profiles in vehicle BCMs operating across temperature extremes. IC Role / Device Role / Timing Role: AEC-Q100 qualified EEPROM interfaced to 3.3 V CAN microcontroller; HOLD pin suspends writes during CAN bus arbitration delays. Use Value: Automotive qualification and −40 °C to +85 °C operation ensure reliable function in under-hood environments. |
Use Scenario: Storing delta patches applied to meter firmware during OTA updates, where partial writes must be atomic and recoverable. IC Role / Device Role / Timing Role: Page-write-capable memory enabling 64-byte atomic updates; self-timed 5 ms writes simplify host timing design. Use Value: Eliminates need for complex wear-leveling algorithms - built-in endurance and page write reduce MCU firmware complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | 128 Kbit SPI EEPROM, 2.5–5.5 V supply, 20 MHz max, same 8-lead SOIC package but rated for industrial temp only (−40 °C to +85 °C). | Lacks AEC-Q100 qualification; no HOLD pin - unsuitable for automotive or real-time suspend-critical systems. | Select when cost sensitivity outweighs automotive qualification and HOLD functionality is unnecessary. |
| BR24G128FJ-WE2 | 128 Kbit I²C EEPROM, 1.7–5.5 V, 1 MHz max, 8-lead TSSOP; uses two-wire interface instead of SPI; no HOLD or WP pins. | Requires I²C host interface; slower write throughput; no hardware suspend or write lock - limited to low-risk configuration storage. | Choose only if system already uses I²C infrastructure and SPI bandwidth or hardware protection are not required. |
Compared with M95128-WMN6TP and BR24G128FJ-WE2, AT25128AW-10SU-2.7 uniquely combines automotive qualification, HOLD suspend capability, and dual-mode SPI compatibility - making it the only option among the three for safety-critical, real-time suspended-write applications in harsh environments.
Availability
AT25128AW-10SU-2.7 is available at Aetrix Electronics and suitable for industrial PLCs, medical infusion pumps, automotive body control modules, and smart energy meters requiring stable component supply across extended lifecycles.
Supply support for AT25128AW-10SU-2.7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT25xxx family of serial EEPROMs.
The AT25128A series was designed specifically for robust, low-voltage SPI-based nonvolatile storage in industrial and automotive systems where reliability, write protection, and wide VCC tolerance are mandatory.
FAQ
What is the maximum clock frequency supported by AT25128AW-10SU-2.7 at 3.3 V?
At 3.3 V, the AT25128AW-10SU-2.7 supports up to 10 MHz clock frequency per AC Characteristics Table 1-3, where fSCK min/max values are specified for 2.7–5.5 V range. This ensures timing compliance in mixed-voltage systems using 3.3 V microcontrollers without derating concerns.
Does AT25128AW-10SU-2.7 require an external pull-up resistor on the SO pin?
No - the SO pin of AT25128AW-10SU-2.7 is actively driven and does not require an external pull-up. It enters high-impedance state when CS is high or HOLD is asserted low, eliminating bus contention in multi-slave SPI configurations.
How is block write protection configured on AT25128AW-10SU-2.7?
Block write protection on AT25128AW-10SU-2.7 is configured by writing BP1/BP0 bits in the status register via WRSR instruction: BP1=0/BP0=1 protects top 1/4 (0x3000–0x3FFF); BP1=1/BP0=0 protects top 1/2 (0x2000–0x3FFF); BP1=1/BP0=1 protects full array (0x0000–0x3FFF).
Is AT25128AW-10SU-2.7 pin-compatible with AT25128AN-10SU-2.7?
Yes - both AT25128AW-10SU-2.7 and AT25128AN-10SU-2.7 use identical 8-lead EIAJ SOIC (SU) packaging and share identical pinout, electrical characteristics, and instruction set. The 'W' suffix denotes automotive qualification; 'N' denotes industrial grade - same footprint, different qualification level.
What happens to the AT25128AW-10SU-2.7 during a power brownout below 2.7 V?
Below 2.7 V, AT25128AW-10SU-2.7 enters undefined behavior per Absolute Maximum Ratings; internal circuitry may fail to latch correctly. The device includes built-in power-on reset (POR) and write inhibit circuitry that blocks writes during VCC ramp-up, preventing partial writes during brownout recovery.
AT25128AW-10SU-2.7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25128AW-10SU-2.7 FAQ
1.How can I place an order for AT25128AW-10SU-2.7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128AW-10SU-2.7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128AW-10SU-2.7 reliable?
The price and inventory of AT25128AW-10SU-2.7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128AW-10SU-2.7 is usually 5 days.
3.What payment methods are accepted for AT25128AW-10SU-2.7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128AW-10SU-2.7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128AW-10SU-2.7?
AT25128AW-10SU-2.7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128AW-10SU-2.7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128AW-10SU-2.7?
For technical support, including AT25128AW-10SU-2.7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128AW-10SU-2.7 requirements.
6.How does Aetrix verify that AT25128AW-10SU-2.7 is sourced from the original manufacturer or authorized distributors?
All AT25128AW-10SU-2.7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128AW-10SU-2.7 meets industry standards.
7.What is the process for return or replacement of AT25128AW-10SU-2.7?
All AT25128AW-10SU-2.7 units undergo pre-shipment inspection (PSI). If there is an issue with AT25128AW-10SU-2.7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128AW-10SU-2.7 part is unused and in its original packaging.
Return procedure for AT25128AW-10SU-2.7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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