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Microchip Technology AT25128B-XPDGV-T
- Part No.:
- AT25128B-XPDGV-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT25128B-XPDGV-T.pdf
- Description:
- IC EEPROM 128KBIT SPI 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,609
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Product details
Overview
AT25128B-XPDGV-T from Microchip Technology is a 128 Kbit (16,384 × 8) SPI serial EEPROM optimized for automotive systems, supporting AEC-Q100 Grade 1 operation from −40°C to +125°C, 2.5V–5.5V supply, and 5 MHz clock rate at 5V. It features hardware/software write protection, 64-byte page writes, and 1,000,000 write endurance for infotainment configuration storage.
For engineers reviewing the AT25128B-XPDGV-T datasheet, AT25128B-XPDGV-T pinout, AT25128B-XPDGV-T application, or AT25128B-XPDGV-T equivalent, key selection criteria include Grade 1 temperature compliance, SPI Mode 0/3 compatibility, WP/HOLD pin functionality, and block-level write protection granularity.
Technical Context
The AT25128B-XPDGV-T implements a synchronous SPI slave interface with fixed MSb-first data framing, rising-edge input sampling on SI, and falling-edge output valid on SO. Its internal architecture includes a nonvolatile STATUS register controlling BP1/BP0 block protection bits and WPEN enable, plus high-voltage generation circuitry for EEPROM cell programming.
It supports dual-voltage operation (Grade 1: 2.5–5.5V; Grade 3: 1.7–5.5V), self-timed write cycles ≤5 ms, and HOLD pin suspension of serial transfers without affecting ongoing internal writes. The device defaults to standby mode at power-up with WEL=0 and RDY/BSY=0.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbits (16,384 × 8), organized as byte-addressable EEPROM array |
| Supply voltage | 2.5V–5.5V (AEC-Q100 Grade 1), enabling direct integration with 3.3V/5V automotive MCUs |
| Operating temperature | −40°C to +125°C (Grade 1), qualified per AEC-Q100 Rev G for under-hood applications |
| Max clock frequency | 5 MHz at VCC = 5V, supporting fast configuration reads in real-time control loops |
| Write endurance | 1,000,000 cycles, sufficient for lifetime logging or calibration updates in vehicle ECUs |
| Data retention | 100 years at 55°C, ensuring firmware parameter integrity over full vehicle service life |
| Page size | 64 bytes, optimizing write throughput while minimizing bus occupancy during bulk updates |
Pinout & Package
AT25128B-XPDGV-T is housed in an 8-lead SOIC package (XPDGV suffix per Microchip part numbering), with gull-wing leads, 1.27 mm pitch, and JEDEC MS-012AC compliant outline. Pin 1 is marked by a beveled corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable: must be low before SCK edge to initiate SPI transaction; requires pull-up resistor for robust power-up behavior |
| SO | Serial Data Output | Tri-state output: drives data on falling SCK edge; high-impedance when CS high or HOLD active |
| WP | Write-Protect | Hardware lock: disables STATUS register writes when WP=low and WPEN=1; configurable via STATUS register |
| GND | Ground reference | Return path for VCC and all I/O; must be low-impedance connection to minimize noise coupling into EEPROM array |
| SI | Serial Data Input | Input-only: accepts opcodes, addresses, and data on rising SCK edge; MSb first, no internal latching without CS assertion |
| SCK | Serial Clock | Asynchronous input: defines timing for SI sampling (rising edge) and SO output (falling edge); supports SPI Modes 0 and 3 |
| HOLD | Suspend Serial Input | Pauses ongoing SPI transfer without resetting state machine; does not interrupt active write cycle; requires SCK low to activate/deactivate |
| VCC | Power supply | 2.5–5.5V input: powers logic and charge pump; requires local 100 nF decoupling capacitor per Microchip layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive under-hood environments with guaranteed operation from −40°C to +125°C |
| Hardware + software write protection | Combines dedicated WP pin with STATUS register BP1/BP0 bits to protect 1/4, 1/2, or full memory array |
| 64-byte page write mode | Reduces write time vs. byte writes: 5 ms max per page instead of per byte, improving firmware update efficiency |
| HOLD pin suspend function | Enables multi-master arbitration or MCU context switching without losing SPI transaction state or requiring re-initialization |
| 1,000,000 write cycles / 100-year retention | Supports long-term field recalibration, odometer logging, and adaptive learning without wear-out concerns |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) |
|---|---|
Use Scenario: Storing calibrated sensor offsets, fuel injection maps, and fault code history across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with deterministic 5 ms write latency and AEC-Q100 Grade 1 thermal reliability. Use Value: Enables zero-latency boot from last-known-good parameters and maintains regulatory-compliant diagnostic data for 15+ years. |
Use Scenario: Retaining camera calibration coefficients, radar fusion weights, and lane-marking model parameters after power-down. IC Role / Device Role / Timing Role: SPI-configurable EEPROM interfacing directly with ADAS SoC's QSPI controller for secure, tamper-resistant parameter storage. Use Value: Guarantees functional safety (ISO 26262 ASIL-B support via write-protection) and eliminates need for external backup battery. |
| Automotive Infotainment Head Unit | Body Control Module (BCM) |
Use Scenario: Saving user preferences (volume, EQ, display brightness), Bluetooth pairing tables, and navigation history. IC Role / Device Role / Timing Role: Low-power serial EEPROM accessed during MCU idle states; standby current <10 µA at 5V. Use Value: Extends battery-off drain budget while supporting >100,000 user setting changes over product lifetime. |
Use Scenario: Storing door lock actuator calibration, window auto-reverse thresholds, and lighting sequence patterns. IC Role / Device Role / Timing Role: Robust SPI slave with HOLD pin support for seamless handover between BCM microcontroller and CAN gateway during sleep/wake transitions. Use Value: Prevents configuration corruption during brown-out events and enables fail-safe reversion to factory defaults via WP pin tie-down. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STMicroelectronics M95128-DWDW | Same 128 Kbit density, 5 MHz speed, and SOIC-8 package; AEC-Q100 Grade 2 (−40°C to +105°C), not Grade 1 | Limited to cabin modules (infotainment, HVAC), not under-hood ECU use due to lower max temperature rating | Select when Grade 2 suffices and ST ecosystem alignment is prioritized over extended temperature margin |
| ON Semiconductor CAT25128HU4I-GT3 | Identical 128 Kbit, SOIC-8, and AEC-Q100 Grade 1 rating; supports 1.8V–5.5V range but max clock drops to 3 MHz at 1.8V | Better low-voltage compatibility for 1.8V logic domains, but reduced throughput in 5V systems versus AT25128B-XPDGV-T's 5 MHz | Prefer for mixed-voltage designs where 1.8V interface coexists with 5V peripherals; verify timing margins at target VCC |
Compared with M95128-DWDW and CAT25128HU4I-GT3, AT25128B-XPDGV-T delivers full Grade 1 thermal margin at maximum 5 MHz throughput across its entire 2.5–5.5V operating range-critical for real-time ECU parameter updates without clock derating.
Availability
AT25128B-XPDGV-T is available at Aetrix Electronics and suitable for automotive ECU design, ADAS calibration storage, and body control module configuration requiring stable component supply across extended temperature and long lifecycle requirements.
Supply support for AT25128B-XPDGV-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with broad automotive qualification expertise and ISO/TS 16949 certified manufacturing.
The AT25128B-XPDGV-T belongs to Microchip's automotive-grade serial EEPROM product line, designed specifically for AEC-Q100-compliant nonvolatile data storage in harsh-temperature electronic control units.
FAQ
What is the operating temperature range for AT25128B-XPDGV-T?
The AT25128B-XPDGV-T is rated for AEC-Q100 Grade 1 operation from −40°C to +125°C. This specification is validated across the full 2.5V–5.5V supply range and applies to all electrical characteristics including write timing, read access, and standby current. The device is intended for under-hood automotive applications where ambient temperatures exceed 105°C.
Does AT25128B-XPDGV-T support SPI Mode 3?
Yes, AT25128B-XPDGV-T supports both SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). In both modes, data is sampled on the rising edge of SCK and output on the falling edge. The difference lies only in SCK idle polarity: low for Mode 0, high for Mode 3. The datasheet details Mode 0 timing, but Mode 3 operation is fully functional and electrically characterized.
How does the HOLD pin function during an active write cycle in AT25128B-XPDGV-T?
The HOLD pin has no effect on an active internal write cycle in AT25128B-XPDGV-T. While HOLD can suspend ongoing SPI communication (e.g., mid-read or mid-command), it does not pause or abort the self-timed EEPROM programming operation once initiated. The write will complete within 5 ms regardless of HOLD state, and the RDY/BSY bit will clear upon completion.
What write protection options are available on AT25128B-XPDGV-T?
AT25128B-XPDGV-T provides dual-layer write protection: hardware via the WP pin (when WPEN=1) and software via STATUS register BP1/BP0 bits. These bits configure protection for 0%, 25%, 50%, or 100% of the memory array. WP pin action is immediate and overrides software settings, making it ideal for factory lockdown or emergency firmware freeze.
Is AT25128B-XPDGV-T RoHS compliant and lead-free?
Yes, AT25128B-XPDGV-T is RoHS compliant, lead-free, and halide-free per Microchip's green packaging policy. The SOIC package uses matte tin lead finish, and the device meets JEDEC J-STD-020 moisture sensitivity level 3 (MSL3) requirements. Full compliance documentation is available in Microchip's PCN archives and material declarations.
AT25128B-XPDGV-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 5 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT25128B-XPDGV-T FAQ
1.How can I place an order for AT25128B-XPDGV-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128B-XPDGV-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128B-XPDGV-T reliable?
The price and inventory of AT25128B-XPDGV-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128B-XPDGV-T is usually 5 days.
3.What payment methods are accepted for AT25128B-XPDGV-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128B-XPDGV-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128B-XPDGV-T?
AT25128B-XPDGV-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128B-XPDGV-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128B-XPDGV-T?
For technical support, including AT25128B-XPDGV-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128B-XPDGV-T requirements.
6.How does Aetrix verify that AT25128B-XPDGV-T is sourced from the original manufacturer or authorized distributors?
All AT25128B-XPDGV-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128B-XPDGV-T meets industry standards.
7.What is the process for return or replacement of AT25128B-XPDGV-T?
All AT25128B-XPDGV-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25128B-XPDGV-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128B-XPDGV-T part is unused and in its original packaging.
Return procedure for AT25128B-XPDGV-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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