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Microchip Technology AT25128N-10SC
- Part No.:
- AT25128N-10SC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25128N-10SC.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,996
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Product details
Overview
AT25128N-10SC from Atmel is a 128K-bit (16,384 × 8) serial SPI EEPROM in 8-pin EIAJ SOIC package, supporting 2.7V–5.5V operation, 3 MHz clock rate, 64-byte page write, and hardware/software write protection via WP and HOLD pins. It serves as nonvolatile configuration storage in industrial controllers, power supply monitors, and embedded sensor nodes requiring reliable low-voltage data retention.
For engineers reviewing the AT25128N-10SC datasheet, AT25128N-10SC pinout, AT25128N-10SC application, or AT25128N-10SC equivalent, key selection criteria include VCC range (2.7–5.5 V), 5 ms typical write cycle time, 100,000 endurance cycles, block write protection granularity (1/4, 1/2, or full array), and SPI Mode 0/3 compatibility with microcontroller host interfaces.
Technical Context
The AT25128N-10SC operates exclusively as an SPI slave device with separate SI (input) and SO (output) lines, requiring CS assertion and MSB-first 8-bit op-code framing. Its internal status register controls write enable (WEN), ready/busy (RDY), and BP0/BP1 block protection bits, all nonvolatile and programmable via WRSR instruction.
Hardware data protection is implemented through dual mechanisms: the WP pin (active-low, enabled only when WPEN=1) and software-controlled block protection levels. The HOLD pin suspends ongoing serial transfers without resetting the sequence, enabling multi-master arbitration or CPU interrupt handling during active communication.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8) - sufficient for firmware parameter tables, calibration data, or device identity storage in space-constrained designs |
| Supply Voltage Range | 2.7 V to 5.5 V - supports direct interface with 3.3 V and 5 V logic systems without level-shifting |
| Max Clock Frequency | 3 MHz - enables fast read/write throughput compatible with standard MCU SPI peripherals |
| Write Cycle Time | 5 ms typical - defines minimum interval between write commands; impacts real-time logging latency |
| Endurance | 100,000 write cycles - ensures long-term reliability in applications with frequent configuration updates |
| Data Retention | >200 years - guarantees persistent storage integrity across product lifetime without refresh |
| Operating Temperature | −40°C to +85°C - qualified for industrial environments including motor drives and outdoor instrumentation |
Pinout & Package
AT25128N-10SC is housed in an 8-pin EIAJ SOIC (8S2) package, 0.200" wide, with gull-wing leads and standard JEDEC footprint compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select | Active-low enable signal; must be low to accept SI data and drive SO output; high-Z state otherwise |
| 2 SCK | Serial Clock | Input-only synchronous timing reference; determines bit transfer rate up to 3 MHz |
| 3 SO | Serial Output | Tri-state data output for read operations; high-impedance when CS high or during HOLD |
| 4 WP | Write Protect | Hardware lock for status register writes when WPEN=1; prevents accidental configuration corruption |
| 5 HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting address counter; requires SCK low to assert/deassert |
| 6 GND | Ground Reference | Return path for VCC and all I/O signals; must be low-impedance for noise immunity |
| 7 VCC | Power Supply | Primary supply input (2.7–5.5 V); powers internal logic and memory array |
| 8 SI | Serial Input | Data input for op-codes, addresses, and write data; sampled on SCK rising edge in Mode 0 |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Support | Compatible with both common MCU SPI configurations (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), reducing host driver porting effort |
| 64-byte Page Write | Enables burst programming of contiguous bytes with single CS assertion, improving write efficiency over byte-by-byte mode |
| Block Write Protection | Configurable via status register to lock top 1/4, top 1/2, or entire memory array - isolates critical firmware parameters from runtime overwrite |
| Self-timed Write Cycle | No external erase step required; internal timing eliminates need for host wait-state polling beyond RDSR RDY-bit check |
| ESD Protection | >4000 V HBM - enhances robustness during board handling and system integration in unshielded industrial enclosures |
Applications
| Industrial PLC Configuration Storage | Smart Sensor Calibration Data Retention |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning constants, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-up and during runtime reconfiguration via SPI master. Use Value: Ensures deterministic startup behavior and field-updatable control logic without battery-backed SRAM or external backup circuitry. | Use Scenario: Holding factory-trimmed offset/gain coefficients and temperature compensation tables in MEMS pressure or humidity sensors. IC Role / Device Role / Timing Role: Read-once-at-initialization data source; write-protected after calibration to prevent drift-induced corruption. Use Value: Maintains measurement accuracy over 200+ years without recalibration, meeting ISO 9001 traceability requirements. |
| Power Supply Digital Control Memory | Medical Device Usage Log Storage |
Use Scenario: Saving operational history, fault codes, and adaptive voltage/current setpoints in digitally controlled AC/DC and DC/DC converters. IC Role / Device Role / Timing Role: Low-power SPI slave storing event-triggered logs during brown-out conditions using ISB2 = 0.2 µA standby current. Use Value: Enables root-cause analysis of intermittent failures while consuming negligible energy between events. | Use Scenario: Recording usage hours, sterilization cycles, and diagnostic self-test results in portable infusion pumps and patient monitors. IC Role / Device Role / Timing Role: Secure, tamper-resistant audit trail storage with hardware WP pin tied low to prevent unauthorized log modification. Use Value: Meets FDA 21 CFR Part 11 electronic record integrity requirements via immutable block-protected memory segments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | Same 128 Kbit density and 8-pin SOIC package; supports 5 MHz max clock vs. 3 MHz; 1.8–5.5 V supply range | Higher speed and wider voltage range suit battery-powered IoT endpoints needing faster boot-time reads | Select when system clock budget allows >3 MHz SPI or when operating below 2.7 V is required |
| 25AA128-I/P | 128 Kbit SPI EEPROM in 8-pin PDIP; rated for −40°C to +125°C; 10 ms max write cycle vs. 10 ms typical for AT25128N-10SC | Extended temperature rating supports under-hood automotive modules; PDIP simplifies prototyping | Choose for high-temp environments or legacy through-hole PCBs where SOIC rework is impractical |
Compared with M95128-WMN6TP and 25AA128-I/P, the AT25128N-10SC offers tighter 5 ms typical write timing at 2.7–5.5 V, industrial-grade −40°C to +85°C operation in compact EIAJ SOIC, and proven block-protection flexibility ideal for field-upgradable embedded systems.
Availability
AT25128N-10SC is available at Aetrix Electronics and suitable for industrial PLCs, smart sensors, digital power supplies, and medical devices requiring stable component supply, long-life data retention, and robust SPI interface compatibility.
Supply support for AT25128N-10SC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT25128N-10SC belongs to Atmel's SPI Serial EEPROM family, designed specifically for low-power, low-voltage embedded systems requiring reliable, pin-efficient nonvolatile storage with flexible hardware and software write protection.
FAQ
What is the maximum clock frequency supported by the AT25128N-10SC?
The AT25128N-10SC supports a maximum SCK clock frequency of 3 MHz across its full 2.7 V to 5.5 V supply range. This value is specified in the AC Characteristics table under fSCK for VCC = 2.7–5.5 V. Exceeding this limit may result in unreliable data capture or command rejection, especially at lower VCC voltages where internal timing margins shrink.
Does the AT25128N-10SC require an external erase cycle before writing?
No, the AT25128N-10SC does not require a separate erase cycle. All write operations-including byte and page writes-are self-timed and automatically erase and program the target memory location internally. The device only requires a preceding WREN instruction to set the Write Enable Latch before any WRITE or WRSR command, and the write completes autonomously in ≤10 ms.
How is block write protection configured on the AT25128N-10SC?
Block write protection on the AT25128N-10SC is configured by setting BP1 and BP0 bits in the status register using the WRSR instruction. These bits define protection levels: 00 = no protection, 01 = top 1/4 (0x3000–0x3FFF), 10 = top 1/2 (0x2000–0x3FFF), and 11 = full array (0x0000–0x3FFF). WPEN must be '1' for hardware WP pin to enforce these settings.
What is the function of the HOLD pin on the AT25128N-10SC?
The HOLD pin on the AT25128N-10SC suspends ongoing SPI communication without resetting the internal address counter or command state. When asserted low while SCK is low, it places SO in high-impedance and ignores SI inputs until deasserted. This allows the host MCU to service higher-priority interrupts mid-transfer and resume seamlessly, preserving data coherency in real-time systems.
Is the AT25128N-10SC pin-compatible with other members of the AT25xxx family?
Yes, the AT25128N-10SC shares identical 8-pin EIAJ SOIC pinout and SPI interface protocol with AT25256 variants and other AT25xxx devices in the same package type (e.g., AT25128N-10SI, AT25256W-10SC). However, memory size, timing parameters, and status register bit definitions differ-so firmware must validate device ID or capacity before assuming functional equivalence.
AT25128N-10SC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 3 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25128N-10SC FAQ
1.How can I place an order for AT25128N-10SC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25128N-10SC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25128N-10SC reliable?
The price and inventory of AT25128N-10SC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25128N-10SC is usually 5 days.
3.What payment methods are accepted for AT25128N-10SC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25128N-10SC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25128N-10SC?
AT25128N-10SC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25128N-10SC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25128N-10SC?
For technical support, including AT25128N-10SC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25128N-10SC requirements.
6.How does Aetrix verify that AT25128N-10SC is sourced from the original manufacturer or authorized distributors?
All AT25128N-10SC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25128N-10SC meets industry standards.
7.What is the process for return or replacement of AT25128N-10SC?
All AT25128N-10SC units undergo pre-shipment inspection (PSI). If there is an issue with AT25128N-10SC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25128N-10SC part is unused and in its original packaging.
Return procedure for AT25128N-10SC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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