Microchip Technology AT25160AN-10SU-1.8
- Part No.:
- AT25160AN-10SU-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25160AN-10SU-1.8.pdf
- Description:
- IC EEPROM 16KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,194
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25160AN-10SU-1.8 from Microchip Technology (formerly Atmel) is a 16-Kbit SPI serial EEPROM organized as 2048 × 8 bits, operating from 1.8 V to 5.5 V, supporting 20 MHz clock rate at 5 V, featuring 32-byte page write and hardware/software write protection. It serves as nonvolatile configuration storage in industrial control modules requiring low-voltage operation and high data retention.
For engineers reviewing the AT25160AN-10SU-1.8 datasheet, AT25160AN-10SU-1.8 pinout, AT25160AN-10SU-1.8 application, or AT25160AN-10SU-1.8 equivalent, key selection criteria include 1.8 V minimum supply, SPI Mode 0/3 compatibility, block write protection granularity, self-timed 5 ms write cycle, and JEDEC SOIC-8 packaging with RoHS compliance.
Technical Context
The AT25160AN-10SU-1.8 implements a synchronous serial peripheral interface (SPI) slave architecture with separate SI/SO pins, MSB-first data transfer, and op-code–driven command execution. It uses an 8-bit instruction register supporting WREN, WRDI, RDSR, WRSR, READ, and WRITE instructions.
Its memory array is partitioned into four segments for block protection (BP1/BP0), enabling selective locking of 0%, 25%, 50%, or 100% of the 2048-word space. The WP pin and status register bit WPEN jointly control hardware write protection, while HOLD suspends ongoing communication without resetting the sequence.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 16 Kbit (2048 × 8 bits) - provides sufficient space for firmware parameters, calibration data, or device identity in compact embedded systems. |
| Supply Voltage Range | 1.8 V to 5.5 V - enables direct integration with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains without level-shifting. |
| Max Clock Frequency | 20 MHz at VCC = 5 V - supports fast configuration reads during system boot or runtime updates. |
| Page Write Size | 32 bytes - allows efficient burst writes while minimizing bus occupancy and power consumption per transaction. |
| Write Cycle Time | 5 ms max - defines worst-case latency for nonvolatile commit; critical for time-constrained state-save operations. |
| Endurance & Retention | 1 million write cycles / 100 years data retention - ensures long-term reliability in field-deployed equipment with frequent parameter logging. |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial environments including factory automation and outdoor telemetry nodes. |
Pinout & Package
AT25160AN-10SU-1.8 is supplied in an 8-lead JEDEC SOIC package (8S1), 0.150" wide body, RoHS-compliant, green finish. Dimensions: 5.00 mm × 4.00 mm × 1.50 mm (L × W × H), lead pitch 1.27 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be low to accept commands; high impedance on SO when CS is high. |
| SCK | Serial Clock | Input-only master-generated clock; timing-critical for setup/hold compliance in SPI Mode 0/3. |
| SI | Serial Data Input | Command/address/data input path; MSB-first; ignored during HOLD or write cycle. |
| SO | Serial Data Output | Read data output; high-impedance when CS high or during internal write; supports bus sharing. |
| GND | Ground Reference | Return path for all I/O and supply currents; requires low-impedance PCB connection to minimize noise coupling. |
| VCC | Power Supply | Single-supply input; decoupling capacitor (0.1 µF) required near pin for stable operation across voltage range. |
| WP | Write Protect | Hardware lock for status register and protected memory blocks when WPEN = 1; tied high for full write access. |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting address counter; requires SCK low during assertion/deassertion. |
Key Features
| Feature | Design Value |
|---|---|
| SPI Mode 0 & 3 Support | Compatible with both common microcontroller SPI configurations, eliminating need for mode-specific firmware adaptation. |
| Block Write Protection | Four configurable protection levels (none, 1/4, 1/2, full array) via nonvolatile BP0/BP1 bits-enables secure boot code and calibration storage. |
| Hardware + Software Write Control | WP pin and WRSR instruction jointly manage protection; WPEN bit allows flexible system-level write-enable policy deployment. |
| Self-Timed Write Cycle | No external erase step required; automatic internal timing eliminates host MCU polling overhead beyond RDSR READY check. |
| Low Standby Current | < 0.1 µA at 1.8 V - extends battery life in always-on sensor nodes or energy-harvesting applications. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration EEPROM interfacing directly with ARM Cortex-M3/M4 microcontrollers via SPI Mode 0 at 10 MHz. Use Value: Ensures parameter persistence across power cycles and firmware updates; 1.8 V operation supports low-power sleep modes without backup battery. | Use Scenario: Retaining sensor offset/gain coefficients and patient-specific therapy settings in portable infusion pumps and diagnostic monitors. IC Role / Device Role / Timing Role: Secure, tamper-resistant data storage with hardware write protection enabled during normal operation to prevent accidental overwrites. Use Value: Meets IEC 62304 Class C software safety requirements via 1M endurance and 100-year retention; RoHS-compliant SOIC-8 simplifies medical-grade PCB assembly. |
| Automotive Body Control Module | Smart Energy Meter Firmware Settings |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock behavior in 12 V automotive systems with local 3.3 V regulation. IC Role / Device Role / Timing Role: SPI EEPROM accessed by Infineon AURIX TC2xx MCU during startup; WP pin tied to MCU GPIO for dynamic protection control. Use Value: –40 °C to +85 °C rating ensures reliability under hood temperature extremes; 32-byte page writes reduce CAN bus interrupt latency during configuration load. | Use Scenario: Storing tariff schedules, meter ID, and cryptographic keys in ANSI C12.22–compliant smart electricity meters with dual-supply design. IC Role / Device Role / Timing Role: Low-voltage (1.8 V) serial EEPROM co-powered with real-time clock; HOLD pin used to pause reads during RF transmission bursts. Use Value: Enables single-supply operation from supercapacitor backup during mains outage; block protection isolates keys from user-modifiable tariff data. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95160-DRMN6TP/K | STMicroelectronics 16 Kbit SPI EEPROM; identical 1.8–5.5 V range, 20 MHz max, SOIC-8, but uses different status register layout and lacks HOLD pin. | Supports same industrial temperature range but requires firmware adaptation for status register read/write sequences and no suspend capability. | Select when HOLD functionality is unused and ST's qualification documentation aligns with program requirements. |
| BR24G16NUX-10 | Rohm 16 Kbit SPI EEPROM; 1.7–5.5 V range, 10 MHz max, same SOIC-8 footprint, includes built-in error correction (ECC) and write-cycle endurance monitoring. | Lower max clock limits throughput; ECC adds data integrity assurance but increases command overhead; suited for high-reliability data logging. | Prefer where bit-error resilience is mandated and 10 MHz interface speed suffices; verify ECC handling in host firmware stack. |
Compared with M95160-DRMN6TP/K and BR24G16NUX-10, AT25160AN-10SU-1.8 offers unique HOLD pin support for deterministic SPI suspension and a proven block protection scheme with four discrete protection levels-critical for systems requiring concurrent communication and configuration integrity.
Availability
AT25160AN-10SU-1.8 is available at Aetrix Electronics and suitable for industrial control systems, medical diagnostics equipment, and automotive body electronics requiring stable component supply, long-lifecycle support, and RoHS-compliant manufacturing.
Supply support for AT25160AN-10SU-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with a focus on embedded control and connectivity.
The AT25160AN-10SU-1.8 belongs to Microchip's legacy serial EEPROM product line, designed specifically for reliable, low-voltage nonvolatile storage in resource-constrained embedded systems where SPI interface simplicity and robust data retention are essential.
FAQ
What is the maximum clock frequency supported by AT25160AN-10SU-1.8 at 1.8 V supply?
At 1.8 V supply, the AT25160AN-10SU-1.8 supports up to 5 MHz clock frequency, as specified in Table 1-3 AC Characteristics. This is lower than its 20 MHz maximum at 5 V, reflecting reduced timing margins at minimum voltage. System designs must configure the SPI master accordingly to ensure tWH, tWL, and other timing parameters remain within specification across temperature and voltage corners.
Does AT25160AN-10SU-1.8 support SPI Mode 1 or Mode 2?
No, AT25160AN-10SU-1.8 explicitly supports only SPI Modes 0 (CPOL = 0, CPHA = 0) and 3 (CPOL = 1, CPHA = 1), as stated in the Features section. It does not support Mode 1 or Mode 2. Attempting to use unsupported modes will result in incorrect data sampling due to mismatched clock polarity and phase alignment with SI/SO transitions.
How is block write protection configured on AT25160AN-10SU-1.8?
Block write protection on AT25160AN-10SU-1.8 is configured by writing BP1 and BP0 bits in the status register using the WRSR instruction. These nonvolatile bits define four protection levels: 00 = no protection, 01 = protect top 25% (addresses 0600–07FFh), 10 = protect top 50% (0400–07FFh), 11 = full array protection (0000–07FFh). WPEN bit must be set to enable hardware protection via the WP pin.
What is the function of the HOLD pin on AT25160AN-10SU-1.8?
The HOLD pin on AT25160AN-10SU-1.8 suspends ongoing SPI communication without resetting the internal address counter or command state. When asserted low while SCK is low, it places SO in high-impedance and ignores SI inputs. Resuming requires bringing HOLD high while SCK remains low. This enables time-critical host tasks (e.g., interrupt servicing) without losing serial context-critical in real-time embedded systems using AT25160AN-10SU-1.8.
Is AT25160AN-10SU-1.8 pin-compatible with AT25160AN-10SU-2.7?
Yes, AT25160AN-10SU-1.8 and AT25160AN-10SU-2.7 share identical SOIC-8 pinout, package dimensions, and electrical interface. The only difference is the minimum operating voltage: 1.8 V vs. 2.7 V. Both support 1.8–5.5 V and 2.7–5.5 V ranges respectively, meaning AT25160AN-10SU-1.8 can replace AT25160AN-10SU-2.7 in any design, but not vice versa in 1.8 V systems.
AT25160AN-10SU-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 16Kbit
- Memory Organization:
- 2K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25160AN-10SU-1.8 FAQ
1.How can I place an order for AT25160AN-10SU-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25160AN-10SU-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25160AN-10SU-1.8 reliable?
The price and inventory of AT25160AN-10SU-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25160AN-10SU-1.8 is usually 5 days.
3.What payment methods are accepted for AT25160AN-10SU-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25160AN-10SU-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25160AN-10SU-1.8?
AT25160AN-10SU-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25160AN-10SU-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25160AN-10SU-1.8?
For technical support, including AT25160AN-10SU-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25160AN-10SU-1.8 requirements.
6.How does Aetrix verify that AT25160AN-10SU-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25160AN-10SU-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25160AN-10SU-1.8 meets industry standards.
7.What is the process for return or replacement of AT25160AN-10SU-1.8?
All AT25160AN-10SU-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25160AN-10SU-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25160AN-10SU-1.8 part is unused and in its original packaging.
Return procedure for AT25160AN-10SU-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25160AN-10SU-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
