Microchip Technology AT25320AN-10SI-1.8
- Part No.:
- AT25320AN-10SI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25320AN-10SI-1.8.pdf
- Description:
- IC EEPROM 32KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,423
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Product details
Overview
AT25320AN-10SI-1.8 from Microchip Technology (formerly Atmel) is a 32-Kbit SPI serial EEPROM organized as 4096 × 8-bit memory, supporting 1.8V to 5.5V supply, 20 MHz clock at 5V, and 32-byte page write mode. It features hardware/software write protection, automotive-grade extended temperature operation (−40°C to +125°C), and is used in industrial control modules for nonvolatile parameter storage.
For engineers reviewing the AT25320AN-10SI-1.8 datasheet, AT25320AN-10SI-1.8 pinout, AT25320AN-10SI-1.8 application, or AT25320AN-10SI-1.8 equivalent, key selection considerations include low-voltage 1.8V operation, block write protection granularity (1/4, 1/2, or full array), HOLD pin suspend capability, and TSSOP-8 package compatibility with space-constrained PCB layouts.
Technical Context
The AT25320AN-10SI-1.8 operates as an SPI slave device with MSB-first transmission, supporting Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1). Its internal architecture includes an 8-bit instruction register, status register with WPEN, BP1/BP0, WEN, and RDY bits, and automatic address increment during sequential reads.
It implements self-timed internal write cycles (max 5 ms), requires explicit WREN before WRITE, and supports HOLD pin suspension without resetting the serial sequence. Block protection is configured via nonvolatile status register bits, and hardware write protection is enabled only when WPEN=1 and WP pin is low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 32 Kbit (4096 × 8-bit), enabling storage of firmware calibration data or device configuration tables |
| Supply Voltage Range | 1.8V to 5.5V - supports direct interface with 1.8V logic systems without level shifters |
| Max Clock Frequency | 20 MHz at VCC = 5.0V - enables fast parameter loading in real-time control loops |
| Page Write Size | 32 bytes - reduces write overhead versus byte-wise programming; prevents partial-page corruption |
| Write Endurance | 1 million cycles - suitable for logging applications with frequent updates (e.g., energy meter kWh counters) |
| Data Retention | 100 years at 25°C - ensures long-term reliability in unattended infrastructure equipment |
| Operating Temperature | −40°C to +125°C - qualified for under-hood automotive and industrial motor drive environments |
Pinout & Package
AT25320AN-10SI-1.8 is housed in an 8-lead JEDEC SOIC (8S1) package, 0.150" wide, with standard gull-wing leads and 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be held low for entire SPI transaction; high impedance on SO when CS high |
| SCK | Serial Clock | Input-only clock; synchronizes SI input and SO output; supports up to 20 MHz at 5V |
| SI | Serial Data Input | Receives op-codes, addresses, and data; MSB first; ignored during HOLD or write cycle |
| SO | Serial Data Output | Drives read data; tri-states when CS high or HOLD active; valid within tV after SCK edge |
| GND | Ground Reference | Primary return path for VCC current and signal references; must be low-impedance |
| VCC | Power Supply | 1.8V–5.5V input; decoupling capacitor required near pin to suppress switching noise |
| WP | Write Protect | Hardware lock for status register and protected memory blocks when WPEN=1 and WP low |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting state; requires SCK low to assert/deassert |
Key Features
| Feature | Design Value |
|---|---|
| 1.8V–5.5V Operation | Eliminates need for external voltage translators in mixed-supply systems (e.g., 1.8V MCU + 3.3V peripherals) |
| Block Write Protection | Configurable via status register to protect 0%, 25%, 50%, or 100% of memory - isolates critical boot code from accidental overwrite |
| HOLD Pin Functionality | Enables time-critical MCU interrupts without losing SPI context - essential for deterministic real-time response |
| Self-timed Write Cycle | No external timing control needed; RDSR polling confirms completion - simplifies firmware design and reduces CPU load |
| Automotive Grade Qualification | Meets AEC-Q100 stress test requirements for temperature cycling and HTOL - validated for engine control units and ADAS sensors |
Applications
| Industrial PLC Configuration Storage | Automotive Body Control Module |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via SPI during power-up and runtime reconfiguration. Use Value: Enables field-upgradable control logic without requiring EEPROM replacement; 100-year retention ensures decades of unattended operation. | Use Scenario: Saving seat position presets, mirror angles, and lighting profiles in vehicle body control units. IC Role / Device Role / Timing Role: SPI-connected parameter store synchronized with CAN bus commands and ignition state transitions. Use Value: −40°C to +125°C rating guarantees reliable recall of user preferences across all climate conditions and under-hood thermal stress. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Patching |
Use Scenario: Holding flow-rate calibration coefficients and safety limit tables in Class II medical devices requiring traceable parameter history. IC Role / Device Role / Timing Role: Secure, write-protected memory segment storing FDA-auditable calibration data with hardware WP enforcement. Use Value: Block protection prevents unauthorized modification; 1M endurance supports daily recalibration logs over 10+ years. | Use Scenario: Storing encrypted firmware patches and tariff schedule updates in utility-grade electricity meters with remote OTA capability. IC Role / Device Role / Timing Role: High-reliability data vault accessed during secure boot and update verification sequences. Use Value: 32-byte page writes minimize flash wear during frequent small updates; 1.8V operation extends battery life in backup-powered meters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95320-DRMN6TP/K | 32 Kbit SPI EEPROM, 1.8V–5.5V, but uses different status register bit layout and lacks HOLD pin | Requires firmware adaptation for protection control and no suspend capability during SPI transfers | Select if HOLD functionality is unused and legacy STMicro software stack is already deployed |
| BR24G32FJ-3GE2 | 32 Kbit I²C EEPROM, 1.7V–5.5V, 1 MHz max clock, no SPI interface or HOLD pin | Requires MCU I²C peripheral instead of SPI; slower write throughput and no communication pause feature | Choose for designs constrained to I²C buses or where lower pin count (2-wire vs 4-wire) outweighs speed and suspend needs |
Compared with M95320-DRMN6TP/K and BR24G32FJ-3GE2, the AT25320AN-10SI-1.8 uniquely delivers SPI Mode 0/3 compatibility, HOLD-based interrupt handling, and unified 1.8V–5.5V operation - making it optimal for real-time embedded systems needing deterministic, low-voltage, suspend-capable nonvolatile storage.
Availability
AT25320AN-10SI-1.8 is available at Aetrix Electronics and suitable for industrial control systems, automotive body electronics, medical device calibration storage, and smart meter firmware patching requiring stable component supply and long-term lifecycle support.
Supply support for AT25320AN-10SI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog components, and memory solutions, with a focus on embedded control and connectivity.
The AT25320AN-10SI-1.8 belongs to Microchip's AT25xxx family of SPI serial EEPROMs, designed specifically for robust, low-power, and low-voltage nonvolatile data storage in automotive, industrial, and medical applications.
FAQ
What is the maximum clock frequency supported by the AT25320AN-10SI-1.8?
The AT25320AN-10SI-1.8 supports up to 20 MHz SCK frequency at VCC = 5.0V, 10 MHz at VCC = 2.7V, and 5 MHz at VCC = 1.8V. These values are specified in the AC Characteristics table and reflect guaranteed timing margins across temperature and voltage ranges. The AT25320AN-10SI-1.8 must be operated within these limits to ensure reliable read/write operations and avoid setup/hold violations.
Does the AT25320AN-10SI-1.8 require a separate erase command before writing?
No, the AT25320AN-10SI-1.8 does not require a separate erase command. All write operations are self-timed and automatically erase and program the target location in a single internal cycle. The device only requires a preceding WREN instruction to set the Write Enable Latch before any WRITE or WRSR command. This eliminates erase latency and simplifies firmware implementation compared to parallel EEPROMs.
How is block write protection configured on the AT25320AN-10SI-1.8?
Block write protection on the AT25320AN-10SI-1.8 is configured by setting BP1 and BP0 bits in the nonvolatile status register using the WRSR instruction. Valid combinations are: 00 (no protection), 01 (protect top 1/4), 10 (protect top 1/2), or 11 (protect entire array). Protection applies only to memory addresses - the status register itself remains writable unless WPEN=1 and WP pin is low.
What is the function of the HOLD pin on the AT25320AN-10SI-1.8?
The HOLD pin on the AT25320AN-10SI-1.8 suspends ongoing SPI communication without resetting the internal state or address counter. When asserted low while SCK is low, it places SO in high-impedance and ignores SI inputs until deasserted. This allows the host MCU to service higher-priority interrupts and resume the exact same transaction - a critical capability for deterministic real-time systems using the AT25320AN-10SI-1.8.
Is the AT25320AN-10SI-1.8 compatible with both SPI Mode 0 and Mode 3?
Yes, the AT25320AN-10SI-1.8 explicitly supports SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), as stated in its Features section. This dual-mode compatibility allows seamless integration with diverse microcontrollers including legacy 68HC11 derivatives (Mode 0) and modern ARM Cortex-M devices (often defaulting to Mode 3), without requiring hardware or firmware workarounds in the AT25320AN-10SI-1.8 interface layer.
AT25320AN-10SI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25320AN-10SI-1.8 FAQ
1.How can I place an order for AT25320AN-10SI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25320AN-10SI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25320AN-10SI-1.8 reliable?
The price and inventory of AT25320AN-10SI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25320AN-10SI-1.8 is usually 5 days.
3.What payment methods are accepted for AT25320AN-10SI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25320AN-10SI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25320AN-10SI-1.8?
AT25320AN-10SI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25320AN-10SI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25320AN-10SI-1.8?
For technical support, including AT25320AN-10SI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25320AN-10SI-1.8 requirements.
6.How does Aetrix verify that AT25320AN-10SI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25320AN-10SI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25320AN-10SI-1.8 meets industry standards.
7.What is the process for return or replacement of AT25320AN-10SI-1.8?
All AT25320AN-10SI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25320AN-10SI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25320AN-10SI-1.8 part is unused and in its original packaging.
Return procedure for AT25320AN-10SI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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