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Microchip Technology AT25320B-XPDGV-T

Name: AT25320B-XPDGV-T
Brand: Microchip Technology
SKU: AT25320B-XPDGV-T
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: AT25320B-XPDGV-T

Manufacturer:: Microchip Technology

Category:: Memory

Package:: 8-TSSOP (0.173", 4.40mm Width)

Datasheet:: AT25320B-XPDGV-T.pdf

Description:: IC EEPROM 32KBIT SPI 5MHZ 8TSSOP

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Product details

Overview

AT25320B-XPDGV-T from Microchip Technology is a 32 Kbit (4,096 × 8) SPI-compatible automotive-grade serial EEPROM with AEC-Q100 Grade 1 qualification (-40°C to +125°C), 5 MHz max clock rate at 5V, 32-byte page write capability, and hardware/software write protection via WP pin and STATUS register. It serves as nonvolatile configuration storage in engine control units, ADAS sensor modules, and battery management systems.

For engineers reviewing the AT25320B-XPDGV-T datasheet, AT25320B-XPDGV-T pinout, AT25320B-XPDGV-T application, or AT25320B-XPDGV-T equivalent, key selection criteria include Grade 1 temperature compliance, 1.7–5.5 V supply flexibility, 1M write endurance, 100-year data retention, and SPI Mode 0/3 interoperability with microcontroller peripherals.

Technical Context

The AT25320B-XPDGV-T implements a synchronous SPI slave interface with fixed MSb-first data framing, rising-edge input sampling (SI), and falling-edge output valid timing (SO). Its internal architecture includes a high-voltage generation circuit for EEPROM programming, a STATUS register with nonvolatile BP1/BP0 block protection bits, and a Power-on Reset (POR) circuit ensuring stable initialization before command acceptance.

It supports dual voltage grades: Grade 1 (2.5–5.5 V, -40°C to +125°C) and Grade 3 (1.7–5.5 V, -40°C to +85°C); the XPDGV-T variant is specified for Grade 1 operation. Write cycles are self-timed with ≤5 ms maximum duration, and the HOLD pin enables pause/resume of ongoing SPI transfers without resetting the sequence or affecting active writes.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory size	32 Kbits (4,096 × 8 bytes) - sufficient for firmware patch storage, calibration tables, or vehicle configuration profiles in ECUs.
Interface	SPI Modes 0 and 3 - compatible with most ARM Cortex-M, Renesas RH850, and Infineon AURIX microcontrollers without protocol translation.
Max clock frequency	5 MHz at VCC = 5.0 V - enables sub-100 µs byte reads and efficient page writes in real-time automotive diagnostics.
Write endurance	1,000,000 cycles - supports frequent logging or runtime parameter updates over 15+ years of vehicle service life.
Data retention	100 years at TA = 55°C - ensures long-term integrity of safety-critical calibration data without refresh mechanisms.
Operating temperature	-40°C to +125°C (AEC-Q100 Grade 1) - qualified for under-hood placement in powertrain and chassis control modules.
Supply voltage range	2.5 V to 5.5 V - interfaces directly with 3.3 V or 5 V MCU I/O domains without level-shifting components.
Page size	32 bytes - balances write speed and granularity for partial updates of CAN message buffers or sensor offset tables.

Pinout & Package

AT25320B-XPDGV-T uses an 8-lead SOIC package (3.9 mm × 4.9 mm, 1.27 mm pitch), RoHS-compliant and green (halide-free). Pin functions are identical across SOIC, TSSOP, and UDFN variants per Microchip DS20006310A.

Pin/Terminal	Circuit Role	Design Meaning
CS	Chip Select	Active-low enable; must transition high→low before SCK to initiate SPI frame; requires pull-up resistor (≤10 kΩ) for robust power-up behavior.
SO	Serial Data Output	Tri-state output; drives data on falling edge of SCK; high-impedance when CS high or HOLD active.
WP	Write-Protect	Hardware lock for STATUS register writes when WPEN=1; tied high for full functionality or grounded for factory-safe default configuration.
GND	Ground reference	System ground return path; connects to exposed pad in UDFN; critical for noise immunity in automotive EMI environments.
SI	Serial Data Input	Accepts opcodes, addresses, and data on rising edge of SCK; MSb-first framing required for all instructions including WREN, READ, WRITE.
SCK	Serial Clock	Master-generated clock; idle low in Mode 0 (XPDGV-T default); timing parameters (tWH/tWL ≥40 ns) constrain max trace length in PCB layout.
HOLD	Suspend Serial Input	Pauses ongoing SPI transfer without resetting state; asserted during SCK low; preserves internal address pointer and command context.
VCC	Power supply	2.5–5.5 V input; internal POR circuit enforces 100 µs delay after stable VCC before accepting first command.

Key Features

Feature	Design Value
AEC-Q100 Grade 1 qualification	Validated for -40°C to +125°C operation with extended reliability testing - eliminates need for external thermal derating in engine bay applications.
Block write protection (BP1/BP0)	Configurable 1/4, 1/2, or full array hardware lock - prevents accidental overwrite of critical boot code or safety parameters during field firmware updates.
32-byte page write mode	Reduces average write time by >8× vs. byte-write; enables efficient storage of multi-byte CAN frames or ADC calibration vectors in single transaction.
WP and HOLD dual-control pins	Independent hardware-level suspend (HOLD) and write inhibit (WP) - allows safe debugging pauses and failsafe write blocking without software intervention.
100-year data retention	Guaranteed at 55°C ambient - meets ISO 26262 ASIL-B requirements for persistent storage of fault logs and diagnostic trouble codes (DTCs).
Green (RoHS/halide-free) packaging	Complies with automotive ELV Directive and JIGS-001; supports lead-free reflow profiles up to 260°C peak temperature.

Applications

Engine Control Unit (ECU)	Advanced Driver Assistance Systems (ADAS)
Use Scenario: Storing adaptive fuel trim values, knock sensor learning offsets, and emission calibration maps that update during vehicle operation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory interfacing directly with the ECU's SPI master peripheral; retains data across ignition cycles. Use Value: Enables closed-loop engine optimization without requiring external backup power or supercapacitors due to 100-year retention and Grade 1 thermal stability.	Use Scenario: Holding camera lens distortion coefficients, radar object classification thresholds, and lane detection model parameters in front-facing ADAS cameras. IC Role / Device Role / Timing Role: SPI-configurable parameter store synchronized to MCU boot sequence; accessed during system initialization prior to sensor fusion. Use Value: Supports over-the-air (OTA) calibration updates via secure SPI commands while maintaining ASIL-B data integrity through BP1/BP0 block locking.
Battery Management System (BMS)	Electronic Power Steering (EPS)
Use Scenario: Recording cell voltage imbalance history, temperature gradient logs, and SOC/SOH estimation coefficients across charge/discharge cycles. IC Role / Device Role / Timing Role: High-endurance EEPROM used for cyclic logging; withstands >1M write cycles typical in 10-year EV battery lifetime. Use Value: Eliminates need for wear-leveling firmware or external FRAM by delivering 1M cycle endurance at automotive temperature extremes.	Use Scenario: Storing torque sensor zero-point compensation, motor phase advance tables, and fail-safe steering angle limits in EPS control modules. IC Role / Device Role / Timing Role: Safety-critical configuration memory with hardware write protection (WP pin + BP bits) preventing unauthorized modification during CAN-based diagnostics. Use Value: Meets ISO 26262 functional safety requirements via dual-layer protection: hardware (WP) and software (STATUS register BP bits).

Engine Control Unit (ECU)

Advanced Driver Assistance Systems (ADAS)

Use Scenario: Storing adaptive fuel trim values, knock sensor learning offsets, and emission calibration maps that update during vehicle operation.

IC Role / Device Role / Timing Role: Nonvolatile configuration memory interfacing directly with the ECU's SPI master peripheral; retains data across ignition cycles.

Use Value: Enables closed-loop engine optimization without requiring external backup power or supercapacitors due to 100-year retention and Grade 1 thermal stability.

Use Scenario: Holding camera lens distortion coefficients, radar object classification thresholds, and lane detection model parameters in front-facing ADAS cameras.

IC Role / Device Role / Timing Role: SPI-configurable parameter store synchronized to MCU boot sequence; accessed during system initialization prior to sensor fusion.

Use Value: Supports over-the-air (OTA) calibration updates via secure SPI commands while maintaining ASIL-B data integrity through BP1/BP0 block locking.

Battery Management System (BMS)

Electronic Power Steering (EPS)

Use Scenario: Recording cell voltage imbalance history, temperature gradient logs, and SOC/SOH estimation coefficients across charge/discharge cycles.

IC Role / Device Role / Timing Role: High-endurance EEPROM used for cyclic logging; withstands >1M write cycles typical in 10-year EV battery lifetime.

Use Value: Eliminates need for wear-leveling firmware or external FRAM by delivering 1M cycle endurance at automotive temperature extremes.

Use Scenario: Storing torque sensor zero-point compensation, motor phase advance tables, and fail-safe steering angle limits in EPS control modules.

IC Role / Device Role / Timing Role: Safety-critical configuration memory with hardware write protection (WP pin + BP bits) preventing unauthorized modification during CAN-based diagnostics.

Use Value: Meets ISO 26262 functional safety requirements via dual-layer protection: hardware (WP) and software (STATUS register BP bits).

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
M95320-DRMN3TP/K	32 Kbit SPI EEPROM, same 8-lead SOIC, but AEC-Q100 Grade 3 only (-40°C to +85°C); no HOLD pin; 20 MHz max clock at 5V.	Limited to cabin or less thermally demanding locations; lacks suspend capability for debug-safe SPI interruption.	Select when Grade 3 temperature suffices and higher clock speed is prioritized over HOLD functionality.
BR24G32FJ-3GE2	32 Kbit I²C EEPROM (not SPI), 8-lead TSSOP, AEC-Q100 Grade 1, 1 MHz max clock, 1.7–5.5 V; integrated write protect.	Requires I²C bus resources and different MCU peripheral configuration; slower interface limits high-frequency logging use cases.	Choose only if existing platform uses I²C infrastructure and SPI pins are unavailable or contested.

Compared with M95320-DRMN3TP/K and BR24G32FJ-3GE2, the AT25320B-XPDGV-T uniquely combines Grade 1 temperature rating, HOLD pin support, and SPI Mode 0/3 compatibility - making it the only option among the three qualified for under-hood real-time control applications requiring both thermal resilience and debug-safe communication suspension.

Availability

AT25320B-XPDGV-T is available at Aetrix Electronics and suitable for engine control units, ADAS sensor modules, battery management systems, electronic power steering, and automotive infotainment head units requiring stable component supply across extended product lifecycles.

Supply support for AT25320B-XPDGV-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with deep expertise in automotive-grade IC design and AEC-Q100 qualification processes.

The AT25320B-XPDGV-T belongs to Microchip's AT25xxxB automotive serial EEPROM family, engineered specifically for reliable nonvolatile data storage in harsh-temperature automotive subsystems where functional safety and long-term data integrity are mandatory.

FAQ

What is the operating temperature range certified for the AT25320B-XPDGV-T?

The AT25320B-XPDGV-T is AEC-Q100 qualified to Grade 1, with a certified operating temperature range of -40°C to +125°C. This specification is validated per DS20006310A and applies to the XPDGV-T variant's 8-lead SOIC package. It is intended for under-hood deployment in engine control, transmission, and braking modules where ambient temperatures exceed +85°C.

Does the AT25320B-XPDGV-T support SPI Mode 3, and how does it differ from Mode 0 in practice?

Yes, the AT25320B-XPDGV-T supports both SPI Mode 0 and Mode 3. In Mode 0, SCK idles low when CS is deasserted; in Mode 3, SCK idles high. Both modes sample SI on the rising edge and drive SO on the falling edge of SCK. The AT25320B-XPDGV-T requires matching SCK idle state before and after each CS assertion - mismatched idle states will cause communication failure.

How does the HOLD pin function during an active write cycle in the AT25320B-XPDGV-T?

The HOLD pin has no effect on an ongoing internal write cycle in the AT25320B-XPDGV-T. While HOLD can pause SPI command sequences (e.g., mid-READ or mid-WRITE instruction), it does not interrupt or suspend the self-timed EEPROM programming operation once initiated. The write completes autonomously within ≤5 ms regardless of HOLD state, preserving data integrity.

What is the factory default state of the STATUS register in the AT25320B-XPDGV-T?

At shipment, the AT25320B-XPDGV-T has the STATUS register configured with WPEN = 0 (write-protection disabled), BP1 = 0 and BP0 = 0 (no array protection), WEL = 0 (write latch reset), and RDY/BSY = 0 (ready state). The EEPROM array itself is pre-programmed with 0xFFh (all bits set) - a known erased state usable for initialization checks.

Can the AT25320B-XPDGV-T be used with a 1.8 V microcontroller I/O interface?

No - the AT25320B-XPDGV-T is rated for Grade 1 operation from 2.5 V to 5.5 V only. Although the broader AT25xxxB family includes Grade 3 variants supporting 1.7 V, the XPDGV-T suffix explicitly denotes the Grade 1 version. Using it below 2.5 V violates electrical specifications and may result in unreliable read/write operations or STATUS register corruption.

AT25320B-XPDGV-T Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Series:: -

Package/Case:: 8-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 32Kbit

Memory Organization:: 4K x 8

Memory Interface:: SPI

Clock Frequency:: 5 MHz

Write Cycle Time - Word, Page:: 5ms

Access Time:: -

Voltage - Supply:: 2.5V ~ 5.5V

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 8-TSSOP

AT25320B-XPDGV-T FAQ

1.How can I place an order for AT25320B-XPDGV-T through Aetrix?

Please submit a Request for Quotation (RFQ) for AT25320B-XPDGV-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT25320B-XPDGV-T reliable?

The price and inventory of AT25320B-XPDGV-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25320B-XPDGV-T is usually 5 days.

3.What payment methods are accepted for AT25320B-XPDGV-T?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25320B-XPDGV-T transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT25320B-XPDGV-T?

AT25320B-XPDGV-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT25320B-XPDGV-T order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT25320B-XPDGV-T?

For technical support, including AT25320B-XPDGV-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25320B-XPDGV-T requirements.

6.How does Aetrix verify that AT25320B-XPDGV-T is sourced from the original manufacturer or authorized distributors?

All AT25320B-XPDGV-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25320B-XPDGV-T meets industry standards.

7.What is the process for return or replacement of AT25320B-XPDGV-T?

All AT25320B-XPDGV-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25320B-XPDGV-T, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT25320B-XPDGV-T part is unused and in its original packaging.

Return procedure for AT25320B-XPDGV-T:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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