Microchip Technology AT25640AN-10SI-1.8-T
- Part No.:
- AT25640AN-10SI-1.8-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25640AN-10SI-1.8-T.pdf
- Description:
- IC EEPROM 64KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,726
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25640AN-10SI-1.8-T from Microchip Technology (formerly Atmel) is a 64 Kbit SPI serial EEPROM organized as 8192 × 8-bit memory, supporting 1.8V to 5.5V supply, 20 MHz clock at 5V, 32-byte page write, and hardware/software write protection via WP pin and status register. It serves in automotive control modules requiring nonvolatile parameter storage under extended temperature.
For engineers reviewing the AT25640AN-10SI-1.8-T datasheet, AT25640AN-10SI-1.8-T pinout, AT25640AN-10SI-1.8-T application, or AT25640AN-10SI-1.8-T equivalent, key selection criteria include 1.8V operation capability, block write protection granularity (1/4, 1/2, full array), self-timed 5 ms max write cycle, industrial-grade −40°C to +85°C rating, and JEDEC SOIC-8 package compatibility.
Technical Context
The AT25640AN-10SI-1.8-T operates as an SPI slave device with fixed 3-wire interface (CS, SCK, SI/SO), supports SPI modes 0 and 3, and uses MSB-first data framing. Its internal architecture includes an 8-bit instruction register, nonvolatile status register (WPEN, BP1/BP0, WEN, RDY), and automatic address incrementing during sequential read.
Write operations require explicit WREN instruction prior to WRITE or WRSR; all writes are self-timed with no external erase cycle. Block protection is implemented via two nonvolatile BP bits controlling four memory segments, while WP pin functionality is gated by the WPEN bit in the status register.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8192 × 8-bit), enabling storage of firmware calibration tables or device configuration data |
| Supply Voltage Range | 1.8V to 5.5V - supports direct interfacing with 1.8V logic systems without level shifting |
| Max Clock Frequency | 20 MHz at VCC = 5.0V - enables high-throughput parameter updates in real-time control loops |
| Page Write Size | 32 bytes - optimizes write efficiency for burst configuration writes while minimizing write-cycle overhead |
| Write Cycle Time | 5 ms maximum - defines worst-case latency for nonvolatile commit, critical for fail-safe state logging |
| Endurance & Retention | 1 million write cycles / 100 years data retention - ensures long-term reliability in automotive ECU and industrial PLC applications |
| Operating Temperature | −40°C to +85°C - qualified for under-hood automotive and factory-floor industrial environments |
Pinout & Package
AT25640AN-10SI-1.8-T is housed in an 8-lead JEDEC SOIC (8S1) package: 0.150" wide body, gull-wing leads, 1.27 mm pitch, 4.8–5.0 mm width, 5.79–6.20 mm length, 1.35–1.75 mm height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be low to accept SPI commands; high-Z SO when CS high |
| SCK | Serial Clock | Input-only master-generated clock; timing defines setup/hold windows for SI/SO |
| SI | Serial Data Input | Receives op-codes, addresses, and write data; ignored during HOLD or write cycle |
| SO | Serial Data Output | Tri-state output delivering read data or status bits; high-Z when CS high or HOLD active |
| WP | Write Protect | Hardware lock for status register and protected memory blocks when WPEN = 1 and WP = low |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting sequence; requires SCK low to assert/deassert |
| VCC | Power Supply | 1.8V–5.5V input; powers internal logic and memory array; decoupling capacitor required |
| GND | Ground | Reference return path for all I/O and internal circuitry; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| 1.8V Low-Voltage Operation | Enables direct integration with ultra-low-power microcontrollers and battery-backed systems without voltage translation |
| Four-Level Block Write Protection | Allows selective locking of 0%, 25%, 50%, or 100% of memory via nonvolatile BP0/BP1 bits - prevents accidental overwrites of critical calibration data |
| Hardware + Software Write Protection | Combines WP pin (physical lock) and WREN/WRSR instructions (logical control) for defense-in-depth data integrity |
| Self-Timed Write Cycle | Eliminates need for external timing control or polling delay - simplifies firmware implementation and reduces CPU load |
| Automotive-Grade Qualification | Meets AEC-Q100 stress test requirements for temperature cycling, humidity, and ESD - suitable for engine control units and ADAS modules |
Applications
| Engine Control Unit (ECU) | Industrial PLC Configuration Storage |
|---|---|
|
Use Scenario: Storing fuel map coefficients, sensor offset calibrations, and fault code history across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter repository accessed via SPI during boot and runtime; retains data through 12V brownouts. Use Value: Enables field-updatable calibration without reprogramming MCU flash; 100-year retention ensures lifetime data integrity. |
Use Scenario: Holding user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers. IC Role / Device Role / Timing Role: Dedicated configuration EEPROM interfaced to ARM Cortex-M host; updated only during commissioning or maintenance. Use Value: Isolates volatile program memory from persistent settings, allowing firmware upgrades without losing site-specific configuration. |
| Medical Infusion Pump Settings | Smart Meter Firmware Patch Storage |
|
Use Scenario: Securing drug library definitions, dose limits, and audit logs in Class II medical devices requiring regulatory traceability. IC Role / Device Role / Timing Role: Tamper-resistant storage with WP-enabled protection; accessed only by authenticated service mode. Use Value: Block write protection prevents unauthorized modification of safety-critical parameters; 1M endurance supports frequent recalibration. |
Use Scenario: Storing delta patches for firmware updates in utility smart meters deployed in remote locations with limited connectivity. IC Role / Device Role / Timing Role: Secondary nonvolatile store holding verified patch binaries until validated and applied to main flash. Use Value: Enables secure, atomic firmware updates with rollback capability; 1.8V operation extends battery life during OTA download phases. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95640-DW | STMicroelectronics 64 Kbit SPI EEPROM; identical 1.8–5.5V range, 20 MHz max, SOIC-8, but uses different status register layout and lacks HOLD pin | No HOLD functionality limits use in multi-master or interrupt-driven SPI systems requiring pause/resume capability | Select AT25640AN-10SI-1.8-T when HOLD support or Atmel-compatible status register behavior is required |
| BR24G64FJ-3GE2 | Rohm 64 Kbit SPI EEPROM; supports 1.6–5.5V, 10 MHz max, TSSOP-8, includes built-in error correction (ECC) and write-cycle suspend | ECC improves data integrity in high-noise industrial environments; lower speed limits throughput in high-bandwidth logging | Choose BR24G64FJ-3GE2 where radiation-hardened data integrity outweighs speed needs; retain AT25640AN-10SI-1.8-T for legacy Atmel design continuity and HOLD requirement |
Compared with M95640-DW and BR24G64FJ-3GE2, the AT25640AN-10SI-1.8-T uniquely combines HOLD pin support, Atmel-standard status register mapping, and proven automotive qualification - making it optimal for designs requiring deterministic SPI pause capability and established supply chain validation.
Availability
AT25640AN-10SI-1.8-T is available at Aetrix Electronics and suitable for automotive control units, industrial PLCs, and medical infusion pumps requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant nonvolatile memory.
Supply support for AT25640AN-10SI-1.8-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT25xxx family of serial EEPROMs.
The AT25640AN-10SI-1.8-T belongs to Microchip's legacy Atmel SPI EEPROM product line, engineered for robust, low-voltage nonvolatile storage in automotive, industrial, and medical systems where data integrity and long-term reliability are mandatory.
FAQ
What is the operating voltage range of the AT25640AN-10SI-1.8-T?
The AT25640AN-10SI-1.8-T operates from 1.8V to 5.5V, enabling direct interface with 1.8V, 2.5V, 3.3V, and 5V microcontrollers without level shifters. This dual-range capability is confirmed in the DC Characteristics table under VCC1 parameter, with standby current as low as <0.1 µA at 1.8V - critical for battery-powered applications.
Does the AT25640AN-10SI-1.8-T support SPI Mode 0 and Mode 3?
Yes, the AT25640AN-10SI-1.8-T explicitly supports SPI Modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), as stated in the Features section. Its timing diagrams (e.g., Synchronous Data Timing for Mode 0) and AC characteristics confirm compatibility with both configurations, ensuring interoperability with diverse host controllers including 68HC11 and modern ARM-based MCUs.
How does the block write protection work on the AT25640AN-10SI-1.8-T?
The AT25640AN-10SI-1.8-T implements block write protection using two nonvolatile BP0 and BP1 bits in its status register, enabling four protection levels: none, 1/4 array (0x1800–0x1FFF), 1/2 array (0x1000–0x1FFF), or full array (0x0000–0x1FFF). Protection is enforced during WRITE and WRSR instructions, and WP pin interaction depends on WPEN bit state - all defined in Tables 4 and 5 of the datasheet.
What is the maximum write cycle time for the AT25640AN-10SI-1.8-T?
The AT25640AN-10SI-1.8-T has a maximum write cycle time of 5 ms, applicable across all VCC ranges (1.8V–5.5V) and temperature grades. This value is specified in the AC Characteristics table under tWC parameter and reflects the worst-case duration for a byte or page write to complete - a key timing constraint for real-time firmware that must poll RDY bit or implement timeout handling.
Is the AT25640AN-10SI-1.8-T qualified for automotive applications?
Yes, the AT25640AN-10SI-1.8-T is offered in automotive-grade variants with extended temperature range (−40°C to +125°C) and lead-free/halogen-free construction. While the -10SI-1.8-T suffix denotes industrial grade (−40°C to +85°C), its underlying design meets AEC-Q100 stress testing requirements, and Microchip provides automotive-qualified equivalents (e.g., AT25640AN-10SE-1.8) for under-hood deployment.
AT25640AN-10SI-1.8-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25640AN-10SI-1.8-T FAQ
1.How can I place an order for AT25640AN-10SI-1.8-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25640AN-10SI-1.8-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25640AN-10SI-1.8-T reliable?
The price and inventory of AT25640AN-10SI-1.8-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25640AN-10SI-1.8-T is usually 5 days.
3.What payment methods are accepted for AT25640AN-10SI-1.8-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25640AN-10SI-1.8-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25640AN-10SI-1.8-T?
AT25640AN-10SI-1.8-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25640AN-10SI-1.8-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25640AN-10SI-1.8-T?
For technical support, including AT25640AN-10SI-1.8-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25640AN-10SI-1.8-T requirements.
6.How does Aetrix verify that AT25640AN-10SI-1.8-T is sourced from the original manufacturer or authorized distributors?
All AT25640AN-10SI-1.8-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25640AN-10SI-1.8-T meets industry standards.
7.What is the process for return or replacement of AT25640AN-10SI-1.8-T?
All AT25640AN-10SI-1.8-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25640AN-10SI-1.8-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25640AN-10SI-1.8-T part is unused and in its original packaging.
Return procedure for AT25640AN-10SI-1.8-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25640AN-10SI-1.8-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
