Microchip Technology AT25640N-10SI-1.8
- Part No.:
- AT25640N-10SI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT25640N-10SI-1.8.pdf
- Description:
- IC EEPROM 64KBIT SPI 3MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,171
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT25640N-10SI-1.8 from Microchip Technology (formerly Atmel) is a 64 Kbit SPI serial EEPROM organized as 8192 × 8-bit memory, supporting 1.8 V to 5.5 V operation, 32-byte page write mode, and hardware/software write protection via WP pin and status register. It delivers 1 million write cycles and 100-year data retention for nonvolatile storage in industrial control and embedded sensor nodes.
For engineers reviewing the AT25640N-10SI-1.8 datasheet, AT25640N-10SI-1.8 pinout, AT25640N-10SI-1.8 application, or AT25640N-10SI-1.8 equivalent, this device serves as a low-voltage, SPI-compatible serial EEPROM with block-level write protection, self-timed 5 ms write cycle, and compatibility with 68HC11/6805 microcontroller peripherals.
Technical Context
The AT25640N-10SI-1.8 operates as an SPI slave device with separate SI (input) and SO (output) pins, supporting SPI Modes 0 and 3. Its internal 8-bit instruction register accepts op-codes including WREN, WRITE, READ, RDSR, and WRSR - all MSB-first with CS falling-edge initiation.
It implements dual-layer write protection: software-controlled Block Protect bits (BP1/BP0) in the status register enable 0%, 25%, 50%, or 100% array protection, while the hardware WP pin-when enabled via WPEN bit-blocks status register writes and protected memory access during low assertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8192 × 8-bit), enabling compact firmware parameter storage without parallel bus overhead |
| Supply Voltage Range | 1.8 V to 5.5 V - supports direct interfacing with 1.8 V logic and legacy 5 V systems |
| Max Clock Frequency | 3.0 MHz at 5 V - enables fast read/write transfers compatible with high-speed MCU SPI peripherals |
| Page Write Size | 32 bytes - reduces transaction count vs. byte-write, improving effective throughput in burst updates |
| Write Cycle Time | 5 ms typical - deterministic self-timed erase-and-program eliminates external timing management |
| Endurance & Retention | 1 million write cycles / 100 years retention - validated for long-life field deployments in unattended equipment |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade operation without derating |
Pinout & Package
AT25640N-10SI-1.8 is supplied in an 8-lead JEDEC SOIC package (8S1), 0.150" wide, with gull-wing leads and standard 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; initiates serial communication and resets internal state on falling edge |
| SCK | Serial Clock | Input-only clock; synchronizes SI data sampling and SO data output per SPI protocol |
| SI | Serial Data Input | Accepts op-code, address, and data; ignored unless CS is low and device is write-enabled |
| SO | Serial Data Output | Tri-state output delivering read data or status bits; high-impedance when CS high or HOLD active |
| WP | Write Protect | Hardware lock: blocks status register and protected memory writes when low and WPEN = 1 |
| HOLD | Communication Suspend | Pauses ongoing SPI transfer without resetting address counter; requires SCK low to assert |
| GND | Ground Reference | Return path for VCC and all I/O; must be low-impedance to ensure noise immunity during reads/writes |
| VCC | Power Supply | Single supply input; powers internal logic, charge pump, and I/O buffers across full 1.8–5.5 V range |
Key Features
| Feature | Design Value |
|---|---|
| Block Write Protection | Configurable via status register to protect 0%, 25%, 50%, or 100% of memory - prevents accidental overwrites in critical zones |
| Hardware + Software Write Lock | WP pin and WRSR instruction jointly enforce protection - allows fail-safe configuration even if firmware fails |
| 32-byte Page Write Mode | Reduces SPI transaction overhead by up to 32× vs. byte-write - accelerates calibration table or log updates |
| Self-timed Internal Write Cycle | No external erase step required; CS rising edge triggers autonomous programming - simplifies host firmware |
| Industrial Temperature Range | –40°C to +85°C operation confirmed - suitable for deployment in motor drives, PLC modules, and outdoor sensors |
Applications
| Industrial Sensor Calibration Storage | Medical Device Configuration Memory |
|---|---|
Use Scenario: Storing factory-calibrated offset/gain coefficients and sensor linearization tables in temperature/humidity transmitters. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed at power-up and during field recalibration via SPI interface. Use Value: Enables traceable, tamper-resistant calibration data retention across 100+ years without battery backup. |
Use Scenario: Holding user-selectable therapy parameters, alarm thresholds, and device ID in portable infusion pumps. IC Role / Device Role / Timing Role: Secure configuration EEPROM with hardware WP pin tied to system security controller. Use Value: Prevents unauthorized runtime modification of safety-critical settings using dual-layer (WP + BP bits) protection. |
| Automotive Body Control Module (BCM) | Smart Energy Meter Firmware Patch Storage |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock behavior in 12 V automotive BCMs. IC Role / Device Role / Timing Role: Low-voltage SPI EEPROM interfaced to 3.3 V microcontroller; powered from local LDO. Use Value: Operates reliably down to 1.8 V during cold-crank conditions, ensuring parameter persistence during brownout events. |
Use Scenario: Storing signed firmware patch images and version metadata for secure over-the-air (OTA) updates in utility meters. IC Role / Device Role / Timing Role: Trusted nonvolatile storage for cryptographic keys and update staging area. Use Value: 1 million endurance cycles support frequent patch validation and rollback - critical for field-deployed meter fleets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95640-DW | Same 64 Kbit density and SOIC-8 package; supports 5 MHz max clock at 5 V but only 1.8–5.5 V operation with reduced AC specs below 2.5 V | Lacks HOLD pin; uses single WIP/WEL status flag instead of RDY/BP bits - simpler but less granular protection | Select for cost-sensitive designs where HOLD functionality and fine-grained block protection are unnecessary |
| BR24G64FJ-WE2 | I²C interface (not SPI); 1.7–5.5 V supply; 400 kHz standard / 1 MHz fast-mode clock; 32-byte page write | Requires I²C master instead of SPI; no WP/HOLD pins - relies solely on software write disable and address locking | Choose when board already uses I²C for other peripherals and SPI pins are constrained |
Compared with M95640-DW and BR24G64FJ-WE2, the AT25640N-10SI-1.8 provides unique SPI Mode 0/3 compatibility, dedicated HOLD pin for interrupt-safe pausing, and independent BP1/BP0 bit control for flexible memory segmentation - making it optimal for real-time embedded systems requiring deterministic timing and layered data security.
Availability
AT25640N-10SI-1.8 is available at Aetrix Electronics and suitable for industrial automation, medical diagnostics equipment, and automotive body electronics requiring stable component supply across extended temperature and voltage ranges.
Supply support for AT25640N-10SI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and qualification for the AT25xxx family of serial EEPROMs.
The AT25640N-10SI-1.8 belongs to Microchip's SPI serial EEPROM product line, engineered for reliable, low-power nonvolatile storage in resource-constrained microcontroller systems with stringent data integrity requirements.
FAQ
What is the minimum operating voltage for AT25640N-10SI-1.8?
The AT25640N-10SI-1.8 supports true 1.8 V operation, with guaranteed functionality across the full 1.8 V to 5.5 V supply range. DC and AC specifications-including 32-byte page write, 3.0 MHz clock at 5 V, and 5 ms write cycle-are validated down to 1.8 V, enabling direct integration with ultra-low-power MCUs and battery-backed systems.
Does AT25640N-10SI-1.8 support SPI Mode 0 and Mode 3 only?
Yes, the AT25640N-10SI-1.8 explicitly supports SPI Modes 0 (CPOL = 0, CPHA = 0) and 3 (CPOL = 1, CPHA = 1), as documented in its official datasheet. It does not support Modes 1 or 2. This dual-mode capability ensures interoperability with both legacy 68HC11-family controllers and modern ARM-based SPI masters configured for either polarity/phase combination.
How does the HOLD pin function during an active AT25640N-10SI-1.8 SPI transaction?
The HOLD pin on the AT25640N-10SI-1.8 suspends serial communication without resetting the internal address counter or command state. To activate HOLD, the pin must be driven low while SCK is low; communication resumes when HOLD returns high, also while SCK is low. During HOLD, SI is ignored and SO remains in high-impedance - preserving transaction integrity during MCU interrupts or bus arbitration.
Can AT25640N-10SI-1.8 be used in automotive applications?
Yes - the AT25640N-10SI-1.8 is rated for –40°C to +85°C operation and is explicitly listed as an automotive-grade option in Atmel's original documentation. Its robust 1 million write cycles, 100-year data retention, and dual hardware/software write protection make it suitable for body control modules, infotainment configuration storage, and ADAS sensor calibration memory where reliability under thermal cycling is essential.
What happens if more than 32 bytes are written in a single AT25640N-10SI-1.8 page write sequence?
If more than 32 bytes are transmitted during one AT25640N-10SI-1.8 page write operation, the internal address counter rolls over within the current page boundary (bits A4–A0), causing previously written data in that 32-byte page to be overwritten. The device does not auto-increment to the next page - exceeding 32 bytes results in wraparound corruption, not sequential addressing. Host firmware must enforce strict 32-byte boundaries per WRITE instruction.
AT25640N-10SI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 3 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25640N-10SI-1.8 FAQ
1.How can I place an order for AT25640N-10SI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25640N-10SI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25640N-10SI-1.8 reliable?
The price and inventory of AT25640N-10SI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25640N-10SI-1.8 is usually 5 days.
3.What payment methods are accepted for AT25640N-10SI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25640N-10SI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25640N-10SI-1.8?
AT25640N-10SI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25640N-10SI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25640N-10SI-1.8?
For technical support, including AT25640N-10SI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25640N-10SI-1.8 requirements.
6.How does Aetrix verify that AT25640N-10SI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT25640N-10SI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25640N-10SI-1.8 meets industry standards.
7.What is the process for return or replacement of AT25640N-10SI-1.8?
All AT25640N-10SI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT25640N-10SI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25640N-10SI-1.8 part is unused and in its original packaging.
Return procedure for AT25640N-10SI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25640N-10SI-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
