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Microchip Technology AT25DQ161-MH-B
- Part No.:
- AT25DQ161-MH-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-UDFN Exposed Pad
- Datasheet:
-
AT25DQ161-MH-B.pdf
- Description:
- IC FLASH 16MBIT SPI 100MHZ 8UDFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,524
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Product details
Overview
AT25DQ161-MH-B from Microchip Technology (formerly Atmel) is a 16-Mbit serial NOR Flash memory IC designed for code shadowing and data storage in embedded systems. It operates from a single 2.7V–3.6V supply, supports SPI Modes 0/3, delivers up to 100MHz RapidS read performance, and features uniform 4KB/32KB/64KB erase blocks - used in industrial controllers, IoT edge nodes, and firmware-updatable consumer devices.
For engineers reviewing the AT25DQ161-MH-B datasheet, AT25DQ161-MH-B pinout, AT25DQ161-MH-B application, or AT25DQ161-MH-B equivalent, key selection criteria include quad-I/O read capability (6Bh opcode), sector lockdown security, 128-byte OTP register, 5ns clock-to-output timing, and dual-lead SOIC package compatibility with legacy board layouts.
Technical Context
The AT25DQ161-MH-B implements a flexible SPI-based NOR Flash architecture with configurable I/O modes: standard single-I/O (03h/0Bh/1Bh opcodes), dual-I/O (3Bh), and quad-I/O (6Bh), all requiring QE bit enablement in the Configuration Register. Its internal address counter enables wraparound sequential reads across the full 2MB (1FFFFFh) memory space without latency penalties.
Protection logic integrates three hierarchical layers: software-controlled sector protect/unprotect (36h/39h), global protect/unprotect via Status Register Byte 1, and hardware-enforced permanent lockdown (33h/34h) of any combination of thirty-two 64KB sectors - critical for secure boot and cryptographic key storage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 16 Mbit (2 MB) - sufficient for full firmware images plus runtime configuration data in resource-constrained microcontrollers. |
| Supply Voltage | 2.7V–3.6V - compatible with standard 3.3V logic rails; no auxiliary voltage required for program/erase. |
| Max Read Frequency | 100 MHz (RapidS mode) - enables 40 MB/s effective throughput using quad-I/O, reducing CPU wait states. |
| Page Program Time | 1.0 ms typical (256 bytes) - allows rapid field updates without blocking system operation for extended periods. |
| Erase Granularity | Uniform 4KB / 32KB / 64KB blocks - permits fine-grained firmware patching while preserving adjacent code/data sectors. |
| Data Retention | 20 years - meets long-lifecycle requirements for industrial automation and medical equipment. |
| Endurance | 100,000 program/erase cycles - supports frequent OTA update cycles in connected devices. |
| Deep Power-Down Current | 5 µA typical - enables ultra-low-power sleep modes in battery-operated sensors and wearables. |
Pinout & Package
AT25DQ161-MH-B uses an 8-lead SOIC package (0.208" wide), RoHS-compliant and green, with standard SPI-compatible pin assignment and hardware write protection via WP#.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; initiates command sequence on high-to-low transition and terminates on low-to-high; places SO in high-Z when deasserted. |
| SCK | Serial Clock | Master-generated clock; data latched on rising edge (input), output shifted on falling edge - defines timing for all SPI transactions. |
| SI (I/O0) | Serial Input / Quad I/O Lane 0 | Primary command/address/data input; becomes I/O0 in dual/quad modes - enables 2-bit or 4-bit parallel data transfer per SCK cycle. |
| SO (I/O1) | Serial Output / Quad I/O Lane 1 | Standard read data output; becomes I/O1 in dual/quad modes - supports simultaneous 2-bit or 4-bit output with SI, WP, HOLD. |
| WP (I/O2) | Write Protect / Quad I/O Lane 2 | Hardware sector lock control (active-low); repurposed as I/O2 in quad mode when QE bit is set - expands bandwidth without adding pins. |
| HOLD (I/O3) | Hold / Quad I/O Lane 3 | Pauses ongoing SPI transfer without deselecting device; becomes I/O3 in quad mode - enables seamless bus sharing and low-latency suspend/resume. |
| VCC | Power Supply | 2.7V–3.6V main supply; powers all internal logic, memory array, and I/O buffers - eliminates need for charge pumps or voltage translators. |
| GND | Ground Reference | Common return path for VCC and signal integrity; must be low-impedance connection to minimize noise coupling into sensitive flash operations. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-/Quad-I/O Read Support | Enables 2× or 4× read bandwidth vs. standard SPI - reduces firmware load time and improves real-time responsiveness in boot-critical applications. |
| Program/Erase Suspend & Resume | Allows interruption of background erase/program operations to service high-priority CPU requests - essential for deterministic real-time systems. |
| 32 × 64KB Lockable Sectors | Permits granular, persistent protection of bootloader, crypto keys, or calibration data - prevents accidental or malicious overwrite during field updates. |
| 128-byte OTP Security Register | Stores immutable device identifiers, ESNs, or encrypted keys - provides root-of-trust foundation for secure boot and firmware authentication. |
| Flexible Erase Architecture | Supports 4KB block erase for patching small code modules and 64KB erase for larger segments - maximizes memory utilization and minimizes wasted space. |
| JEDEC Standard ID Read | Guarantees interoperability with generic flash programming tools and automated test systems - simplifies manufacturing and qualification workflows. |
Applications
| Firmware Storage in Industrial PLCs | Secure Boot in Medical Devices |
|---|---|
Use Scenario: Storing programmable logic controller firmware with periodic field updates via USB or Ethernet. IC Role / Device Role / Timing Role: Non-volatile code storage with fast random-access read and selective 4KB block erase for delta updates. Use Value: Enables over-the-air firmware patches without full reflash, minimizing downtime and preserving configuration data in adjacent protected sectors. |
Use Scenario: Hosting signed bootloader and cryptographic keys in Class II medical imaging equipment. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage with permanent sector lockdown and OTP register for key binding. Use Value: Prevents unauthorized firmware modification and ensures cryptographic key integrity - satisfies IEC 62304 and FDA cybersecurity requirements. |
| Code Shadowing in Automotive Infotainment | Data Logging in Smart Energy Meters |
Use Scenario: Loading application binaries from Flash into RAM at startup in head-unit systems with ASIL-B constraints. IC Role / Device Role / Timing Role: High-speed serial code storage supporting 100MHz RapidS reads to meet boot-time deadlines. Use Value: Achieves sub-500ms cold boot by delivering >35 MB/s effective read throughput - avoids external parallel NOR or NAND complexity. |
Use Scenario: Recording hourly consumption metrics and tariff schedules in utility-grade electricity meters with 15-year lifespan. IC Role / Device Role / Timing Role: Reliable, low-power data archive with 20-year retention and 100K-cycle endurance for daily writes. Use Value: Eliminates need for separate EEPROM; leverages uniform 4KB erase to log rolling 30-day datasets without wear leveling overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DQ321-MH-B | 32-Mbit density, identical pinout/package, same feature set including RapidS, quad-I/O, and sector lockdown - direct higher-capacity upgrade. | Required where firmware size exceeds 2MB or future-proofing for feature expansion is needed. | Select AT25DQ321-MH-B for new designs; AT25DQ161-MH-B remains viable for cost-sensitive, capacity-constrained legacy replacements. |
| W25Q16JVSSIQ | 16-Mbit, SOIC-8, supports QPI/DTR modes; lacks RapidS acceleration, sector lockdown, and OTP register - lower security and performance tier. | Suitable for basic code storage where advanced protection and 100MHz read speed are not mandatory. | Choose W25Q16JVSSIQ only if budget constraints outweigh security and timing requirements - verify absence of lockdown/OTP in design review. |
Compared with AT25DQ321-MH-B, the AT25DQ161-MH-B offers identical interface behavior and security features at half the density and lower cost; versus W25Q16JVSSIQ, it delivers superior deterministic timing, hardware-enforced read-only sectors, and dedicated secure storage - making it preferable for safety- or security-critical deployments.
Availability
AT25DQ161-MH-B is available at Aetrix Electronics and suitable for industrial control systems, medical diagnostics equipment, and automotive infotainment modules requiring stable component supply and long-term lifecycle support.
Supply support for AT25DQ161-MH-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and qualification for the AT25DQ family of serial Flash memories.
The AT25DQ series was engineered specifically for robust code+data storage in harsh environments - emphasizing rapid read access, flexible erase granularity, and multi-layered security for industrial, medical, and automotive applications.
FAQ
What is the operating voltage range for the AT25DQ161-MH-B?
The AT25DQ161-MH-B operates from a single 2.7V to 3.6V supply. This range aligns with standard 3.3V logic interfaces and eliminates the need for auxiliary voltage rails during program or erase operations. All specifications - including 100MHz RapidS read speed and 5ns tV - are guaranteed across this full voltage window, ensuring reliable performance in varying power conditions encountered in industrial and automotive systems. The AT25DQ161-MH-B does not require external voltage translation or regulation beyond standard decoupling.
Does the AT25DQ161-MH-B support quad-SPI (QSPI) mode?
The AT25DQ161-MH-B supports quad-I/O read and program operations using the 6Bh and 32h opcodes respectively, but requires explicit enabling of the Quad Enable (QE) bit in the Configuration Register. Unlike true QSPI peripherals, it does not implement the full QSPI protocol stack (e.g., no DTR or wrap-around addressing), and its quad mode functions strictly as enhanced SPI with four I/O lines (I/O3–I/O0). The AT25DQ161-MH-B achieves up to 40 MB/s effective throughput in this mode, validated per datasheet section 7.3 and Table 6-1.
How many sectors can be permanently locked down on the AT25DQ161-MH-B?
The AT25DQ161-MH-B contains 32 physical sectors, each 64KB in size, and supports permanent lockdown of any combination of these sectors using the 33h (Sector Lockdown) and 34h (Freeze Lockdown State) commands. Once frozen, the selected sectors become read-only for the lifetime of the device - even after power cycles or resets. This feature is implemented in hardware and cannot be reversed. The AT25DQ161-MH-B uses dedicated lockdown registers independent of standard protection bits, providing tamper-resistant isolation for bootloader or cryptographic assets.
What is the purpose of the 128-byte OTP Security Register in the AT25DQ161-MH-B?
The 128-byte One-Time Programmable (OTP) Security Register in the AT25DQ161-MH-B provides immutable storage for device-unique identifiers, electronic serial numbers (ESNs), cryptographic keys, or license tokens. Once programmed, bits cannot be altered - ensuring authenticity and preventing cloning. It is accessed via 9Bh (program) and 77h (read) opcodes, with built-in error detection. The AT25DQ161-MH-B leverages this register as a hardware root-of-trust anchor, especially in applications requiring secure boot validation or regulatory compliance like IEC 62304.
Is the AT25DQ161-MH-B pin-compatible with other SOIC-8 serial Flash devices?
The AT25DQ161-MH-B uses a standard 8-lead SOIC (0.208" wide) footprint with industry-standard SPI pin assignments (CS, SCK, SI, SO, WP, HOLD, VCC, GND), making it mechanically and electrically compatible with most SOIC-8 serial Flash devices. However, functional compatibility depends on command set alignment - for example, the AT25DQ161-MH-B requires QE bit setting for quad mode, unlike some competitors. Always validate timing, protection behavior, and opcode mapping before substitution. The AT25DQ161-MH-B datasheet confirms pinout equivalence in Figures 2-1 and 2-2.
AT25DQ161-MH-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-UDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 16Mbit
- Memory Organization:
- 2M x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 100 MHz
- Write Cycle Time - Word, Page:
- 7µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UDFN (5x6)
AT25DQ161-MH-B FAQ
1.How can I place an order for AT25DQ161-MH-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25DQ161-MH-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25DQ161-MH-B reliable?
The price and inventory of AT25DQ161-MH-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25DQ161-MH-B is usually 5 days.
3.What payment methods are accepted for AT25DQ161-MH-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25DQ161-MH-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25DQ161-MH-B?
AT25DQ161-MH-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25DQ161-MH-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25DQ161-MH-B?
For technical support, including AT25DQ161-MH-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25DQ161-MH-B requirements.
6.How does Aetrix verify that AT25DQ161-MH-B is sourced from the original manufacturer or authorized distributors?
All AT25DQ161-MH-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25DQ161-MH-B meets industry standards.
7.What is the process for return or replacement of AT25DQ161-MH-B?
All AT25DQ161-MH-B units undergo pre-shipment inspection (PSI). If there is an issue with AT25DQ161-MH-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25DQ161-MH-B part is unused and in its original packaging.
Return procedure for AT25DQ161-MH-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT25DQ161-MH-B Tags
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M24C02-WMN6TP
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AT24C02C-XHM-T
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AT21CS01-STUM10-T
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AT24C02C-SSHM-T
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24LC01BT-I/OT
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M24C02-FMC6TG
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AT24CS02-SSHM-T
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93LC46BT-I/OT
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AT24C04C-SSHM-T
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24LC01BT-I/SN
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24AA02UIDT-I/OT
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AT24C08C-STUM-T
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