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Renesas AT25QF128A-MHB-T
- Part No.:
- AT25QF128A-MHB-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-UDFN Exposed Pad
- Datasheet:
-
AT25QF128A-MHB-T.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8UDFN
- Quantity:
- Payment:
- Shipping:
Inventory:5,766
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Product details
Overview
AT25QF128A-MHB-T from Renesas Electronics is a 128-Mbit Serial NOR Flash memory IC supporting SPI modes 0/3, dual I/O (1-1-2), and quad I/O (1-4-4, 0-4-4) for high-speed code storage and eXecute-in-Place (XiP) in microcontroller-based systems. It operates from 2.7 V to 3.6 V, delivers up to 133 MHz read speed at 85 °C, and features 4 kB/32 kB/64 kB block erase with typical times of 70 ms / 150 ms / 250 ms.
For engineers reviewing the AT25QF128A-MHB-T datasheet, AT25QF128A-MHB-T pinout, AT25QF128A-MHB-T application, or AT25QF128A-MHB-T equivalent, key selection considerations include quad-SPI XiP performance, industrial temperature support (–40 °C to 85 °C), OTP security registers, SFDP compliance, and W-SOIC (208-mil) package compatibility with legacy PCB layouts.
Technical Context
The AT25QF128A-MHB-T implements a flexible SPI interface with configurable I/O drive strength and hardware write protection via WP pin. Its quad-I/O mode is factory-enabled (QE bit = 1 in Status Register 2), enabling 0-4-4 continuous read for optimized XiP latency without repeated command opcodes.
It supports erase/program suspend-resume functionality, JEDEC-standard Manufacturer and Device ID, and Serial Flash Discoverable Parameters (SFDP) v1.6 for automatic host configuration. Memory protection includes user-definable sectors at start/end of array and 3 × 256-byte OTP security registers for secure boot keys or calibration data.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB) - sufficient for firmware images, boot loaders, and configuration tables in resource-constrained embedded systems. |
| Read Speed | Up to 133 MHz at 85 °C - enables sub-100 ns effective access time in quad I/O mode for real-time XiP execution. |
| Erase Time (4 kB block) | 70 ms typical - allows rapid field firmware updates with minimal system downtime during over-the-air (OTA) patches. |
| Endurance | 100,000 program/erase cycles - supports frequent logging or parameter storage in industrial controllers and IoT edge nodes. |
| Data Retention | 20 years at 85 °C - ensures long-term reliability in automotive infotainment and industrial HMIs without refresh cycles. |
| Supply Voltage | 2.7 V to 3.6 V - compatible with single-supply 3.3 V systems and tolerant of brown-out conditions down to 2.7 V. |
| Operating Temp | –40 °C to +85 °C (industrial grade) - validated for deployment in outdoor gateways, motor drives, and factory automation equipment. |
Pinout & Package
AT25QF128A-MHB-T uses an 8-lead, 208-mil Wide EIAJ SOIC package (W-SOIC), pin-compatible with legacy SPI flash footprints. Pin functions are electrically defined per JEDEC MS-012, with internal pull-ups on WP and HOLD pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select input | Active-low enable signal; falling edge initiates command sequence; must be stable before SCK edge during power-up. |
| SO / I/O1 | Serial output / Quad I/O bidirectional | Outputs data in standard SPI; becomes bidirectional I/O1 in dual/quad modes for full-duplex transfers. |
| WP / I/O2 | Write protect / Quad I/O bidirectional | Factory-configured as I/O2 (QE=1); used for hardware write lock when QE=0; internal pull-up allows floating if unused. |
| GND | Ground reference | Common return path for VCC and all I/O signals; requires low-inductance connection to minimize noise coupling. |
| VCC | Core & I/O supply | Single 2.7–3.6 V rail powers logic, memory array, and I/O drivers; decoupling with 0.1 µF ceramic capacitor required near pins. |
| HOLD / I/O3 | Transfer pause / Quad I/O bidirectional | Pauses ongoing SPI transfer without resetting state; becomes I/O3 in quad mode; internal pull-up permits floating use. |
| SCK | Serial clock input | Edge-triggered master clock; rising edge latches inputs, falling edge clocks outputs; max 133 MHz frequency supported. |
| SI / I/O0 | Serial input / Quad I/O bidirectional | Receives commands/addresses/data in standard mode; becomes bidirectional I/O0 in dual/quad for simultaneous read/write. |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Fast Read (0-4-4) | Enables continuous burst reads without opcode retransmission, reducing instruction fetch latency by >40% vs standard SPI in XiP applications. |
| 3 × 256-byte OTP registers | Provides immutable storage for cryptographic keys, device serial numbers, or calibration coefficients-immune to accidental overwrite or erase. |
| Erase/program suspend-resume | Allows interruption of background erase or program operations to service high-priority read requests, improving real-time system responsiveness. |
| User-configurable I/O drive strength | DRV1/DRV0 bits adjust output current to match trace impedance and reduce EMI in high-speed routing, avoiding signal integrity issues. |
| SFDP v1.6 compliance | Permits automatic host detection of timing parameters, erase granularity, and feature set-eliminating hardcoded driver assumptions. |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
Use Scenario: Storing ladder logic programs and I/O mapping tables in programmable logic controllers requiring field-upgradable firmware with guaranteed retention over 15+ years. IC Role / Device Role / Timing Role: Nonvolatile code storage with XiP capability, delivering deterministic instruction fetch timing under variable load and ambient temperature. Use Value: Eliminates external RAM copy step during boot, reducing BOM count and power-on delay by 12–18 ms versus parallel NOR solutions. | Use Scenario: Hosting boot firmware and sensor calibration data for radar processing units operating in –40 °C to 85 °C under hood environments. IC Role / Device Role / Timing Role: Secure, high-reliability boot memory with OTP registers protecting critical safety-critical calibration values. Use Value: Meets ISO 26262 ASIL-B requirements via 20-year data retention at 85 °C and hardware write protection against runtime corruption. |
| Smart Home Gateway OTA Updates | Medical Infusion Pump Configuration |
Use Scenario: Enabling encrypted, delta-based firmware updates over low-bandwidth Wi-Fi links in residential gateways with limited local storage. IC Role / Device Role / Timing Role: Dual/quad I/O capable flash supporting fast read-modify-write cycles for patch application without full image reload. Use Value: Reduces OTA update time by 65% using 133 MHz quad read and 4 kB block erase-critical for minimizing device downtime. | Use Scenario: Storing drug library profiles, dosage limits, and audit logs in Class II medical devices requiring FDA 21 CFR Part 11 compliance. IC Role / Device Role / Timing Role: Tamper-resistant nonvolatile memory with hardware write lock and OTP-secured calibration constants. Use Value: Prevents unauthorized modification of safety-critical parameters via WP pin assertion and status register protection bits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q128JVSIM | Same density, 3.3 V, 133 MHz quad read, but lacks OTP registers and SFDP v1.6; uses different status register layout. | Supports basic XiP but not secure boot key storage; requires custom driver adaptation for status register access. | Select when cost sensitivity outweighs need for OTP security or SFDP auto-configuration. |
| Macronix MX25L12833FZDI-10G | 104 MHz max read speed, 100k endurance, same 8-pin SOIC package; includes 256-byte OTP but no erase/program suspend-resume. | Suitable for static firmware storage but not for dynamic parameter logging or real-time interruptible updates. | Select when thermal budget limits operation to ≤104 MHz and suspend-resume is unnecessary. |
Compared with W25Q128JVSIM and MX25L12833FZDI-10G, the AT25QF128A-MHB-T uniquely combines factory-enabled quad I/O, 133 MHz XiP performance, 3× OTP registers, and suspend-resume-making it optimal for safety-aware, field-upgradable embedded systems where deterministic latency and secure storage are co-required.
Availability
AT25QF128A-MHB-T is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive ADAS boot memory, and smart home gateway OTA updates requiring stable component supply across multi-year production cycles.
Supply support for AT25QF128A-MHB-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and memory solutions for industrial, automotive, and IoT markets.
The AT25QF128A-MHB-T belongs to Renesas' AT25QF serial NOR flash product line, engineered for high-reliability, low-power, and secure code storage in resource-constrained embedded systems demanding XiP, long data retention, and robust firmware update capabilities.
FAQ
What is the factory default configuration of the Quad Enable (QE) bit for AT25QF128A-MHB-T?
The AT25QF128A-MHB-T ships from the factory with the Quad Enable (QE) bit in Status Register 2 set to 1, enabling quad I/O mode (0-4-4, 1-4-4) immediately upon power-up. This differs from the AT25SF128A variant, which ships with QE = 0. The AT25QF128A-MHB-T therefore supports high-speed XiP without initial register writes.
Does AT25QF128A-MHB-T support execute-in-place (XiP) operation, and what features optimize it?
Yes, AT25QF128A-MHB-T is explicitly designed for XiP. Key optimizations include continuous read mode (0-4-4 command), quad I/O bandwidth (4× standard SPI), and 133 MHz read speed at 85 °C. These reduce instruction fetch latency and eliminate the need for RAM copy during boot, directly enhancing real-time determinism in AT25QF128A-MHB-T–based systems.
How many one-time programmable (OTP) registers does AT25QF128A-MHB-T provide, and what is their purpose?
The AT25QF128A-MHB-T provides three 256-byte OTP security registers. These are used to store immutable data such as cryptographic keys, device-specific calibration values, or secure boot signatures. Once programmed, they cannot be erased or rewritten-ensuring persistent protection of sensitive information in AT25QF128A-MHB-T deployments.
What package type is used by AT25QF128A-MHB-T, and is it pin-compatible with legacy SOIC footprints?
AT25QF128A-MHB-T uses an 8-lead, 208-mil Wide EIAJ SOIC (W-SOIC) package, fully compliant with JEDEC MS-012. It is mechanically and electrically pin-compatible with standard 8-pin SOIC footprints, enabling drop-in replacement in existing designs without PCB revision-confirmed by the AT25QF128A-MHB-T pinout and package drawings in the official datasheet.
Can AT25QF128A-MHB-T operate in both industrial and extended temperature ranges?
The AT25QF128A-MHB-T is rated for the industrial temperature range of –40 °C to +85 °C. While the AT25SF/QF128A family also offers an extended –40 °C to +105 °C variant, the AT25QF128A-MHB-T specifically corresponds to the industrial-grade version, validated for long-term reliability in factory automation, networking, and consumer electronics applications within that range.
AT25QF128A-MHB-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 50µs, 2.4ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UDFN (5x6)
AT25QF128A-MHB-T FAQ
1.How can I place an order for AT25QF128A-MHB-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25QF128A-MHB-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25QF128A-MHB-T reliable?
The price and inventory of AT25QF128A-MHB-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25QF128A-MHB-T is usually 5 days.
3.What payment methods are accepted for AT25QF128A-MHB-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25QF128A-MHB-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25QF128A-MHB-T?
AT25QF128A-MHB-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25QF128A-MHB-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25QF128A-MHB-T?
For technical support, including AT25QF128A-MHB-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25QF128A-MHB-T requirements.
6.How does Aetrix verify that AT25QF128A-MHB-T is sourced from the original manufacturer or authorized distributors?
All AT25QF128A-MHB-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25QF128A-MHB-T meets industry standards.
7.What is the process for return or replacement of AT25QF128A-MHB-T?
All AT25QF128A-MHB-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25QF128A-MHB-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25QF128A-MHB-T part is unused and in its original packaging.
Return procedure for AT25QF128A-MHB-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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