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Renesas AT25QF128A-SHB-T
- Part No.:
- AT25QF128A-SHB-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT25QF128A-SHB-T.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,538
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Product details
Overview
AT25QF128A-SHB-T from Renesas Electronics is a 128-Mbit Serial NOR Flash memory IC supporting SPI, Dual I/O, and Quad I/O interfaces with 133 MHz read speed at 85°C, 4 kB/32 kB/64 kB block erase, and 100,000 program/erase cycles - deployed in embedded boot code storage and eXecute-in-Place (XiP) applications for industrial controllers and IoT edge devices.
For engineers reviewing the AT25QF128A-SHB-T datasheet, AT25QF128A-SHB-T pinout, AT25QF128A-SHB-T application, or AT25QF128A-SHB-T equivalent, key selection criteria include quad-SPI timing compliance, 2.7–3.6 V single-supply operation, OTP security register support, continuous read wrap modes, and factory-default Quad Enable (QE=1) configuration.
Technical Context
The AT25QF128A-SHB-T implements a flexible SPI command architecture supporting modes 0 and 3, with dedicated dual-output (1-1-2), quad-output (1-1-4), and full quad-I/O (1-4-4, 0-4-4) protocols. Its internal status registers (SR1/SR2/SR3) control write protection, drive strength (DRV1/DRV0), and QE bit persistence.
It features hardware-based memory protection via WP pin activation and user-definable protected sectors at memory start/end, plus three 256-byte One-Time Programmable (OTP) security registers for firmware integrity. The device ships with QE=1 enabled, enabling immediate quad-I/O operation without initial configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB) - sufficient for full bootloader + firmware image in resource-constrained microcontrollers. |
| Read Speed | 133 MHz at 85°C - enables sub-μs instruction fetch latency critical for XiP performance. |
| Erase Time | 70 ms (4 kB block), 150 ms (32 kB), 250 ms (64 kB) - balances granularity and update speed for field firmware patches. |
| Endurance | 100,000 program/erase cycles - supports frequent OTA updates in industrial gateways over 10+ years. |
| Data Retention | 20 years at 85°C - ensures long-term reliability in uncooled industrial enclosures. |
| Supply Voltage | 2.7 V to 3.6 V - compatible with standard 3.3 V logic rails and brown-out tolerant power domains. |
| Operating Temp | -40°C to 105°C (Extended) - qualified for under-hood automotive ECUs and outdoor telecom equipment. |
Pinout & Package
AT25QF128A-SHB-T is packaged in an 8-pad DFN (5 × 6 × 0.6 mm) with wettable flank leads, RoHS-compliant and suitable for automated optical inspection (AOI) and reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select input | Active-low enable; must fall before first clock edge; internal pull-up not present - requires external 10 kΩ pull-up to VCC for robust power-up sequencing. |
| SO / I/O1 | Bidirectional serial data | Output in standard SPI; becomes I/O1 in dual/quad modes - supports high-speed data streaming without bus contention. |
| WP / I/O2 | Write Protect or quad I/O | Factory-configured as I/O2 (QE=1); functions as hardware write lock only if QE=0 - cannot serve both roles simultaneously. |
| GND | Ground reference | Common return path for VCC and all I/O; must be low-inductance connection to minimize noise coupling during fast read bursts. |
| VCC | Power supply | Single 2.7–3.6 V rail powering core and I/O; requires local 0.1–1 μF low-ESR decoupling capacitor adjacent to pin. |
| HOLD / I/O3 | Transfer pause or quad I/O | Factory-configured as I/O3 (QE=1); suspends ongoing SPI transfer without resetting state - useful for interrupt servicing in real-time systems. |
| SCK | Serial clock input | Rising-edge sampled inputs, falling-edge launched outputs; max 133 MHz frequency defines upper bound for sustained throughput. |
| SI / I/O0 | Bidirectional serial data | Input in standard SPI; becomes I/O0 in dual/quad modes - enables full-duplex command/address/data flow during quad page programming. |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Fast Read (0-4-4) | Eliminates command opcode overhead per read burst, enabling true continuous XiP execution with zero inter-byte latency. |
| 3 × 256-byte OTP registers | Stores immutable cryptographic keys or device-specific calibration data - resistant to field reprogramming or accidental overwrite. |
| Erase/program suspend-resume | Allows high-priority interrupts to preempt background flash operations without data corruption or timeout failure. |
| Serial Flash Discoverable Parameters (SFDP) | Enables automatic host driver initialization via standardized JEDEC SFDP v1.6 table, reducing BSP integration effort. |
| User-configurable I/O drive strength | DRV1/DRV0 bits adjust output slew rate to match PCB trace impedance - mitigates signal integrity issues on long or unterminated buses. |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
Use Scenario: Storing boot loader and safety-critical firmware in programmable logic controllers operating continuously in factory environments. IC Role / Device Role / Timing Role: Primary non-volatile code storage with eXecute-in-Place capability, directly feeding ARM Cortex-M7 instruction fetch bus. Use Value: 133 MHz quad-read speed reduces boot time by >40% vs. legacy SPI flash; 105°C rating ensures reliability near motor drives and power supplies. | Use Scenario: Holding boot firmware and sensor fusion algorithms in camera ECU modules subject to thermal cycling and vibration. IC Role / Device Role / Timing Role: Secure, high-reliability boot memory interfaced to TI Jacinto 7 SoC via octal-capable QSPI controller. Use Value: Factory-default QE=1 enables immediate quad-I/O operation; OTP registers store asymmetric keys for secure boot chain validation. |
| IoT Edge Gateway Code Storage | Medical Imaging Device Configuration |
Use Scenario: Hosting Linux kernel, rootfs, and OTA update partitions in cellular-connected edge gateways deployed outdoors. IC Role / Device Role / Timing Role: Dual-bank memory supporting A/B firmware updates with atomic sector swap and rollback capability. Use Value: 4 kB block erase granularity allows fine-grained patching; 20-year data retention guarantees firmware integrity across product lifecycle. | Use Scenario: Storing calibrated lookup tables, DICOM metadata templates, and regulatory compliance flags in portable ultrasound units. IC Role / Device Role / Timing Role: Non-volatile parameter storage accessed during power-on self-test and runtime configuration loading. Use Value: Hardware write protection (via WP pin) prevents accidental corruption of FDA-mandated calibration data during service mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q128JVSIM | Same density, 3.3 V, 133 MHz, but QE defaults to 0; requires software initialization for quad mode. | Lacks factory-qualified 105°C extended temp grade; rated only to 85°C. | Select when cost sensitivity outweighs extended temperature need and firmware can handle QE setup. |
| Macronix MX25L12833FZDI-13G | 133 MHz, 105°C, but no OTP registers; SFDP v1.5 only; deep power-down current 3 µA (vs. 2 µA). | Does not support continuous read wrap modes - limits XiP efficiency in cache-constrained SoCs. | Select when OTP security is unnecessary and lower standby current is not critical. |
Compared with W25Q128JVSIM and MX25L12833FZDI-13G, the AT25QF128A-SHB-T delivers out-of-box quad-I/O readiness, extended temperature qualification, and hardware-enforced security via OTP - making it optimal for safety-critical and thermally demanding deployments where initialization robustness and long-term data integrity are mandatory.
Availability
AT25QF128A-SHB-T is available at Aetrix Electronics and suitable for industrial automation, automotive electronics, and medical device manufacturing requiring stable component supply, long-lifecycle support, and RoHS-compliant green packaging.
Supply support for AT25QF128A-SHB-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering trusted microcontrollers, analog, power, and memory solutions for industrial, automotive, and infrastructure markets.
The AT25QF128A belongs to Renesas' high-performance Serial NOR Flash family, engineered specifically for eXecute-in-Place (XiP) boot and firmware storage in thermally demanding, safety-aware embedded systems.
FAQ
What is the default Quad Enable (QE) state of the AT25QF128A-SHB-T at power-up?
The AT25QF128A-SHB-T ships from the factory with the Quad Enable (QE) bit in Status Register 2 set to 1. This means quad-I/O mode is active immediately after power-up, eliminating the need for initial configuration commands before using 1-4-4 or 0-4-4 read protocols - a key differentiator from the AT25SF128A variant, which defaults to QE=0.
Does the AT25QF128A-SHB-T support continuous read mode for eXecute-in-Place (XiP) applications?
Yes, the AT25QF128A-SHB-T supports continuous read mode with 8/16/32/64-byte wrap using the 0-4-4 command format. This eliminates repeated command opcodes during sequential instruction fetch, reducing bus overhead and enabling deterministic XiP performance - critical for real-time microcontroller boot and runtime execution.
How many One-Time Programmable (OTP) security registers does the AT25QF128A-SHB-T include, and what is their size?
The AT25QF128A-SHB-T includes three independent 256-byte One-Time Programmable (OTP) security registers. Once programmed, these registers cannot be erased or rewritten, making them ideal for storing immutable cryptographic keys, device-unique identifiers, or calibration constants that must survive field firmware updates.
What package type is used for the AT25QF128A-SHB-T, and is it compatible with automated optical inspection (AOI)?
The AT25QF128A-SHB-T uses an 8-pad DFN package measuring 5 mm × 6 mm × 0.6 mm with wettable flank leads. This package supports automated optical inspection (AOI) and is optimized for high-yield reflow soldering in volume production - confirmed by Renesas' packaging documentation and industry-standard IPC-7351B footprint compliance.
Can the WP and HOLD pins on the AT25QF128A-SHB-T be used simultaneously for write protection and hold functionality?
No - when the AT25QF128A-SHB-T operates in quad-I/O mode (factory default, QE=1), the WP pin functions exclusively as I/O2 and the HOLD pin as I/O3. Neither pin retains its dedicated hardware protection or pause function in this configuration. To use WP/HOLD as control signals, the QE bit must first be cleared to 0, disabling quad mode.
AT25QF128A-SHB-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 50µs, 2.4ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25QF128A-SHB-T FAQ
1.How can I place an order for AT25QF128A-SHB-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25QF128A-SHB-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25QF128A-SHB-T reliable?
The price and inventory of AT25QF128A-SHB-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25QF128A-SHB-T is usually 5 days.
3.What payment methods are accepted for AT25QF128A-SHB-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25QF128A-SHB-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25QF128A-SHB-T?
AT25QF128A-SHB-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25QF128A-SHB-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25QF128A-SHB-T?
For technical support, including AT25QF128A-SHB-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25QF128A-SHB-T requirements.
6.How does Aetrix verify that AT25QF128A-SHB-T is sourced from the original manufacturer or authorized distributors?
All AT25QF128A-SHB-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25QF128A-SHB-T meets industry standards.
7.What is the process for return or replacement of AT25QF128A-SHB-T?
All AT25QF128A-SHB-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25QF128A-SHB-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25QF128A-SHB-T part is unused and in its original packaging.
Return procedure for AT25QF128A-SHB-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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