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Renesas AT25QL128A-SHE-T
- Part No.:
- AT25QL128A-SHE-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT25QL128A-SHE-T.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,886
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Product details
Overview
AT25QL128A-SHE-T from Renesas Electronics is a 128-Mbit serial NOR Flash memory IC designed for code storage and data logging in embedded systems. It operates from a single 1.7–2.0 V supply, supports SPI/QPI and Dual/Quad I/O protocols, delivers up to 65 MB/s continuous read throughput at 133 MHz, and features 4-kB/32-kB/64-kB erase blocks with 100,000 program/erase cycles endurance.
For engineers reviewing the AT25QL128A-SHE-T datasheet, AT25QL128A-SHE-T pinout, AT25QL128A-SHE-T application, or AT25QL128A-SHE-T equivalent, this page provides verified electrical specs, package mapping, validated alternative parts, and real-world use context for boot code storage, firmware updates, and secure parameter retention in industrial and automotive control units.
Technical Context
The AT25QL128A-SHE-T implements a flexible multi-protocol serial interface supporting standard SPI (Modes 0/3), Dual I/O, Quad I/O, and QPI operation - enabling configurable bandwidth scaling from 133 MHz single-line to 532 MHz effective quad-data-rate transfer. Its memory array comprises 65,536 × 256-byte pages organized into uniform 4-kB sectors and larger 32-kB/64-kB blocks.
Hardware write protection is enforced via dedicated /WP pin and status register lock bits (SRP0/SRP1), while Quad Enable (QE) is factory-default active. The device includes a 4-kbit secured OTP register compliant with JEDEC SFDP v1.6, enabling parameter discovery and secure key storage without external encryption controllers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB), organized as 65,536 × 256-byte pages - enables full MCU boot image storage with margin for OTA update staging. |
| Supply Voltage | 1.7 V to 2.0 V - compatible with low-voltage SoC I/O domains and reduces system-level power regulation complexity. |
| Max Clock Frequency | 133 MHz (QPI mode) - achieves 532 MB/s effective bandwidth using Quad I/O, accelerating firmware load times. |
| Read Throughput | 65 MB/s continuous (Fast Read Quad I/O) - meets real-time code shadowing requirements for ARM Cortex-M7/M33 applications. |
| Erase Performance | 60 ms (4-kB block), 200 ms (32-kB), 350 ms (64-kB) - balances granularity for fine-grained data logging vs. bulk firmware updates. |
| Endurance & Retention | 100,000 program/erase cycles; 20-year data retention - certified for mission-critical field-deployed firmware and calibration tables. |
| Power Consumption | 2 µA deep power-down current - enables zero-power retention during system sleep modes in battery-backed IoT nodes. |
Pinout & Package
AT25QL128A-SHE-T is supplied in an 8-pin SOIC (208-mil) package measuring 5.3 mm × 5.3 mm × 1.95 mm, with gull-wing leads and RoHS-compliant matte tin plating. Pin 1 marked by notch or dot; pin 1 corner located at bottom-left when viewed top-side with marking side up.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS | Chip Select | Active-low enable for command/address/data transfers; must be deasserted between operations to terminate bus activity. |
| /WP | Write Protect | Hardware lock for status register and memory blocks; tied low to disable write/erase commands during power-up or fault conditions. |
| /HOLD | Hold Input | Suspends ongoing serial transfer without clock stoppage; used for multi-master arbitration or interrupt latency reduction. |
| SI | Serial Input | Command, address, and data input line in SPI mode; dual-function as IO0 in Dual/Quad I/O and QPI modes. |
| SO | Serial Output | Data output line in SPI mode; dual-function as IO1 in Dual/Quad I/O and QPI modes. |
| SCK | Serial Clock | Master-generated clock synchronizing all I/O; supports up to 133 MHz in QPI mode with tight tV1 = 6 ns clock-to-output timing. |
| VCC | Power Supply | 1.7–2.0 V core and I/O supply; decoupling capacitor (≥100 nF) required within 5 mm of pin per datasheet Section 9.3. |
| GND | Ground | Reference return path for VCC and all signal pins; requires low-impedance connection to PCB ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O + QPI Support | Enables 4-bit parallel data transfer per clock cycle, doubling bandwidth over standard SPI and eliminating need for wider parallel NOR interfaces. |
| Flexible Erase Architecture | Independent 4-kB, 32-kB, and 64-kB erase blocks allow optimal partitioning of boot code, application firmware, and runtime parameters without wasted space. |
| Secured OTP Register | 4-kbit one-time programmable area with hardware lock; stores cryptographic keys or calibration constants immune to field reprogramming. |
| SFDP v1.6 Compliance | Self-describing parameter table accessible via 5Ah command; enables automatic driver configuration without hard-coded timing or command tables. |
| Erase/Program Suspend | Pauses active erase or program operations to service high-priority reads, ensuring deterministic latency in real-time control loops. |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
Use Scenario: Storing bootloader, safety-critical firmware, and configuration profiles in programmable logic controllers operating continuously at 85 °C ambient. IC Role / Device Role / Timing Role: Primary nonvolatile code storage with guaranteed 20-year data retention and 100K-cycle endurance under thermal cycling stress. Use Value: Eliminates need for external EEPROM or backup SRAM; supports field firmware updates via 60-ms 4-kB block erase without disrupting I/O scanning cycles. |
Use Scenario: Holding boot code and sensor calibration data for radar processing units requiring ASIL-B compliance and rapid cold-boot (<500 ms). IC Role / Device Role / Timing Role: High-speed NOR Flash delivering 65 MB/s read throughput to feed ARM Cortex-R5F instruction cache during power-on initialization. Use Value: 133 MHz QPI interface reduces boot time by 40% vs. legacy 80 MHz SPI Flash; deep power-down mode cuts standby current to 2 µA during vehicle sleep. |
| Medical Imaging Parameter Archive | Smart Energy Meter Secure Logging |
Use Scenario: Archiving DICOM header metadata, calibration coefficients, and regulatory audit logs in portable ultrasound devices with battery backup. IC Role / Device Role / Timing Role: Data logger with hardware write protection (/WP pin) and secured OTP for FDA-required immutable calibration records. Use Value: 4-kbit OTP prevents tampering with traceable calibration timestamps; 20-year retention meets medical device lifecycle requirements. |
Use Scenario: Recording tamper-evident energy consumption events, tariff schedules, and firmware version history in ANSI C12.22-compliant smart meters. IC Role / Device Role / Timing Role: Secure event log storage with JEDEC-standard ID read (9Fh) and SFDP parameter discovery for interoperable firmware upgrades. Use Value: Dual/Quad I/O allows encrypted log writes at 32 MB/s while maintaining backward compatibility with legacy SPI host controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q128JVSIM | 3.3 V supply only; no 1.7–2.0 V support; identical 128-Mbit density and SOIC-8 package; lacks secured OTP register. | Requires level-shifting for 1.8 V hosts; unsuitable for secure key storage; same pinout but different command set (no QPI). | Select if system uses 3.3 V I/O and does not require hardware-secured OTP or ultra-low-voltage operation. |
| Micron MT25QL128ABA8E12-0SIT | Pin-compatible 128-Mbit SPI Flash; supports 1.7–2.0 V; includes SFDP and Quad I/O but no QPI mode; 100K endurance, same 20-year retention. | Compatible with AT25QL128A-SHE-T layout; requires software adaptation for QPI-disabled host drivers; no secured OTP capability. | Select when QPI protocol is unused and design prioritizes second-source availability over advanced security features. |
Compared with W25Q128JVSIM and MT25QL128ABA8E12-0SIT, the AT25QL128A-SHE-T uniquely combines 1.7–2.0 V operation, QPI protocol support, and factory-programmable secured OTP - making it the only option among the three for secure, low-voltage, high-bandwidth boot memory in constrained-edge devices.
Availability
AT25QL128A-SHE-T is available at Aetrix Electronics and suitable for industrial PLCs, automotive ADAS modules, medical imaging subsystems, and smart energy metering applications requiring stable component supply across multi-year production cycles.
Supply support for AT25QL128A-SHE-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and memory solutions for automotive, industrial, and IoT markets.
The AT25QL128A-SHE-T belongs to Renesas' AT25QL family of serial NOR Flash devices engineered for high-reliability code execution and secure data storage in resource-constrained embedded systems operating across extended temperature ranges.
FAQ
What voltage range does the AT25QL128A-SHE-T support?
The AT25QL128A-SHE-T operates from a single 1.7 V to 2.0 V supply, optimized for low-power 1.8 V I/O domains. This eliminates level shifters in modern SoC designs and ensures stable operation across industrial temperature ranges (–40 °C to +85 °C). The AT25QL128A-SHE-T's tight voltage tolerance avoids brown-out resets during battery-sourced or DC-DC converter transients.
Does the AT25QL128A-SHE-T support Quad Peripheral Interface (QPI) mode?
Yes, the AT25QL128A-SHE-T supports QPI mode with the 38h command, enabling 4-bit-wide command, address, and data transfers at up to 133 MHz. This yields a 532 MB/s effective bandwidth - double that of Dual I/O and quadruple standard SPI. The AT25QL128A-SHE-T ships with Quad Enable (QE) bit factory-set, allowing immediate QPI activation without configuration overhead.
How is write protection implemented on the AT25QL128A-SHE-T?
Write protection on the AT25QL128A-SHE-T uses dual mechanisms: hardware via the dedicated /WP pin (active-low, latched internally), and software via Status Register Protect bits SRP0/SRP1. When /WP is asserted, all writes to memory and status registers are blocked regardless of SRP state. The AT25QL128A-SHE-T also supports block-protect bits (BP2–BP0) for granular sector locking, configurable through Write Status Register (01h) commands.
What is the purpose of the secured OTP register in the AT25QL128A-SHE-T?
The AT25QL128A-SHE-T integrates a 4-kbit secured One-Time Programmable (OTP) register for storing immutable data such as cryptographic keys, calibration constants, or device-specific identifiers. Once programmed, contents cannot be altered or erased - even by power cycling or command sequences. The AT25QL128A-SHE-T enforces hardware lock via the SEC bit in Status Register-2, preventing accidental or malicious overwrite after initial provisioning.
Can the AT25QL128A-SHE-T suspend ongoing erase or program operations?
Yes, the AT25QL128A-SHE-T supports Erase/Program Suspend (75h) and Resume (7Ah) commands. This allows high-priority read operations to interrupt background erase or program tasks - critical for real-time systems where deterministic latency is required. After servicing the read, the AT25QL128A-SHE-T resumes the suspended operation from its exact point, preserving data integrity and timing predictability.
AT25QL128A-SHE-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR (SLC)
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 150µs, 5ms
- Access Time:
- 6 ns
- Voltage - Supply:
- 1.7V ~ 2V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25QL128A-SHE-T FAQ
1.How can I place an order for AT25QL128A-SHE-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25QL128A-SHE-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25QL128A-SHE-T reliable?
The price and inventory of AT25QL128A-SHE-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25QL128A-SHE-T is usually 5 days.
3.What payment methods are accepted for AT25QL128A-SHE-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25QL128A-SHE-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25QL128A-SHE-T?
AT25QL128A-SHE-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25QL128A-SHE-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25QL128A-SHE-T?
For technical support, including AT25QL128A-SHE-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25QL128A-SHE-T requirements.
6.How does Aetrix verify that AT25QL128A-SHE-T is sourced from the original manufacturer or authorized distributors?
All AT25QL128A-SHE-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25QL128A-SHE-T meets industry standards.
7.What is the process for return or replacement of AT25QL128A-SHE-T?
All AT25QL128A-SHE-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25QL128A-SHE-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25QL128A-SHE-T part is unused and in its original packaging.
Return procedure for AT25QL128A-SHE-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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