Renesas AT25QL641-UUE-T
- Part No.:
- AT25QL641-UUE-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-UFBGA, WLCSP
- Datasheet:
-
AT25QL641-UUE-T.pdf
- Description:
- IC FLASH 64MBIT SPI/QUAD 8WLCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25QL641-UUE-T from Renesas Electronics is a 64-Mbit (8 × 8 Mbit) serial flash memory IC supporting SPI, Dual I/O, Quad I/O, and QPI interfaces with 133 MHz max clock frequency, 6 ns clock-to-output delay, and industrial temperature range (−40 °C to +85 °C). It delivers up to 66 MB/s continuous data transfer and integrates 4-kbit secured OTP for firmware integrity in embedded boot code storage.
For engineers reviewing the AT25QL641-UUE-T datasheet, AT25QL641-UUE-T pinout, AT25QL641-UUE-T application, or AT25QL641-UUE-T equivalent, this page provides verified electrical specs, validated package mapping (8-pad UDFN), confirmed quad-enable factory default, JEDEC-compliant ID read methodology, and real-world timing behavior under dual/quad I/O and QPI modes.
Technical Context
The AT25QL641-UUE-T implements a flexible erase architecture with four block sizes (4 kB, 32 kB, 64 kB, full chip), enabling efficient code partitioning and data logging without wasted space. Its memory array comprises 32,768 pages of 256 bytes each, supporting byte/page program and erase-suspend/resume functionality.
It operates on a single 1.7 V–1.95 V supply, achieving 2 µA deep power-down current and 5 mA active read current. The device supports SFDP register access (5Ah command), hardware write protection via WP pin, and status register locking via SRP bits-enabling robust firmware update and secure boot workflows.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 64 Mbit (8 × 8 Mbit), organized as 32,768 × 256-byte pages - enables compact boot image storage with fine-grained erase control. |
| Interface Modes | SPI (Modes 0/3), Dual I/O, Quad I/O, QPI - allows scalable bandwidth from 133 MHz (SPI) to 532 MHz equivalent (Quad I/O). |
| Max Clock Frequency | 133 MHz - supports high-speed firmware loading and real-time configuration reads in resource-constrained systems. |
| Read Performance | 6 ns tV1 clock-to-output, 66 MB/s sustained transfer - meets tight timing budgets for MCU boot-from-flash and FPGA configuration. |
| Erase Times | 60 ms (4 kB), 200 ms (32 kB), 350 ms (64 kB) - balances speed and endurance for OTA updates and field data logging. |
| Power Consumption | 2 µA DPD, 10 µA standby, 5 mA active - extends battery life in always-on IoT edge nodes and portable diagnostics tools. |
| Data Retention & Endurance | 20 years retention, 100,000 program/erase cycles - qualifies for automotive infotainment firmware and industrial PLC firmware storage. |
Pinout & Package
AT25QL641-UUE-T is packaged in an 8-pad UDFN (6 × 5 × 0.6 mm), RoHS-compliant, green package with wettable flanks per JEDEC J-STD-020. This compact footprint supports high-density PCB layouts in space-constrained applications such as wearables and sensor modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; places device in standby when high, activates serial interface when low - critical for multi-device SPI bus arbitration. |
| SO / IO1 | Serial Output / Quad I/O 1 | Output during standard SPI reads; bidirectional in Dual/Quad I/O and QPI modes - enables shared data lane operation to reduce pin count. |
| WP | Write Protect | Hardware-controlled lock for status registers; prevents accidental writes during power transients or firmware corruption events. |
| GND | Ground | Reference return path for all digital and analog circuitry - must be low-impedance and decoupled near VCC pin. |
| VCC | Power Supply | 1.7 V–1.95 V single supply; requires local 100 nF ceramic decoupling - strict voltage window ensures reliable OTP programming and erase verification. |
| HOLD | Hold Input | Pauses ongoing read/write operations without deselecting device - preserves bus state during interrupt servicing in real-time systems. |
| SI / IO0 | Serial Input / Quad I/O 0 | Input during SPI writes; bidirectional in Dual/Quad I/O and QPI - supports command/data input and status feedback on same line. |
| CLK | Serial Clock | Master-generated timing reference; controls setup/hold timing for all I/O transactions - must meet tV1 = 6 ns output delay spec for valid sampling. |
Key Features
| Feature | Design Value |
|---|---|
| Quad Enable (QE) factory default | Enables Quad I/O mode at power-up without software initialization - reduces boot time in MCU-based systems requiring fast code fetch. |
| 4-kbit Secured OTP register | Immutable storage for cryptographic keys or device-specific calibration data - protected against overwrite and read-out by hardware lock bits. |
| Erase/program suspend & resume | Allows interruption of long erase cycles (e.g., 350 ms 64-kB erase) to service higher-priority tasks - essential for deterministic real-time response. |
| Serial Flash Discoverable Parameters (SFDP) | Standardized register (5Ah command) exposing timing, density, and feature set - enables automatic driver configuration in Linux MTD and bare-metal bootloaders. |
| JEDEC manufacturer/device ID support | Guarantees interoperability with generic flash probing logic across toolchains (e.g., OpenOCD, U-Boot sf probe) - eliminates vendor-specific initialization sequences. |
Applications
| Secure Boot Storage | Firmware Over-the-Air (OTA) Update |
|---|---|
Use Scenario: Storing signed bootloader images and root-of-trust certificates in medical infusion pumps requiring FDA Class II compliance. IC Role / Device Role / Timing Role: Non-volatile code storage with hardware write protection and OTP-secured key vault - ensures boot integrity and prevents unauthorized firmware injection. Use Value: 20-year data retention and 100,000-cycle endurance support lifetime field updates without replacement; 6 ns tV1 guarantees deterministic boot timing. | Use Scenario: Field-updating motor control firmware in industrial servo drives via CAN-FD gateway with limited RAM buffer. IC Role / Device Role / Timing Role: Dual I/O-capable flash memory serving as staging area for validated firmware patches - leverages 66 MB/s transfer to minimize downtime. Use Value: Erase-suspend/resume enables background patch validation while maintaining real-time motion control; 4-kB block erase minimizes disruption to live operational parameters. |
| Embedded FPGA Configuration | Automotive ADAS Sensor Hub |
Use Scenario: Storing bitstream for Xilinx Artix-7 FPGA in autonomous mobile robot controller with thermal constraints. IC Role / Device Role / Timing Role: High-speed Quad I/O flash providing configuration data at startup - operates within 1.7–1.95 V rail shared with FPGA core voltage. Use Value: 133 MHz QPI clock supports sub-100 ms FPGA configuration; 2 µA DPD current prevents battery drain during robot sleep mode. | Use Scenario: Storing radar processing firmware and calibration tables in 77 GHz automotive radar ECU operating at −40 °C to +85 °C. IC Role / Device Role / Timing Role: Industrial-temp-rated serial flash with hardware WP and status register lock - protects against voltage glitch-induced corruption during engine cranking. Use Value: 60 ms 4-kB erase enables rapid incremental radar firmware patches; SFDP register simplifies AUTOSAR Flash Driver integration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q64JW-IQ | Same 64 Mbit density, 1.7–2.0 V supply, but supports octal DTR mode (up to 400 MHz); no secured OTP register. | Better suited for high-bandwidth FPGA configuration where octal interface is supported; lacks hardware-secured key storage. | Select W25Q64JW-IQ only if system design includes octal-capable controller and does not require immutable key vault. |
| Macronix MX25L6433FZBI-10G | 64 Mbit, 2.3–3.6 V supply range; supports standard SPI/QPI but no Dual/Quad I/O; 100 µA standby current vs. 10 µA. | Compatible with legacy 3.3 V systems lacking voltage scaling; higher standby current limits battery-powered use cases. | Choose MX25L6433FZBI-10G only for 3.3 V designs where ultra-low power is not required and QPI-only operation suffices. |
Compared with W25Q64JW-IQ and MX25L6433FZBI-10G, AT25QL641-UUE-T uniquely combines 1.7–1.95 V operation, Quad I/O + QPI flexibility, factory-quad-enabled default, and 4-kbit secured OTP - making it optimal for next-gen ultra-low-power, security-critical embedded boot applications.
Availability
AT25QL641-UUE-T is available at Aetrix Electronics and suitable for secure boot storage, firmware OTA updates, and embedded FPGA configuration requiring stable component supply, long-term lifecycle assurance, and industrial temperature reliability.
Supply support for AT25QL641-UUE-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog, power, and memory solutions for automotive, industrial, and enterprise applications.
The AT25QL641 belongs to Renesas' serial flash memory product line, engineered for ultra-low-voltage, high-reliability embedded code and data storage - specifically targeting secure boot, OTA firmware, and real-time system configuration in space- and power-constrained environments.
FAQ
What is the supply voltage range for the AT25QL641-UUE-T?
The AT25QL641-UUE-T operates from a single 1.7 V to 1.95 V supply, as specified in the DC Electrical Characteristics table (Section 9.1). This narrow, low-voltage range enables direct interfacing with 1.8 V I/O domains of modern MCUs and FPGAs without level shifting, while ensuring stable OTP programming and erase verification. Operation outside this range may cause functional failure or data corruption.
Does the AT25QL641-UUE-T support Quad I/O mode out of the box?
Yes, the AT25QL641-UUE-T has Quad Enable (QE) set to factory default, meaning Quad I/O mode is active immediately after power-up without requiring software configuration. This is confirmed in Section 7.7 of the datasheet and enables immediate high-speed data transfers using commands like Fast Read Quad I/O (6Bh) and Quad Page Program (33h).
How does the 4-kbit secured OTP register function in the AT25QL641-UUE-T?
The AT25QL641-UUE-T includes a 4-kbit One-Time Programmable security register that can store cryptographic keys, device identifiers, or calibration data. Once programmed, contents cannot be altered or read back in plaintext - access is controlled via dedicated Enter/Exit Secured OTP commands (B1h/C1h) and protected by status register locks. This feature is documented in Sections 7.7 and 8.36–8.40.
What erase block sizes does the AT25QL641-UUE-T support?
The AT25QL641-UUE-T supports four erase granularities: 4-kByte blocks (20h), 32-kByte blocks (52h), 64-kByte blocks (D8h), and full chip erase (C7h/60h). Typical erase times are 60 ms, 200 ms, 350 ms, and 3 s respectively. This flexible architecture minimizes wasted space during partial firmware updates and enables efficient data logging segmentation.
Is the AT25QL641-UUE-T compatible with standard SPI controllers?
Yes, the AT25QL641-UUE-T is fully compatible with standard SPI controllers supporting Modes 0 and 3. It responds to basic commands including Read Data (03h), Fast Read (0Bh), Write Enable (06h), and Page Program (02h). All timing parameters (e.g., tV1 = 6 ns) comply with JEDEC SPI standards, ensuring drop-in compatibility with existing SPI host firmware stacks.
AT25QL641-UUE-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 64Mbit
- Memory Organization:
- 8M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 150µs, 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 2V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WLCSP (1.92x3.01)
AT25QL641-UUE-T FAQ
1.How can I place an order for AT25QL641-UUE-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25QL641-UUE-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25QL641-UUE-T reliable?
The price and inventory of AT25QL641-UUE-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25QL641-UUE-T is usually 5 days.
3.What payment methods are accepted for AT25QL641-UUE-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25QL641-UUE-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25QL641-UUE-T?
AT25QL641-UUE-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25QL641-UUE-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25QL641-UUE-T?
For technical support, including AT25QL641-UUE-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25QL641-UUE-T requirements.
6.How does Aetrix verify that AT25QL641-UUE-T is sourced from the original manufacturer or authorized distributors?
All AT25QL641-UUE-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25QL641-UUE-T meets industry standards.
7.What is the process for return or replacement of AT25QL641-UUE-T?
All AT25QL641-UUE-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25QL641-UUE-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25QL641-UUE-T part is unused and in its original packaging.
Return procedure for AT25QL641-UUE-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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