Renesas AT25SF161B-SHD-B
- Part No.:
- AT25SF161B-SHD-B
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT25SF161B-SHD-B.pdf
- Description:
- IC FLASH 16MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT25SF161B-SHD-B from Renesas Electronics is a 16-Mbit SPI serial flash memory IC supporting dual I/O and quad I/O operations, with 108 MHz max clock frequency, 2.5–3.6 V supply range, and execute-in-place (XiP) capability for embedded boot and code storage applications.
For engineers reviewing the AT25SF161B-SHD-B datasheet, AT25SF161B-SHD-B pinout, AT25SF161B-SHD-B application, or AT25SF161B-SHD-B equivalent, key selection criteria include quad-SPI timing compliance (1-4-4/0-4-4), 4 kB/32 kB/64 kB erase granularity, OTP security registers, SFDP support, and low-power deep power-down mode (1.5 µA).
Technical Context
The AT25SF161B-SHD-B implements a flexible SPI interface compliant with modes 0 and 3, enabling dual-output (1-1-2), dual-I/O (1-2-2), quad-output (1-1-4), and quad-I/O (1-4-4, 0-4-4) read protocols. Its XiP-optimized architecture supports continuous read with wrap (8/16/32/64-byte) and fast read up to 108 MHz.
Internally, it features three status registers (SR1–SR3), programmable protection via WP pin and non-volatile bits, 3 × 256-byte OTP security registers, and erasable memory blocks sized at 4 kB, 32 kB, and 64 kB - plus full-chip erase - all with verified typical times of 50 ms, 120 ms, 200 ms, and 5.5 s respectively.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 16 Mbit (2 MB) organized as 2,097,152 bytes; enables firmware storage for mid-size MCU boot images and configuration data. |
| Max Clock Frequency | 108 MHz in quad-I/O mode; delivers up to 54 MB/s effective read bandwidth for real-time XiP execution. |
| Erase Granularity | 4 kB / 32 kB / 64 kB block erase and full-chip erase; allows selective firmware update without disturbing adjacent code or data sectors. |
| Program Time | 0.4 ms typical for 1–256 byte page program; supports incremental configuration writes with minimal latency impact. |
| Power Consumption | 15 µA max standby current; 1.5 µA max deep power-down current; suitable for battery-backed or energy-constrained IoT nodes. |
| Data Retention & Endurance | 20 years retention; 100,000 program/erase cycles; meets industrial lifecycle requirements for field-deployed equipment. |
| Operating Temperature | –40 °C to +85 °C; qualified for industrial-grade operation in automotive infotainment, PLCs, and edge gateways. |
Pinout & Package
AT25SF161B-SHD-B is packaged in an 8-lead SOIC (0.208" wide), with pins arranged top-view counterclockwise from notch: Pin 1 = CS, Pin 2 = SO (I/O1), Pin 3 = WP (I/O2), Pin 4 = GND, Pin 5 = VCC, Pin 6 = HOLD (I/O3), Pin 7 = SCK, Pin 8 = SI (I/O0).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must transition high-to-low to initiate commands and low-to-high to terminate operations; requires external 10 kΩ pull-up to VCC for reliable power-up sequencing. |
| SCK | Serial Clock | Master-generated clock; rising edge latches input (SI), falling edge clocks output (SO); defines timing for all SPI transactions including quad-I/O modes. |
| SI (I/O0) | Serial Input / Quad I/O Lane 0 | Primary command/address/data input; becomes bidirectional I/O0 in dual/quad modes; ignored when CS is high. |
| SO (I/O1) | Serial Output / Quad I/O Lane 1 | Primary data output; becomes bidirectional I/O1 in dual/quad modes; enters high-Z state when CS is deasserted. |
| WP (I/O2) | Write Protect / Quad I/O Lane 2 | Configurable as hardware write-protect (low-active) or I/O2; function determined by QE bit in Status Register 2; internally pulled high. |
| HOLD (I/O3) | Hold / Quad I/O Lane 3 | Pauses ongoing SPI transfer without resetting clock phase; becomes I/O3 in quad mode; internally pulled high; requires CS low to activate hold. |
Key Features
| Feature | Design Value |
|---|---|
| Quad-I/O & XiP Support | Enables 0-4-4 continuous read mode eliminating opcode overhead, accelerating boot time and real-time code fetch in microcontroller systems. |
| Flexible Erase Architecture | Independent 4 kB, 32 kB, and 64 kB erase blocks allow firmware updates confined to modified modules, preserving integrity of unmodified code and calibration data. |
| OTP Security Registers | Three 256-byte one-time programmable registers provide tamper-resistant storage for keys, certificates, or device-specific identifiers. |
| SFDP Compliance | Serial Flash Discoverable Parameters register enables automatic host configuration of timing, voltage, and command sets without hard-coded driver dependencies. |
| Deep Power-Down Mode | Reduces current to 1.5 µA while retaining memory contents; ideal for always-on IoT sensors requiring multi-year battery life. |
Applications
| Industrial PLC Firmware Storage | Automotive Infotainment Boot Memory |
|---|---|
|
Use Scenario: Storing firmware images and configuration parameters in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Non-volatile boot memory providing execute-in-place (XiP) code execution directly from flash, reducing RAM footprint and boot latency. Use Value: 4 kB erase granularity permits field-upgradable control logic without reprogramming entire firmware; 20-year data retention ensures long-term reliability across maintenance cycles. |
Use Scenario: Hosting boot loader and OS kernel for head-unit microprocessors in automotive infotainment systems operating across –40 °C to +85 °C. IC Role / Device Role / Timing Role: High-speed SPI flash delivering 108 MHz quad-I/O reads to meet automotive boot timing constraints and support secure firmware validation. Use Value: OTP security registers store cryptographic keys for secure boot; JEDEC-standard ID enables automated BOM verification during manufacturing. |
| Edge Gateway Configuration Storage | Smart Meter Firmware & Calibration Data |
|
Use Scenario: Persisting network credentials, OTA update metadata, and sensor calibration tables in cellular/NB-IoT edge gateways deployed outdoors. IC Role / Device Role / Timing Role: Low-power serial flash supporting deep power-down (1.5 µA) and fast wake-up for intermittent connectivity and periodic data uploads. Use Value: Dual-I/O and quad-I/O modes reduce SPI bus occupancy during firmware patching; SFDP register simplifies driver portability across gateway platforms. |
Use Scenario: Storing metering firmware, tariff tables, and factory-calibrated ADC coefficients in ANSI C12.22-compliant smart electricity meters. IC Role / Device Role / Timing Role: Industrial-grade flash with 100,000 P/E cycles and 20-year retention, ensuring accuracy over 15+ year field lifetime. Use Value: User-definable protected memory regions prevent accidental overwrite of calibration data; WP pin enables hardware-level write lock during field service. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q16JW-QA | 16 Mbit density, 133 MHz max clock, 1.65–3.6 V supply; lacks OTP registers and SFDP v1.6 support; uses different status register layout. | Compatible for basic boot storage but not for XiP-critical or security-sensitive designs requiring OTP key storage. | Select W25Q16JW-QA only if higher clock speed is prioritized over security features and SFDP-driven auto-configuration. |
| Micron MT25QL128ABA1EW9-0SIT | 128 Mbit density, 133 MHz, 2.7–3.6 V; supports octal DTR mode; includes enhanced security (Secure OTP, RPU); larger capacity and higher cost. | Overqualified for 16 Mbit use cases; suited for systems scaling to larger firmware footprints or requiring advanced security beyond basic OTP. | Choose MT25QL128ABA1EW9-0SIT when future-proofing for firmware growth or when RPU-based secure boot is mandated. |
Compared with W25Q16JW-QA and MT25QL128ABA1EW9-0SIT, the AT25SF161B-SHD-B delivers optimal balance of XiP-optimized quad-I/O performance, industrial temperature range, integrated OTP security, and low-power deep power-down - making it ideal for cost-sensitive, security-aware embedded systems where 16 Mbit capacity suffices.
Availability
AT25SF161B-SHD-B is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive infotainment boot memory, and edge gateway configuration storage requiring stable component supply and long-term lifecycle assurance.
Supply support for AT25SF161B-SHD-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and memory solutions for industrial, automotive, and enterprise applications.
The AT25SF161B belongs to Renesas' AT25SF family of SPI flash devices engineered for high-reliability embedded systems requiring execute-in-place, low-power operation, and hardware-based security features.
FAQ
What is the maximum SPI clock frequency supported by the AT25SF161B-SHD-B?
The AT25SF161B-SHD-B supports a maximum SPI clock frequency of 108 MHz in quad-I/O (1-4-4 and 0-4-4) modes. This enables high-throughput read operations critical for execute-in-place (XiP) applications. The device maintains full functionality across its specified 2.5–3.6 V supply range and –40 °C to +85 °C operating temperature, with timing validated per AC characteristics in the official Renesas datasheet DS-AT25SF161B-188 Rev. H.
Does the AT25SF161B-SHD-B support execute-in-place (XiP) operation?
Yes, the AT25SF161B-SHD-B is explicitly designed for execute-in-place operation. It achieves this through quad-SPI support (1-4-4/0-4-4), continuous read mode with wrap, and 108 MHz maximum clock frequency - all documented in the Product Overview section of the Renesas datasheet. These features minimize instruction fetch latency and eliminate the need to copy code into RAM before execution, reducing system memory requirements.
How many one-time programmable (OTP) security registers does the AT25SF161B-SHD-B include?
The AT25SF161B-SHD-B includes three 256-byte one-time programmable (OTP) security registers, totaling 768 bytes of tamper-resistant storage. These registers are accessible via dedicated commands (42h program, 48h read, 44h erase) and are intended for storing cryptographic keys, device identifiers, or secure boot parameters. Their OTP nature ensures irreversible programming, meeting foundational requirements for secure firmware deployment.
What package type is used for the AT25SF161B-SHD-B variant?
The AT25SF161B-SHD-B uses an 8-lead, 0.208" wide EIAJ SOIC package, as confirmed by Renesas' Ordering Information section (page 58 of DS-AT25SF161B-188 Rev. H). This package is RoHS-compliant, halide-free, and Pb-free, and features standard SOIC pinout with exposed pad not present - distinguishing it from DFN or WLCSP variants in the same family.
Does the AT25SF161B-SHD-B support Serial Flash Discoverable Parameters (SFDP)?
Yes, the AT25SF161B-SHD-B implements the Serial Flash Discoverable Parameters (SFDP) register, accessible via command 5Ah. This standardized mechanism allows host systems to automatically detect and configure device parameters - including timing, voltage, and command sets - without requiring hardcoded driver assumptions. SFDP support simplifies software portability and reduces qualification effort across multiple platforms.
AT25SF161B-SHD-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 16Mbit
- Memory Organization:
- 2M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 108 MHz
- Write Cycle Time - Word, Page:
- 50µs, 1.8ms
- Access Time:
- 7 ns
- Voltage - Supply:
- 2.5V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25SF161B-SHD-B FAQ
1.How can I place an order for AT25SF161B-SHD-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25SF161B-SHD-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25SF161B-SHD-B reliable?
The price and inventory of AT25SF161B-SHD-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25SF161B-SHD-B is usually 5 days.
3.What payment methods are accepted for AT25SF161B-SHD-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25SF161B-SHD-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25SF161B-SHD-B?
AT25SF161B-SHD-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25SF161B-SHD-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25SF161B-SHD-B?
For technical support, including AT25SF161B-SHD-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25SF161B-SHD-B requirements.
6.How does Aetrix verify that AT25SF161B-SHD-B is sourced from the original manufacturer or authorized distributors?
All AT25SF161B-SHD-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25SF161B-SHD-B meets industry standards.
7.What is the process for return or replacement of AT25SF161B-SHD-B?
All AT25SF161B-SHD-B units undergo pre-shipment inspection (PSI). If there is an issue with AT25SF161B-SHD-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25SF161B-SHD-B part is unused and in its original packaging.
Return procedure for AT25SF161B-SHD-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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