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Renesas AT25SL128A-SHE-T
- Part No.:
- AT25SL128A-SHE-T
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT25SL128A-SHE-T.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,578
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Product details
Overview
AT25SL128A-SHE-T from Renesas Electronics is a 128-Mbit SPI serial flash memory IC supporting Quad I/O (1-4-4), QPI (4-4-4), and Execute-in-Place (XiP) operation at up to 133 MHz read speed, with 1.7–2.0 V single-supply operation and industrial temperature range (–40 °C to +85 °C). It enables fast boot code storage and direct execution in resource-constrained embedded systems.
For engineers reviewing the AT25SL128A-SHE-T datasheet, AT25SL128A-SHE-T pinout, AT25SL128A-SHE-T application, or AT25SL128A-SHE-T equivalent, key selection criteria include quad/dual I/O timing compatibility, 4-kB/32-kB/64-kB erase granularity, deep power-down current (2 µA), SFDP register support, and WP/HOLD pin-controlled memory protection.
Technical Context
The AT25SL128A-SHE-T implements a flexible command architecture supporting four SPI protocol modes: standard (1-1-1), dual output (1-1-2), quad output (1-1-4), and full quad I/O (1-4-4) or QPI (4-4-4). Its XiP capability relies on continuous read with wrap and zero-latency command elimination via 0-4-4 mode.
Internally, it features dual status registers with configurable block protection (BP2–BP0, TB, SEC), quad enable (QE), erase/program suspend/resume, and JEDEC-compliant SFDP v1.6 for automatic parameter discovery. Memory protection is enforced via hardware WP pin and volatile/non-volatile status bits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB); sufficient for firmware images, configuration data, and bootloader storage in mid-tier microcontrollers. |
| Supply Voltage | 1.7 V – 2.0 V; enables direct interface with low-voltage SoCs and reduces system-level power conversion complexity. |
| Max Read Speed | 133 MHz in QPI 4-4-4 mode; delivers ~66.5 MB/s effective throughput for XiP-critical applications. |
| Erase Granularity | 4 kB / 32 kB / 64 kB blocks and full chip; allows fine-grained firmware updates without erasing entire memory. |
| Endurance & Retention | 100,000 program/erase cycles and 20-year data retention; validated for long-life industrial deployments. |
| Power Modes | 10 µA standby, 2 µA deep power-down; supports ultra-low-power sleep states in battery-backed or energy-harvesting systems. |
| Interface Protocols | SPI Modes 0/3, Dual SPI (1-1-2), Quad SPI (1-1-4), Quad I/O (1-4-4, 0-4-4), QPI (4-4-4); ensures interoperability across legacy and high-performance hosts. |
Pinout & Package
AT25SL128A-SHE-T is packaged in an 8-lead SOIC (208-mil) with gull-wing leads, measuring 5.3 mm × 5.3 mm × 1.75 mm (max height), RoHS-compliant and halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable for SPI command initiation; must be asserted before SCK edge to avoid spurious reads/writes. |
| SO / IO1 | Serial Output / I/O 1 | Output-only in standard SPI; bidirectional in Dual/Quad I/O modes; shares pin with IO1 for space-efficient routing. |
| WP / IO2 | Write Protect / I/O 2 | Hardware lock for top/bottom memory blocks; doubles as IO2 in Quad I/O mode; requires external pull-up for default protection. |
| GND | Ground | Reference return path for all digital and power signals; separate analog/digital ground not required. |
| VCC | Power Supply | 1.7–2.0 V core supply; decoupling capacitor (≥100 nF) required within 5 mm of pin per datasheet layout guidelines. |
| HOLD / IO3 | Hold Input / I/O 3 | Pauses ongoing read/write without deselecting device; functions as IO3 in Quad I/O; active-low with internal pull-down. |
| SCK | Serial Clock | Master-generated clock driving all SPI transactions; max frequency 133 MHz in QPI mode; duty cycle 40–60% compliant. |
| SI / IO0 | Serial Input / I/O 0 | Command/data input in SPI; bidirectional in Dual/Quad I/O; serves as primary data lane in 1-4-4 and 4-4-4 protocols. |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O & QPI Support | Enables 4-bit-per-cycle transfers and eliminates command overhead in 0-4-4 mode-critical for deterministic XiP latency. |
| Flexible Erase Architecture | Independent 4 kB, 32 kB, and 64 kB block erase times (60 ms / 200 ms / 350 ms typ.) allow partial firmware updates without full-chip erase. |
| Erase/Program Suspend | Permits background read access during long erase operations-essential for real-time systems requiring concurrent memory access. |
| SFDP v1.6 Register | Provides standardized, host-readable parameter table (e.g., erase sizes, timing, voltage ranges), eliminating hardcoded assumptions in bootloader code. |
| User-Definable Memory Protection | Configurable protected zones at memory start/end via BP bits and TB flag; enforced by WP pin or status register settings-prevents accidental firmware corruption. |
| Deep Power-Down Mode | Reduces current to 2 µA typical while preserving memory state-enables multi-year battery life in always-on sensor nodes. |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Image |
|---|---|
Use Scenario: Storing and executing boot firmware for programmable logic controllers operating in harsh environments with wide temperature swings. IC Role / Device Role / Timing Role: Non-volatile program memory enabling cold-start execution and field firmware upgrades over CAN or Ethernet. Use Value: 20-year data retention and –40 °C to +85 °C operation ensure reliability across decades of unattended deployment. |
Use Scenario: Hosting safety-critical boot code and sensor calibration data for camera/radar modules in advanced driver-assistance systems. IC Role / Device Role / Timing Role: High-speed XiP-capable flash delivering sub-100 µs instruction fetch latency under QPI 133 MHz operation. Use Value: 133 MHz QPI read speed and 4-kB erase granularity enable rapid, atomic firmware patching without system reset. |
| IoT Edge Gateway Configuration | Medical Diagnostic Device Log Storage |
Use Scenario: Persisting network credentials, encryption keys, and device-specific parameters in cellular/Wi-Fi-enabled gateways deployed remotely. IC Role / Device Role / Timing Role: Secure, write-protected non-volatile storage with hardware-enforced WP pin and SFDP-managed parameter validation. Use Value: User-definable protected area and 100,000-cycle endurance support frequent OTA updates while safeguarding critical identity data. |
Use Scenario: Recording time-stamped diagnostic logs, calibration history, and audit trails in portable ultrasound or ECG devices with strict regulatory traceability requirements. IC Role / Device Role / Timing Role: High-reliability data logger using page-program (0.6 ms typ.) and continuous-read wrap for burst acquisition. Use Value: 2 µA deep power-down current extends battery life between clinical sessions; 20-year retention satisfies FDA record-keeping mandates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q128JVSIM | 3.3 V supply (vs. 1.7–2.0 V); no QPI mode; supports only 1-1-4 and 1-4-4; 104 MHz max read speed. | Requires level-shifting for 1.8 V hosts; lacks QPI's command efficiency for XiP; lower throughput limits real-time code execution bandwidth. | Select when interfacing with 3.3 V microcontrollers and QPI is unnecessary; verify hold-time compliance with slower clock edges. |
| Micron MT25QL128ABA8ESF-0SIT | 1.7–2.0 V compatible; supports QPI and 133 MHz reads; includes octal DTR mode (not supported by AT25SL128A-SHE-T). | Offers higher bandwidth potential but adds complexity in initialization and timing closure; octal mode unused in AT25SL128A-SHE-T designs. | Prefer for future-proofing where octal-ready toolchains exist; otherwise, AT25SL128A-SHE-T provides identical QPI/XiP performance with simpler bring-up. |
Compared with W25Q128JVSIM and MT25QL128ABA8ESF-0SIT, the AT25SL128A-SHE-T uniquely balances 1.8 V native operation, full QPI support, and proven XiP timing-making it optimal for cost-sensitive, low-power industrial and automotive boot memory where command efficiency and voltage compatibility are decisive.
Availability
AT25SL128A-SHE-T is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive ADAS boot image loading, and IoT edge gateway configuration requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for AT25SL128A-SHE-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and memory solutions for industrial, automotive, and infrastructure markets.
The AT25SL128A product line delivers high-performance, low-voltage serial flash optimized for Execute-in-Place (XiP) and secure firmware storage in space- and power-constrained embedded systems.
FAQ
What is the maximum clock frequency supported by AT25SL128A-SHE-T in QPI mode?
The AT25SL128A-SHE-T supports up to 133 MHz in QPI (4-4-4) mode, enabling a theoretical data rate of 66.5 MB/s. This specification is validated across the full industrial temperature range (–40 °C to +85 °C) and requires proper PCB layout with controlled impedance and minimal trace length mismatch. The AT25SL128A-SHE-T datasheet specifies AC timing parameters including tVH, tVH, and tWH for QPI command validation.
Does AT25SL128A-SHE-T support Execute-in-Place (XiP) functionality?
Yes, the AT25SL128A-SHE-T explicitly supports Execute-in-Place through three complementary features: Quad I/O (1-4-4) and QPI (4-4-4) interfaces for high-bandwidth instruction fetch, continuous read with wrap (0-4-4 command) to eliminate repeated opcode transmission, and fast read timing (133 MHz). These capabilities are documented in the AT25SL128A-SHE-T datasheet Section 1 and verified in application notes for Renesas Synergy and RA MCU families.
How is memory protection implemented on AT25SL128A-SHE-T?
AT25SL128A-SHE-T implements dual-layer memory protection: hardware-based via the WP pin (active-low, tied to VCC through pull-up for default lock), and software-configurable via status register bits BP2–BP0, TB, and SEC. Protection granularity includes top/bottom selection and 4-kB/32-kB/64-kB block alignment. The AT25SL128A-SHE-T datasheet Table 4 and Section 6.1 detail encoding and activation conditions for each configuration.
What package type does AT25SL128A-SHE-T use, and what are its dimensions?
AT25SL128A-SHE-T uses an 8-lead SOIC (208-mil) package, also designated as "WSOIC" in Renesas documentation. Its dimensions are 5.3 mm × 5.3 mm × 1.75 mm (maximum height), with gull-wing leads and RoHS-compliant, halogen-free construction. This package is listed in AT25SL128A-SHE-T datasheet Section 11.2 and Figure 3 (top view).
Is Serial Flash Discoverable Parameter (SFDP) support available on AT25SL128A-SHE-T?
Yes, the AT25SL128A-SHE-T includes JEDEC-compliant SFDP v1.6 support, accessible via command 5Ah. The SFDP register contains standardized tables describing erase sizes, timing parameters, voltage ranges, and feature flags-enabling host firmware to auto-configure without hardcoding device-specific values. This capability is confirmed in AT25SL128A-SHE-T datasheet Sections 1 and 8.36.
AT25SL128A-SHE-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR (SLC)
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 150µs, 5ms
- Access Time:
- 6 ns
- Voltage - Supply:
- 1.7V ~ 2V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT25SL128A-SHE-T FAQ
1.How can I place an order for AT25SL128A-SHE-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT25SL128A-SHE-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT25SL128A-SHE-T reliable?
The price and inventory of AT25SL128A-SHE-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT25SL128A-SHE-T is usually 5 days.
3.What payment methods are accepted for AT25SL128A-SHE-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT25SL128A-SHE-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT25SL128A-SHE-T?
AT25SL128A-SHE-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT25SL128A-SHE-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT25SL128A-SHE-T?
For technical support, including AT25SL128A-SHE-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT25SL128A-SHE-T requirements.
6.How does Aetrix verify that AT25SL128A-SHE-T is sourced from the original manufacturer or authorized distributors?
All AT25SL128A-SHE-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT25SL128A-SHE-T meets industry standards.
7.What is the process for return or replacement of AT25SL128A-SHE-T?
All AT25SL128A-SHE-T units undergo pre-shipment inspection (PSI). If there is an issue with AT25SL128A-SHE-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT25SL128A-SHE-T part is unused and in its original packaging.
Return procedure for AT25SL128A-SHE-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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