Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Renesas AT26DF321-SU

Part No.:
AT26DF321-SU
Manufacturer:
Renesas
Category:
Memory
Package:
8-SOIC (0.209", 5.30mm Width)
Datasheet:
AetrixAT26DF321-SU.pdf
Description:
IC FLASH 32MBIT SPI 66MHZ 8SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,282

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

AT26DF321-SU from Adesto Technologies (now part of Dialog Semiconductor) is a 32-Mbit serial Flash memory IC designed for code shadowing and data storage in embedded systems. It operates from a single 2.7V–3.6V supply, supports SPI Modes 0 and 3, delivers up to 70 MHz clock frequency, and features uniform 4/32/64-Kbyte erase blocks - enabling efficient firmware updates and parameter logging in resource-constrained microcontroller applications.

For engineers reviewing the AT26DF321-SU datasheet, AT26DF321-SU pinout, AT26DF321-SU application, or AT26DF321-SU equivalent, this page provides verified electrical parameters, sector protection behavior, Deep Power-down current (10 µA), endurance (100,000 cycles), and real-world use cases in industrial control firmware storage and automotive infotainment boot code retention.

Technical Context

The AT26DF321-SU implements a SPI-compatible command set with hardware-controlled write protection via WP and HOLD pins, supporting byte/page programming (1–256 bytes), sequential program mode, and four-level erase granularity (4K/32K/64K blocks + full chip). Its status register includes Write Enable Latch (WEL), Erase/Program Error (EPE), and Busy bits for precise operation control.

Memory architecture comprises thirty-two 64-Kbyte physical sectors, each individually lockable via hardware or command-based sector protection. The device uses an internal address counter for automatic increment during read and sequential program operations, eliminating repeated address transmission and reducing SPI bus overhead in firmware update routines.

Key Specifications

Parameter Value and Actual Design Meaning
Memory Density 32 Mbit (4 MByte) - sufficient for full bootloader + application firmware in compact MCU designs
Supply Voltage 2.7V–3.6V - compatible with standard 3.3V logic rails without level-shifting or auxiliary supplies
Max Clock Frequency 70 MHz - enables fast read throughput (~8.75 MB/s theoretical) for time-critical boot loading
Active Read Current 5 mA typical - low enough to sustain continuous read during system initialization without thermal concern
Deep Power-down Current 10 µA typical - allows battery-backed retention in always-on subsystems with minimal quiescent drain
Endurance 100,000 program/erase cycles - supports field firmware updates over product lifetime in industrial gateways
Data Retention 20 years at 85°C - meets long-term reliability requirements for automotive and infrastructure deployments

Pinout & Package

AT26DF321-SU is available in two RoHS-compliant, green packages: 8-lead SOIC (208-mil wide) and 8-pad MLF (6 × 5 × 1.00 mm). Both packages share identical pin functions and ordering codes differentiated only by suffix (-SU = SOIC, -MUN = MLF).

Pin/Terminal Circuit Role Design Meaning
CS Chip Select input Active-low enable signal; rising edge ends all operations and places SO in high-impedance state
SCK Serial clock input Controls timing of SPI transfers; data latched on rising edge, output shifted on falling edge
SI Serial input Accepts opcodes, addresses, and program data; MSB-first protocol required
SO Serial output Drives read data and status register contents; high-impedance when CS is deasserted
WP Hardware write protect Low-active pin that locks protected sectors; internally pulled-high; optional external VCC tie
HOLD Communication pause Halts ongoing SPI transfer without deselecting device; requires CS asserted and SCK low to activate
VCC Power supply Single 2.7–3.6V source powers all internal logic, charge pumps, and I/O buffers
GND Ground reference Common return path for power and signals; must be low-impedance connection to system ground plane

Key Features

Feature Design Value
Flexible erase architecture Four granularities (4K/32K/64K blocks + full chip) minimize wasted space during partial firmware updates
Individual sector protection 32 × 64-Kbyte sectors can be locked/unlocked independently - isolates boot code from runtime data corruption
Hardware-controlled locking WP pin physically disables program/erase in protected sectors - immune to software glitches or malware
Sequential Program Mode Eliminates repeated address transmission for consecutive byte writes - reduces SPI traffic by >60% vs. discrete byte programming
Automatic error detection Status register EPE bit flags failed program/erase operations - enables robust recovery without external verification

Applications

Industrial PLC Firmware Storage Automotive Infotainment Boot Code

Use Scenario: Storing and updating ladder logic firmware in programmable logic controllers operating in harsh factory environments.

IC Role / Device Role / Timing Role: Non-volatile code storage with sector-protected bootloader region and user-programmable application partition.

Use Value: 100,000-cycle endurance and 20-year data retention ensure reliable field upgrades across 15+ year product lifecycles without memory replacement.

Use Scenario: Holding secure boot images and configuration data in head-unit systems requiring ASIL-B compliance.

IC Role / Device Role / Timing Role: SPI-connected Flash memory providing authenticated boot code with hardware write-protection for critical startup routines.

Use Value: Hardware WP pin prevents accidental or malicious overwrite of boot sector during OTA updates or diagnostics sessions.

Medical Device Parameter Logging Smart Energy Meter Firmware

Use Scenario: Recording calibration coefficients, usage logs, and fault history in portable diagnostic equipment with battery backup.

IC Role / Device Role / Timing Role: Low-power data logger using Deep Power-down mode (10 µA) between measurement intervals.

Use Value: 10 µA deep-sleep current extends coin-cell life beyond 5 years while preserving critical regulatory audit trails.

Use Scenario: Hosting firmware and tariff tables in ANSI C12.22-compliant smart meters deployed in utility grids.

IC Role / Device Role / Timing Role: Dual-sector Flash partition: one for certified firmware (globally protected), one for field-updatable tariff data (individually protected).

Use Value: Global Protect/Unprotect feature simplifies factory programming - entire array unlocked once for initial load, then locked permanently.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial Flash memory applications.

Alternative Part Technical Difference Application Difference Selection Advice
Winbond W25Q32JVSSIQ 32-Mbit, 1.8V–3.6V supply, 104 MHz max clock, Quad SPI support (vs. AT26DF321-SU's single I/O SPI only) Higher bandwidth needed for graphics overlay or audio streaming; not drop-in due to different command set and QSPI interface Select W25Q32JVSSIQ only if system design includes Quad SPI controller and requires >70 MHz read speed
Macronix MX25L3233FZNI-10G 32-Mbit, 2.7V–3.6V supply, 104 MHz max clock, supports SPI Modes 0/3, but lacks hardware HOLD pin and has no Deep Power-down mode Lower standby current not achievable; unsuitable for battery-powered logging where 10 µA deep-sleep is mandatory Choose MX25L3233FZNI-10G only when maximum read speed is prioritized over ultra-low-power sleep states

Compared with W25Q32JVSSIQ and MX25L3233FZNI-10G, the AT26DF321-SU uniquely balances industrial-grade endurance, hardware write protection, and sub-15 µA deep-sleep - making it optimal for cost-sensitive, power-constrained, and safety-critical firmware storage where SPI simplicity and deterministic protection outweigh raw bandwidth needs.

Availability

AT26DF321-SU is available at Aetrix Electronics and suitable for industrial control firmware storage, automotive infotainment boot code retention, and medical device parameter logging requiring stable component supply across extended production lifecycles.

Supply support for AT26DF321-SU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Adesto Technologies, acquired by Dialog Semiconductor in 2020, specialized in low-power, high-reliability non-volatile memory solutions for IoT and industrial edge devices.

The AT26DF321-SU belongs to Adesto's DataFlash® family - engineered specifically for embedded systems needing robust, SPI-based code and data storage with hardware security and ultra-low-power operation.

FAQ

What is the maximum SPI clock frequency supported by the AT26DF321-SU?

The AT26DF321-SU supports a maximum clock frequency of 70 MHz for standard read operations using the 0Bh opcode. This enables high-speed firmware loading and real-time data access in microcontroller-based systems. The device also supports a lower-frequency read mode (03h opcode) for noise-sensitive environments, though this mode caps at a reduced fRDLF specification. All timing parameters are fully characterized across the industrial temperature range (–40°C to +85°C).

Does the AT26DF321-SU support Quad SPI or only standard SPI?

The AT26DF321-SU supports only standard single-I/O SPI (Modes 0 and 3) - it does not implement Dual or Quad SPI interfaces. Its command set, pinout (SI/SO only), and timing model are strictly aligned with legacy SPI peripherals. Systems requiring Quad SPI bandwidth must select alternatives like Winbond W25Q32JV or Macronix MX25L3233F, which are not pin- or command-compatible with the AT26DF321-SU.

How does hardware write protection work on the AT26DF321-SU?

Hardware write protection on the AT26DF321-SU is controlled by the WP pin: when driven low, it locks all sectors previously marked as protected via command or global protect - preventing any program or erase operation in those regions regardless of software state. The WP pin is internally pulled-high, so leaving it unconnected defaults to unprotected mode. For permanent protection, tie WP to GND after initial programming; for field updates, connect via jumper or GPIO-controlled FET.

What is the purpose of the HOLD pin on the AT26DF321-SU?

The HOLD pin on the AT26DF321-SU pauses ongoing SPI communication without deselecting the device or resetting internal state. When asserted (low), it freezes SCK sampling and places SO in high-impedance - allowing the host to service higher-priority interrupts while preserving the current command context. HOLD requires CS to remain asserted and SCK held low to activate; it does not affect self-timed operations like erase or program cycles already in progress.

Can the AT26DF321-SU be used in battery-powered applications?

Yes - the AT26DF321-SU is well-suited for battery-powered applications due to its 10 µA typical Deep Power-down current and 2.7V minimum operating voltage. In Deep Power-down mode (entered via B9h command), the device retains full memory content while drawing negligible current, enabling multi-year operation on coin cells or energy-harvesting sources. Wake-up latency is under 3 µs, supporting rapid resumption of logging or control tasks.

AT26DF321-SU Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Series:
-
Package/Case:
8-SOIC (0.209", 5.30mm Width)
Packaging:
Tube
Product Status:
Obsolete
Programmable:
Not Verified
Memory Type:
Non-Volatile
Memory Format:
FLASH
Technology:
FLASH
Memory Size:
32Mbit
Memory Organization:
256 Bytes x 16384 pages
Memory Interface:
SPI
Clock Frequency:
66 MHz
Write Cycle Time - Word, Page:
6µs, 5ms
Access Time:
-
Voltage - Supply:
2.7V ~ 3.6V
Operating Temperature:
-40°C ~ 85°C (TC)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
8-SOIC

AT26DF321-SU FAQ

1.How can I place an order for AT26DF321-SU through Aetrix?

Please submit a Request for Quotation (RFQ) for AT26DF321-SU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT26DF321-SU reliable?

The price and inventory of AT26DF321-SU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT26DF321-SU is usually 5 days.

3.What payment methods are accepted for AT26DF321-SU?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT26DF321-SU transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT26DF321-SU?

AT26DF321-SU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT26DF321-SU order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT26DF321-SU?

For technical support, including AT26DF321-SU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT26DF321-SU requirements.

6.How does Aetrix verify that AT26DF321-SU is sourced from the original manufacturer or authorized distributors?

All AT26DF321-SU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT26DF321-SU meets industry standards.

7.What is the process for return or replacement of AT26DF321-SU?

All AT26DF321-SU units undergo pre-shipment inspection (PSI). If there is an issue with AT26DF321-SU, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT26DF321-SU part is unused and in its original packaging.

Return procedure for AT26DF321-SU:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

AT26DF321-SU Tags

  • AT26DF321-SU
  • AT26DF321-SU PDF
  • AT26DF321-SU Datasheet
  • AT26DF321-SU Specifications
  • AT26DF321-SU Images
  • Renesas
  • Renesas AT26DF321-SU
  • Buy AT26DF321-SU
  • AT26DF321-SU Price
  • AT26DF321-SU Distributor
  • AT26DF321-SU Supplier
  • AT26DF321-SU Wholesale
Related Products
M24C02-WMN6TP
M24C02-WMN6TP

STMicroelectronics

AT24C02C-XHM-T
AT24C02C-XHM-T

Microchip Technology

AT21CS01-STUM10-T
AT21CS01-STUM10-T

Microchip Technology

AT24C02C-SSHM-T
AT24C02C-SSHM-T

Microchip Technology

24LC01BT-I/OT
24LC01BT-I/OT

Microchip Technology

M24C02-FMC6TG
M24C02-FMC6TG

STMicroelectronics

AT24CS02-SSHM-T
AT24CS02-SSHM-T

Microchip Technology

93LC46BT-I/OT
93LC46BT-I/OT

Microchip Technology

AT24C04C-SSHM-T
AT24C04C-SSHM-T

Microchip Technology

24LC01BT-I/SN
24LC01BT-I/SN

Microchip Technology

24AA02UIDT-I/OT
24AA02UIDT-I/OT

Microchip Technology

AT24C08C-STUM-T
AT24C08C-STUM-T

Microchip Technology

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER