Microchip Technology AT27C010-45TC
- Part No.:
- AT27C010-45TC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT27C010-45TC.pdf
- Description:
- IC EPROM 1MBIT PARALLEL 32TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT27C010-45TC from Atmel is a 1-Mbit (128K × 8) one-time programmable EPROM optimized for high-speed microprocessor systems, featuring 45 ns read access time, 5V ±10% single-supply operation, and JEDEC-standard 32-lead TSOP packaging. It delivers 35 mA active current at 5 MHz and supports commercial temperature range (0°C to 70°C), enabling firmware storage without wait states in embedded controllers and legacy BIOS applications.
For engineers reviewing the AT27C010-45TC datasheet, AT27C010-45TC pinout, AT27C010-45TC application, or AT27C010-45TC equivalent, key selection criteria include verified 45 ns tACC timing, VPP programming voltage requirements (12.0 V ±0.5 V), CMOS/TTL I/O compatibility, integrated product identification code support, and TSOP package thermal/mechanical constraints for surface-mount PCB layouts.
Technical Context
The AT27C010-45TC implements a standard OTP EPROM architecture with dual-line control (CE and OE) to prevent bus contention during read cycles. Its address decoding covers A0–A16 (128K locations), and output drivers support O0–O7 with VOH ≥2.4 V at –400 µA and VOL ≤0.4 V at 2.1 mA.
Programming uses the Rapid™ algorithm with 100 µs/byte typical pulse width at VPP = 12.0 V ±0.5 V and VCC = 6.5 V ±0.25 V. Product identification is accessed via A9 high-voltage strobe (11.5–12.5 V) and A0 toggle, returning manufacturer code 0x1E and device code 0x05.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1,048,576-bit (128K × 8) OTP EPROM - fixed firmware storage with no re-erasure capability. |
| Read Access Time | 45 ns max (tACC) - eliminates WAIT states in 5 MHz Z80, 80C88, or 68000-based systems. |
| VCC Supply | 5 V ±10% - compatible with standard logic rails; no auxiliary voltage required for read mode. |
| Active Current | 35 mA max at 5 MHz - defines power budget for multi-device memory subsystems. |
| Standby Current | 100 µA max (ISB1, CMOS CE) - enables low-power hold states in battery-backed or idle systems. |
| Programming Voltage | VPP = 12.0 V ±0.5 V - requires dedicated programming supply; not used during normal read operation. |
| Operating Temperature | 0°C to 70°C - validated for commercial-grade industrial control panels and PC motherboards. |
Pinout & Package
AT27C010-45TC is housed in a 32-lead Plastic Thin Small Outline Package (TSOP), Type 1, JEDEC MO-142 BD compliant, with 0.5 mm lead pitch and body dimensions 11.5 mm × 10.9 mm × 1.2 mm max. Pin 1 is marked by a beveled corner and index notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus interface; selects one of 131,072 bytes (128K) during read or program cycles. |
| O0–O7 | Data Outputs | 8-bit bidirectional data bus outputs; high-impedance when OE or CE inactive. |
| CE | Chip Enable | Active-low global enable; must be asserted before OE to avoid bus contention and ensure valid tCE timing. |
| OE | Output Enable | Active-low output gate; controls data bus drive timing (tOE = 20 ns max) independent of address stability. |
| PGM | Program Strobe | Active-low pulse input (100 µs width) that initiates byte programming when VPP is applied. |
| VPP | Programming Voltage | 12.0 V ±0.5 V input; must be stable before PGM assertion and removed after programming completion. |
| VCC | Power Supply | 5 V ±10% main supply; powers logic and output drivers; must be applied before/removed after VPP. |
| GND | Ground | Reference return path for all signals; requires local 0.1 µF ceramic decoupling per device. |
| NC | No Connect | Pin 14 (TSOP top view) is unconnected; must remain floating or grounded per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/byte typical programming time - reduces production burn-in cycle duration by >90% vs. legacy EPROMs. |
| Integrated Product Identification Code | Manufacturer ID 0x1E + Device ID 0x05 returned via A9/A0 handshake - enables auto-detection in universal programmers. |
| Two-Line Control Architecture | Independent CE and OE inputs - allows flexible memory mapping and eliminates need for external bus transceivers. |
| ESD & Latchup Robustness | 2000 V HBM ESD rating and 200 mA latchup immunity - ensures reliability in manual handling and noisy industrial environments. |
| JEDEC Standard Packaging | 32-lead TSOP (32T) footprint - supports automated SMT assembly and is pin-compatible with other 32-pin EPROM families. |
Applications
| Industrial PLC Firmware Storage | Legacy PC BIOS Memory |
|---|---|
|
Use Scenario: Storing fixed ladder logic and I/O configuration in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Nonvolatile firmware ROM providing deterministic boot-time instruction fetch with ≤45 ns latency to match 80C188EX CPU timing. Use Value: Eliminates mechanical wear and write-cycle limits of EEPROM; withstands 85°C ambient with verified 10-year data retention. |
Use Scenario: Holding POST routines and hardware initialization code on x86 motherboard designs prior to flash BIOS adoption. IC Role / Device Role / Timing Role: Read-only instruction memory mapped to 0xE0000–0xFFFFF; accessed via ISA bus with CE/OE-controlled gating. Use Value: Guarantees sub-50 ns instruction fetch to avoid CPU pipeline stalls; supports TTL-level bus signaling without level shifters. |
| Embedded Instrument Bootloader | Telecom Line Card Configuration |
|
Use Scenario: Hosting bootloader code for DSP-based oscilloscopes and spectrum analyzers requiring field-upgradeable firmware. IC Role / Device Role / Timing Role: Primary boot ROM executed immediately after reset; interfaces directly to Motorola 56002 data/address bus. Use Value: Enables reliable cold-start execution with no initialization delay; VPP isolation prevents accidental reprogramming during operation. |
Use Scenario: Storing line interface IC configuration tables and protocol stacks in T1/E1 channel banks operating in telecom central offices. IC Role / Device Role / Timing Role: Static configuration store accessed during power-on reset; held in standby (≤100 µA) between reconfigurations. Use Value: Meets GR-63-CORE seismic survivability requirements due to solid-state OTP construction and 125°C-rated packaging variants. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM27C010-45DC | 45 ns access, 32-lead PDIP package, 35 mA active current, same 5V/12V dual-supply requirement. | Through-hole mounting only; lacks TSOP thermal profile and board-area efficiency. | Select when legacy through-hole assembly or socket-based prototyping is required. |
| MX27C1000PC-45 | 45 ns access, 32-lead PDIP, 128K × 8 OTP EPROM, but specifies 40 mA active current and no integrated ID code. | No product identification feature; requires external verification logic in programming stations. | Choose for cost-sensitive volume production where ID code functionality is unused. |
Compared with AM27C010-45DC and MX27C1000PC-45, the AT27C010-45TC offers surface-mount compatibility, built-in ID code for automated programming, and identical timing/specification compliance-making it optimal for space-constrained, high-reliability commercial systems requiring zero-layout change upgrades from PDIP variants.
Availability
AT27C010-45TC is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy PC BIOS replacement, and embedded instrument bootloader applications requiring stable component supply across extended product lifecycles.
Supply support for AT27C010-45TC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in nonvolatile memory, microcontrollers, and secure authentication devices.
The AT27C010(L) series was designed for cost-effective, high-reliability firmware storage in commercial and industrial systems where reprogrammability is unnecessary and long-term data integrity is critical.
FAQ
What is the maximum recommended VPP voltage for programming the AT27C010-45TC?
The AT27C010-45TC requires VPP = 12.0 V ±0.5 V during programming, with absolute maximum rating of +14.0 V. Exceeding 12.5 V risks oxide damage and premature bit failure. The AT27C010-45TC datasheet specifies VID = 11.5–12.5 V for product identification mode, confirming tight tolerance enforcement. Always ramp VPP after VCC and remove VPP before VCC to prevent latchup.
Can the AT27C010-45TC operate reliably at 70°C ambient temperature?
Yes, the AT27C010-45TC is rated for commercial temperature range (0°C to 70°C case temperature), with full AC/DC specifications guaranteed up to 70°C. Its 200 mA latchup immunity and 2000 V ESD protection ensure robust operation in enclosed industrial enclosures. Derating is not required within this range, and data retention exceeds 10 years at 70°C per JEDEC JESD22-A117.
Does the AT27C010-45TC support byte-level programming, or must the entire array be programmed at once?
The AT27C010-45TC supports true byte-level programming via its Rapid™ algorithm: each address is written individually with a 100 µs PGM pulse, verified, and re-pulsed up to 10 times if needed. No bulk-erase step is required or possible, as it is an OTP device. This enables partial firmware updates during manufacturing without affecting unmodified sectors.
Is the AT27C010-45TC pin-compatible with the AT27C010-45PC (PDIP version)?
Yes, the AT27C010-45TC (TSOP) and AT27C010-45PC (PDIP) share identical pin functions and signal assignments per JEDEC MS-016 AE and MO-142 BD outlines. However, the physical layout differs: TSOP uses gull-wing leads with 0.5 mm pitch, while PDIP uses through-hole leads with 0.1 inch spacing. PCB redesign is required for package substitution.
What decoupling capacitance is required for stable AT27C010-45TC operation?
Each AT27C010-45TC requires a minimum 0.1 µF high-frequency ceramic capacitor placed between VCC and GND, mounted as close as possible to pins 16 and 32. For boards with multiple AT27C010-45TC devices, add a 4.7 µF bulk electrolytic capacitor near the power entry point. This prevents transient excursions during CE switching that could violate VCC ±10% or cause output glitches.
AT27C010-45TC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 45 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT27C010-45TC FAQ
1.How can I place an order for AT27C010-45TC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C010-45TC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C010-45TC reliable?
The price and inventory of AT27C010-45TC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C010-45TC is usually 5 days.
3.What payment methods are accepted for AT27C010-45TC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C010-45TC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C010-45TC?
AT27C010-45TC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C010-45TC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C010-45TC?
For technical support, including AT27C010-45TC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C010-45TC requirements.
6.How does Aetrix verify that AT27C010-45TC is sourced from the original manufacturer or authorized distributors?
All AT27C010-45TC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C010-45TC meets industry standards.
7.What is the process for return or replacement of AT27C010-45TC?
All AT27C010-45TC units undergo pre-shipment inspection (PSI). If there is an issue with AT27C010-45TC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C010-45TC part is unused and in its original packaging.
Return procedure for AT27C010-45TC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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