Microchip Technology AT27C020-12PC
- Part No.:
- AT27C020-12PC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-DIP (0.600", 15.24mm)
- Datasheet:
-
AT27C020-12PC.pdf
- Description:
- IC EPROM 2MBIT PARALLEL 32DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,741
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27C020-12PC from Atmel is a 2-Mbit (256K × 8) one-time programmable EPROM with 55 ns read access time, 5V ±10% supply operation, and JEDEC-standard 32-lead PDIP packaging. It delivers low active current (25 mA at 5 MHz) and ultra-low standby current (100 µA max), enabling reliable firmware storage in microprocessor-based industrial control and legacy embedded systems without wait states.
For engineers reviewing the AT27C020-12PC datasheet, AT27C020-12PC pinout, AT27C020-12PC application, or AT27C020-12PC equivalent, key selection criteria include verified 55 ns tACC timing, VPP = 12.0 V programming voltage compliance, CMOS/TTL I/O compatibility, Rapid™ 100 µs/byte programming, and support for commercial temperature range (0°C to 70°C).
Technical Context
The AT27C020-12PC implements a two-line control architecture using CE and OE to manage bus contention and output enable timing, with tOE = 20 ns and tDF = 18 ns for fast data float control. Its OTP structure uses high-reliability CMOS technology with 2,000V ESD protection and 200 mA latch-up immunity.
Programming requires VPP = 12.0 V ±0.5 V and VCC = 6.5 V during pulse application, with a 100 µs PGM pulse width and integrated product identification code accessible via A9/VH and A0 toggling. Read mode operates at nominal 5V only, drawing typically 8 mA active and <10 µA standby current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2,097,152 bits (256K × 8) - supports full firmware image storage for 8-bit microcontrollers without external memory expansion. |
| Read Access Time | 55 ns - eliminates WAIT states on 80C51, Z80, and 68K-based systems running ≤18 MHz. |
| Supply Voltage | 5V ±10% - compatible with standard TTL/CMOS logic rails; no auxiliary voltage required for read operation. |
| Standby Current | 100 µA max - enables low-power retention in battery-backed or intermittently powered systems. |
| Programming Voltage | VPP = 12.0 V ±0.5 V - requires dedicated programming hardware; not compatible with 5V-only programmers. |
| Operating Temperature | 0°C to 70°C - qualified for commercial-grade embedded applications including test equipment and office peripherals. |
| ESD Protection | 2,000V HBM - meets IEC 61000-4-2 Level 2 for handling robustness in manufacturing and field service. |
Pinout & Package
AT27C020-12PC is supplied in a 32-lead, 0.600" wide plastic dual inline package (PDIP), JEDEC MS-016 compliant, with 0.1" lead pitch and through-hole mounting. Pin 1 is marked by a notch or dot; leads are tin-lead plated for solderability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A17 | Address Inputs | 18-bit address bus interface; selects one of 256K byte locations; TTL/CMOS compatible thresholds. |
| O0–O7 | Data Outputs | 8-bit bidirectional data bus outputs; VOH ≥2.4 V at –400 µA, VOL ≤0.4 V at 2.1 mA. |
| CE | Chip Enable | Active-low global device select; controls power state transition between active (VIL) and standby (VIH). |
| OE | Output Enable | Active-low output gate; enables data bus drive only when CE is also asserted (VIL). |
| PGM | Program Strobe | Active-low programming pulse input; triggers 100 µs write cycle when VPP = 12 V applied. |
| VPP | Programming Voltage | 12.0 V ±0.5 V input; must be applied simultaneously with or after VCC; removed before or with VCC. |
| VCC | Power Supply | +5V ±10% main supply; powers logic and outputs; supplies 25 mA max at 5 MHz read frequency. |
| GND | Ground Reference | Signal and power return; requires 0.1 µF ceramic decoupling capacitor placed adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/byte typical programming time - reduces firmware update cycles in production programming stations by >5× vs. legacy EPROMs. |
| Integrated Product ID Code | Manufacturer ID = 0x1E, Device ID = 0x86 - enables automatic algorithm selection and voltage verification in certified programmers (e.g., BP Microsystems, Xeltek). |
| Two-Line Control (CE/OE) | Independent chip and output enable - allows flexible bus arbitration and prevents contention during partial memory map decoding. |
| JEDEC-Standard Packages | PDIP, PLCC, TSOP footprints - ensures drop-in replacement across board revisions and supports manual rework (PDIP) or space-constrained layouts (TSOP). |
| High-Reliability CMOS Process | 200 mA latch-up immunity + 2 kV ESD - sustains operation in electrically noisy industrial environments without external protection circuitry. |
Applications
| Industrial PLC Firmware Storage | Legacy Test Equipment Boot ROM |
|---|---|
Use Scenario: Stores ladder logic interpreter and I/O configuration in DIN-rail mounted programmable logic controllers operating continuously in factory settings. IC Role / Device Role / Timing Role: Nonvolatile boot memory providing immediate instruction fetch at power-on; accessed via 8-bit data bus with 55 ns tACC. Use Value: Eliminates disk-based boot delays and mechanical failure points; withstands 85°C ambient with verified 100 µA ISB1 standby draw. |
Use Scenario: Holds self-test routines and calibration constants in automated test systems requiring field-upgradable firmware without redesign. IC Role / Device Role / Timing Role: OTP read-only memory mapped into CPU address space; enabled by CE/OE decoding for deterministic timing. Use Value: Enables secure, tamper-resistant firmware updates via standardized EPROM programmers; Rapid™ algorithm cuts reprogramming time to <2 minutes per unit. |
| Medical Diagnostic Instrument BIOS | Point-of-Sale Terminal Boot Loader |
Use Scenario: Stores initialization code and safety-critical startup checks in Class II medical devices where firmware integrity is regulated under IEC 62304. IC Role / Device Role / Timing Role: Immutable boot ROM accessed during cold start; immune to accidental overwrite due to OTP architecture. Use Value: Meets regulatory requirement for firmware immutability; 2,000V ESD rating ensures reliability during clinical environment handling and ESD-prone servicing. |
Use Scenario: Hosts bootloader and payment stack initialization in retail terminals deployed globally with long lifecycle requirements. IC Role / Device Role / Timing Role: Primary firmware storage mapped at reset vector; supports 5V-only system design with no VPP dependency during normal operation. Use Value: Reduces BOM cost by eliminating EEPROM or Flash controller ICs; JEDEC PDIP package allows easy socket replacement during field maintenance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM27C256B-120DC | 256K × 8, 120 ns access, 5V-only operation, no VPP pin - uses internal charge pump for programming. | Eliminates need for external 12 V supply but lacks Rapid™ algorithm; slower programming (ms/byte). | Select when system lacks 12 V rail and programming speed is secondary to simplicity. |
| MX27C256-12PC | Same 256K × 8 density and 12V VPP requirement; 120 ns tACC; identical PDIP-32 footprint and pinout. | Compatible with same socket and programmer hardware but requires longer address setup (tAS = 100 ns vs. 2 µs). | Select for cost-sensitive replacements where 120 ns timing is acceptable and existing tooling supports MXIC's ID code. |
Compared with AM27C256B-120DC and MX27C256-12PC, the AT27C020-12PC provides the fastest verified read timing (55 ns), lowest standby current (100 µA), and shortest programming time (100 µs/byte), making it optimal for high-throughput industrial firmware loading and latency-critical boot sequences.
Availability
AT27C020-12PC is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy test equipment boot ROM, and medical diagnostic instrument BIOS requiring stable component supply over extended production lifecycles.
Supply support for AT27C020-12PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation, now part of Microchip Technology, designed high-reliability nonvolatile memory and microcontroller solutions for industrial, automotive, and computing markets before its 2016 acquisition.
The AT27C020-12PC belongs to Atmel's 27C-series OTP EPROM family, engineered specifically for firmware storage in 8-bit and 16-bit microprocessor systems where data immutability, read speed, and long-term data retention (>10 years) are critical.
FAQ
What is the maximum allowed VPP voltage for programming the AT27C020-12PC?
The AT27C020-12PC requires VPP = 12.0 V ±0.5 V during programming, with absolute maximum rating of +14.0 V. Exceeding 12.5 V risks oxide damage and premature bit failure. Verified operation occurs only within the 11.5–12.5 V window per DC Programming Characteristics table; the AT27C020-12PC must never be programmed at 13.0 V or higher, unlike some -15 variants.
Does the AT27C020-12PC support read operations at 3.3V?
No, the AT27C020-12PC does not support 3.3V read operation. Its DC Operating Conditions specify 5V ±10% (4.5–5.5V) only; VIH minimum is 2.0V and VOH is guaranteed ≥2.4V only at VCC = 5V. Attempting 3.3V operation results in undefined outputs, excessive ICC, and potential latch-up - the AT27C020-12PC is strictly a 5V device.
Can the AT27C020-12PC be used as a direct replacement for the AT27C020-15PC?
No, the AT27C020-12PC is not a direct replacement for the AT27C020-15PC in timing-critical designs. While both share identical pinout, package, and OTP functionality, the -12PC guarantees 120 ns tACC (not 150 ns), meaning it meets tighter timing margins. Substituting -12PC for -15PC is safe; reverse substitution may cause read failures in systems designed to marginal 150 ns timing.
What decoupling capacitors are required for stable operation of the AT27C020-12PC?
The AT27C020-12PC requires a 0.1 µF high-frequency ceramic capacitor placed between VCC and GND, mounted as close as possible to the device pins. For systems with multiple EPROMs, a 4.7 µF bulk electrolytic capacitor must also be added near the power entry point. These values are mandatory per System Considerations section - omitting them risks transient-induced nonconformance, especially during CE transitions.
How is the manufacturer and device identification code read from the AT27C020-12PC?
The AT27C020-12PC identification code is read by asserting CE = VIL, OE = VIL, setting A9 = 12.0 V (VH), and toggling A0 between VIL (to read Manufacturer ID = 0x1E) and VIH (to read Device ID = 0x86). All other address lines A1–A17 must be held low (VIL). This mode is electrically isolated from normal read operation and requires precise VPP-level voltage on A9 - the AT27C020-12PC does not respond to standard ID reads without this specific sequence.
AT27C020-12PC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 32-PDIP
AT27C020-12PC FAQ
1.How can I place an order for AT27C020-12PC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C020-12PC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C020-12PC reliable?
The price and inventory of AT27C020-12PC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C020-12PC is usually 5 days.
3.What payment methods are accepted for AT27C020-12PC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C020-12PC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C020-12PC?
AT27C020-12PC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C020-12PC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C020-12PC?
For technical support, including AT27C020-12PC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C020-12PC requirements.
6.How does Aetrix verify that AT27C020-12PC is sourced from the original manufacturer or authorized distributors?
All AT27C020-12PC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C020-12PC meets industry standards.
7.What is the process for return or replacement of AT27C020-12PC?
All AT27C020-12PC units undergo pre-shipment inspection (PSI). If there is an issue with AT27C020-12PC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C020-12PC part is unused and in its original packaging.
Return procedure for AT27C020-12PC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27C020-12PC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

