Microchip Technology AT27C020-70JC
- Part No.:
- AT27C020-70JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT27C020-70JC.pdf
- Description:
- IC EPROM 2MBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:3,242
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27C020-70JC from Atmel is a 2-Mbit (256K × 8) one-time programmable EPROM with 70 ns read access time, 5V ±10% supply, and JEDEC-standard 32-lead PLCC package. It delivers TTL/CMOS-compatible I/O, rapid 100 µs/byte programming, and operates across commercial temperature range (0°C to 70°C), serving as firmware storage in microprocessor-based embedded controllers.
For engineers reviewing the AT27C020-70JC datasheet, AT27C020-70JC pinout, AT27C020-70JC application, or AT27C020-70JC equivalent, key selection considerations include its OTP architecture, dual-line control (CE/OE), VPP-programming voltage requirement, and compatibility with legacy 5V bus systems requiring non-volatile code storage without battery backup.
Technical Context
The AT27C020-70JC implements a standard OTP EPROM architecture with address decoding for A0–A17 (18-bit addressing), 8-bit parallel data outputs (O0–O7), and two active-low control lines: Chip Enable (CE) and Output Enable (OE). Its Rapid™ programming algorithm uses 100 µs PGM pulses at VPP = 13.0 V and VCC = 6.5 V.
It supports product identification via A9 high-voltage strobe (12.0 V ±0.5 V) and A0 toggle to read manufacturer (0x1E) and device (0x86) codes. System-level design requires 0.1 µF ceramic decoupling per device and 4.7 µF bulk capacitance for arrays to suppress VPP/VCC transients during CE switching.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2,097,152 bits (256K × 8) - supports full firmware images for 8-bit microcontrollers without bank switching |
| Read Access Time | 70 ns max - eliminates WAIT states on 14 MHz Z80 or 8 MHz 8051 systems |
| Supply Voltage | 5V ±10% - compatible with legacy 5V logic families and unregulated board rails |
| Active Current | 25 mA max at 5 MHz - enables direct interface with standard 5V bus drivers |
| Standby Current | 100 µA max - suitable for low-power modes where firmware retention is required |
| Programming Voltage | VPP = 13.0 V ±0.25 V - requires dedicated high-voltage programming circuitry or EPROM programmer |
| ESD Protection | 2,000 V HBM - meets industrial handling requirements without additional protection diodes |
Pinout & Package
AT27C020-70JC is supplied in a 32-lead Plastic J-Leaded Chip Carrier (PLCC), JEDEC MS-016 AE compliant, with 1.27 mm pitch and body size 18.5 × 18.5 mm. Pin 1 is marked by index notch; seating plane height ≤ 0.220 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A17 | Address Inputs | 18-bit address bus interface; fully decoded internally to select one of 256K bytes |
| O0–O7 | Data Outputs | CMOS/TTL-compatible bidirectional data bus outputs in read mode; high-impedance when OE or CE inactive |
| CE | Chip Enable | Active-low global enable; must be stable before address setup to meet tCES ≥ 2 µs during programming |
| OE | Output Enable | Active-low output gate; controls data bus drive timing (tOE = 30 ns max) independent of CE |
| PGM | Program Strobe | Active-low pulse input; initiates byte programming cycle only when VPP = 13 V and CE = low |
| VPP | Programming Voltage | 13.0 V input for programming; must be applied after VCC and removed before VCC per sequencing rule |
| VCC | Power Supply | 5V ±10% main supply; powers logic and outputs; supplies 25 mA max during active read |
| GND | Ground Reference | Common return path for VCC, VPP, and I/O; requires local 0.1 µF ceramic decoupling |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming | 100 µs/byte typical - reduces firmware update time by >90% vs. conventional EPROM algorithms |
| Integrated ID Code | Manufacturer (0x1E) and Device (0x86) bytes readable via A9/A0 - enables automated programming equipment validation |
| Two-Line Control | Independent CE and OE inputs - allows flexible bus arbitration and eliminates contention during partial memory access |
| High-Reliability Process | 200 mA latch-up immunity and 2,000 V ESD - ensures robustness in industrial PCB assembly and field operation |
| Temperature Ranges | Commercial (0°C to 70°C) - validated for office, lab, and consumer-grade embedded systems with passive cooling |
Applications
| Industrial PLC Firmware Storage | Legacy PC BIOS Backup |
|---|---|
Use Scenario: Storing ladder logic firmware in modular I/O racks where field updates are infrequent but long-term data integrity is critical. IC Role / Device Role / Timing Role: Non-volatile program memory providing deterministic 70 ns read latency to 80C188-based controller CPU. Use Value: Eliminates need for battery-backed SRAM or EEPROM wear leveling; retains firmware through 20+ year shelf life without refresh. |
Use Scenario: Holding POST initialization code and hardware configuration tables in ISA-bus expansion cards used in retro-computing restoration projects. IC Role / Device Role / Timing Role: Static code ROM mapped into 0xE0000–0xFFFFF address space; accessed via 5V TTL bus timing. Use Value: Matches original IBM PC/AT timing specifications; supports direct replacement of obsolete 27C256 parts with identical pinout and voltage profile. |
| Medical Instrument Bootloader | Automotive Diagnostic Tool Memory |
Use Scenario: Hosting immutable bootloader code in Class II medical devices (e.g., infusion pumps) where regulatory validation prohibits field-modifiable flash. IC Role / Device Role / Timing Role: One-time programmable boot ROM ensuring firmware authenticity and preventing runtime corruption. Use Value: Meets IEC 62304 §5.5.2 requirements for fixed software; no risk of accidental reprogramming during service or EMI events. |
Use Scenario: Storing OBD-II protocol translation tables and vehicle-specific calibration maps in handheld diagnostic scanners operating in automotive workshops. IC Role / Device Role / Timing Role: Read-only lookup table memory interfaced to 8051 derivatives; accessed at ≤5 MHz clock rate. Use Value: Provides guaranteed data retention over 15-year service life without degradation from repeated read cycles or thermal cycling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C020-70PC | Same die, 32-lead PDIP package (0.600" width); no J-leads; 55–150 ns speed grades available | Through-hole mounting; higher thermal mass; less suitable for high-density surface-mount boards | Select for prototyping, socket-based development, or legacy PCBs with DIP footprints |
| AM27C020-70DC | AMD second-source part; identical 256K×8 organization, 70 ns access, 5V supply, and PLCC-32 package | Same pinout and timing; minor differences in programming current (IPP2 = 18 mA vs. Atmel's 20 mA) | Valid drop-in alternative where AMD qualification documentation is mandated by OEM procurement policy |
Compared with AT27C020-70PC and AM27C020-70DC, the AT27C020-70JC offers identical core functionality but provides surface-mount reliability and board-area savings of PLCC versus PDIP, while maintaining full interoperability with AMD-sourced equivalents in production environments requiring multi-source assurance.
Availability
AT27C020-70JC is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy PC BIOS backup, and medical instrument bootloader applications requiring stable component supply and long-term obsolescence management.
Supply support for AT27C020-70JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation was a U.S.-based semiconductor company specializing in microcontrollers, non-volatile memory, and secure authentication ICs before its acquisition by Microchip Technology in 2016.
The AT27C020-70JC belongs to Atmel's 27C-series OTP EPROM family, designed specifically for cost-sensitive, high-reliability embedded systems requiring unalterable firmware storage without battery backup or complex erase cycles.
FAQ
What is the maximum operating temperature range for the AT27C020-70JC?
The AT27C020-70JC is rated for commercial temperature operation from 0°C to 70°C. This range is verified per JEDEC JESD22-A108 and applies to all DC and AC parameters including 70 ns access time, 25 mA active current, and 100 µA standby current. It is not qualified for industrial (−40°C to +85°C) or automotive (−40°C to +125°C) use - those require suffixes -JI or -JA respectively. The AT27C020-70JC maintains full specification compliance within this 0°C–70°C window.
Does the AT27C020-70JC support in-circuit programming?
No, the AT27C020-70JC does not support in-circuit programming. It requires external EPROM programming equipment that supplies VPP = 13.0 V ±0.25 V and VCC = 6.5 V ±0.25 V simultaneously, with strict power sequencing (VCC before VPP, VPP before removal). The PGM pin accepts only 100 µs ±5% pulses under controlled conditions - incompatible with standard microcontroller GPIO or ISP interfaces. Programming must occur off-board using certified programmers like Data I/O PS-3000 or Xeltek SuperPRO.
Can the AT27C020-70JC be used as a direct replacement for the AT27C256B?
No, the AT27C020-70JC is not a direct replacement for the AT27C256B. While both are 5V OTP EPROMs, the AT27C256B is 32K × 8 (256 Kbit), uses A0–A14 addressing, and has different pinout (28-pin DIP/PLCC). The AT27C020-70JC is 256K × 8 (2 Mbit), requires A0–A17, and occupies a 32-pin PLCC. Address bus width, memory map size, and physical footprint differ fundamentally - substitution would require PCB redesign and firmware address remapping.
What decoupling capacitors are required for stable operation of the AT27C020-70JC?
The AT27C020-70JC requires two decoupling capacitors: a 0.1 µF high-frequency ceramic capacitor placed between VCC and GND as close as possible to pins 22 and 23, and a 4.7 µF bulk electrolytic capacitor located near the power entry point of any EPROM array. These values are specified in the "System Considerations" section to suppress transients during CE switching and stabilize VCC under rapid current transitions. Omitting either capacitor risks timing violations or latch-up under dynamic load.
How is the manufacturer and device identification code read from the AT27C020-70JC?
The AT27C020-70JC identification code is read by asserting VPP = 12.0 V ±0.5 V on pin 1, holding A9 = VH (12 V), setting A0 = VIH to read the Device Code (0x86), or A0 = VIL to read the Manufacturer Code (0x1E), while keeping A1–A17 = VIL and CE/OE = VIL. This mode is detailed in the "Product Identification" table and requires precise high-voltage control - standard 5V programmers must support this specific sequence to auto-detect the AT27C020-70JC.
AT27C020-70JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 70 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT27C020-70JC FAQ
1.How can I place an order for AT27C020-70JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C020-70JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C020-70JC reliable?
The price and inventory of AT27C020-70JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C020-70JC is usually 5 days.
3.What payment methods are accepted for AT27C020-70JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C020-70JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C020-70JC?
AT27C020-70JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C020-70JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C020-70JC?
For technical support, including AT27C020-70JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C020-70JC requirements.
6.How does Aetrix verify that AT27C020-70JC is sourced from the original manufacturer or authorized distributors?
All AT27C020-70JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C020-70JC meets industry standards.
7.What is the process for return or replacement of AT27C020-70JC?
All AT27C020-70JC units undergo pre-shipment inspection (PSI). If there is an issue with AT27C020-70JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C020-70JC part is unused and in its original packaging.
Return procedure for AT27C020-70JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27C020-70JC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

