Microchip Technology AT27C020-90JC
- Part No.:
- AT27C020-90JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT27C020-90JC.pdf
- Description:
- IC EPROM 2MBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:4,185
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27C020-90JC from Atmel is a 2-Mbit (256K × 8) one-time programmable EPROM optimized for fast read access and low-power operation in embedded firmware storage applications. It features 55 ns read access time, 5 V ±10% single-supply operation, and JEDEC-standard 32-lead PLCC packaging. Designed for microprocessor systems requiring reliable nonvolatile code storage without wait states, it supports commercial temperature range (0°C to 70°C).
For engineers reviewing the AT27C020-90JC datasheet, AT27C020-90JC pinout, AT27C020-90JC application, or AT27C020-90JC equivalent, key selection considerations include its 90 ns access timing grade, Rapid™ programming algorithm (100 µs/byte), CMOS/TTL compatibility, integrated product identification code, and dual-line control (CE/OE) architecture for bus contention management.
Technical Context
The AT27C020-90JC implements a two-line control interface with Chip Enable (CE) and Output Enable (OE), enabling flexible bus arbitration and high-speed read cycles without external wait-state generation. Its address space spans A0–A17 (18-bit), supporting full 256K-byte access with byte-level output drivers (O0–O7).
Programming requires VPP = 12.0 V ±0.5 V and VCC = 6.5 V ±0.25 V, with a verified 100 µs PGM pulse width and up to 10 reprogramming attempts per byte. Product identification uses A9 at 12 V and A0 toggling to select manufacturer (0x1E) or device code (0x86) bytes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2,097,152 bits (256K × 8); enables full firmware image storage for 8-bit microcontrollers without bank switching. |
| Read Access Time | 90 ns max (tACC); ensures compatibility with 10 MHz+ CPU buses without wait-state insertion. |
| VCC Supply | 5 V ±10%; operates directly from standard logic rail-no auxiliary voltage regulators required. |
| Active Current | 25 mA max at 5 MHz; supports sustained read bursts in real-time control systems. |
| Standby Current | 100 µA max (ISB1); reduces system power budget during idle periods in battery-backed or energy-sensitive designs. |
| ESD Protection | 2,000 V HBM; enhances robustness during handling and board assembly in industrial environments. |
| Latch-up Immunity | 200 mA; prevents destructive current runaway under transient overvoltage conditions. |
Pinout & Package
AT27C020-90JC is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC), JEDEC MS-016 AE compliant, with 1.27 mm pitch and surface-mount footprint. Pin 1 is marked by index notch and corner chamfer.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A17 | Address Inputs | 18-bit address bus interface; fully decodes 256K-byte memory map with no external address latching needed. |
| O0–O7 | Data Outputs | CMOS/TTL-compatible bidirectional data bus drivers; drive standard logic loads without buffers. |
| CE | Chip Enable | Primary device select; places outputs in high-Z when high, enabling multi-device memory expansion. |
| OE | Output Enable | Secondary gating signal; allows shared bus operation with other peripherals while CE remains active. |
| PGM | Program Strobe | Active-low programming control; initiates 100 µs write pulse during VPP-enabled programming mode. |
| VPP | Programming Voltage | 12.0 V ±0.5 V input; must be applied after VCC and removed before VCC to prevent latch-up. |
| VCC | Power Supply | 5 V ±10% main supply; powers both read and program modes (6.5 V required only during programming). |
| GND | Ground Reference | Common return path; requires local 0.1 µF ceramic decoupling per device per datasheet layout guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/byte typical programming time; cuts firmware update cycle time by >5× vs. legacy EPROMs. |
| Integrated Product ID Code | Manufacturer ID (0x1E) and Device Code (0x86) accessible via A9/A0; enables auto-detection in universal programmers. |
| Two-Line Control (CE/OE) | Independent chip and output enable; eliminates bus contention in multi-peripheral systems without glue logic. |
| High-Reliability Process | 2,000 V ESD rating and 200 mA latch-up immunity; meets industrial handling and field reliability requirements. |
| Temperature Ranges | Commercial (0°C to 70°C) grade; validated for stable operation across full range without derating. |
Applications
| Industrial PLC Firmware Storage | Legacy Embedded System Boot ROM |
|---|---|
|
Use Scenario: Storing fixed ladder logic and I/O configuration in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Nonvolatile boot-time instruction memory accessed by 8051 or Z80 derivatives at ≤10 MHz clock rates. Use Value: 90 ns access eliminates wait states, ensuring deterministic scan-cycle timing critical for motion control synchronization. |
Use Scenario: Holding BIOS or bootloader code in discontinued medical instrumentation using 16-bit microprocessors. IC Role / Device Role / Timing Role: Primary read-only memory mapped at reset vector; provides immediate execution on power-up. Use Value: Single 5 V supply simplifies legacy power design; OTP nature prevents accidental corruption during field servicing. |
| Automotive Instrument Cluster Calibration Data | Point-of-Sale Terminal Configuration ROM |
|
Use Scenario: Storing calibrated speedometer/odometer scaling factors and warning thresholds in analog-digital hybrid clusters. IC Role / Device Role / Timing Role: Static parameter memory read once at startup; accessed via dedicated 8-bit parallel bus. Use Value: 100 µA standby current extends backup battery life during vehicle sleep mode (CAN off). |
Use Scenario: Hosting localized language strings, tax tables, and peripheral initialization sequences in retail EFTPOS terminals. IC Role / Device Role / Timing Role: Firmware overlay memory accessed during cold boot prior to loading application from flash. Use Value: PLCC package enables rework-friendly socketed installation for regional firmware variants in production lines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM27C256B-120DC | 256K × 8, 120 ns access, 5 V, 40-pin DIP; no integrated ID code or Rapid™ programming. | Requires external programming verification logic; lacks A9-based ID readback capability. | Preferred where legacy DIP sockets exist and 120 ns timing is acceptable. |
| MX27C256-12PC | 256K × 8, 120 ns access, 5 V, 32-pin PDIP; TTL-compatible only, no CMOS input thresholds. | Higher active current (35 mA), no VPP-controlled programming voltage-uses internal charge pump. | Selected when cost-sensitive DIP-based designs prioritize footprint over programming speed or low standby current. |
Compared with AM27C256B-120DC and MX27C256-12PC, the AT27C020-90JC delivers faster 90 ns access, lower 100 µA standby current, and built-in Rapid™ programming-making it optimal for new designs demanding tighter timing margins and reduced system power.
Availability
AT27C020-90JC is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy embedded system boot ROM, and automotive instrument cluster calibration data applications requiring stable component supply and long-term obsolescence support.
Supply support for AT27C020-90JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer markets.
The AT27C020 belongs to Atmel's OTP EPROM product line, designed specifically for cost-effective, high-reliability firmware and configuration storage in systems where reprogrammability is unnecessary but data integrity and timing predictability are critical.
FAQ
What is the maximum operating temperature range for the AT27C020-90JC?
The AT27C020-90JC is rated for the commercial temperature range of 0°C to 70°C. This specification is explicitly defined in the Ordering Information table and confirmed in the DC Operating Conditions section of the datasheet. Operation outside this range may result in timing violations or data retention failure. The AT27C020-90JI variant supports -40°C to +85°C, but the -90JC suffix denotes commercial-grade qualification only.
Does the AT27C020-90JC require a separate programming voltage during normal read operation?
No, the AT27C020-90JC operates from a single 5 V ±10% supply during read mode. VPP (12.0 V ±0.5 V) is required only during programming and product identification modes. The datasheet specifies that VPP must be applied after VCC and removed before VCC to avoid latch-up. In read mode, VPP can be tied to VCC or left unconnected depending on system design, but it is not actively used.
How is the Integrated Product Identification Code accessed on the AT27C020-90JC?
The Integrated Product Identification Code on the AT27C020-90JC is accessed by asserting VPP = 12.0 V ±0.5 V, holding A1–A17 low, setting A9 to 12 V (VH), and toggling A0: low for Manufacturer ID (0x1E), high for Device Code (0x86). This function is detailed in the "Product Identification" operating mode table and confirmed in Figure 4 of the datasheet. No external programming hardware is needed-only controlled voltage application.
Can the AT27C020-90JC be used as a direct replacement for the AT27C020-70JC in an existing design?
Yes, the AT27C020-90JC is functionally and pin-compatible with the AT27C020-70JC, differing only in guaranteed maximum read access time (90 ns vs. 70 ns). Both share identical pinout, voltage requirements, programming algorithm, and temperature range. Systems designed for the -70JC will operate reliably with the -90JC, though timing裕度 decreases by 20 ns-verify setup/hold margins if operating near maximum CPU frequency.
What decoupling capacitance is required for stable operation of the AT27C020-90JC?
The AT27C020-90JC requires a minimum 0.1 µF high-frequency ceramic capacitor between VCC and GND, placed as close to the device pins as possible. For systems with multiple EPROMs, a 4.7 µF bulk electrolytic capacitor is also recommended near the power entry point. These values are specified in the "System Considerations" section to suppress transients during CE transitions and maintain supply stability within datasheet limits.
AT27C020-90JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT27C020-90JC FAQ
1.How can I place an order for AT27C020-90JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C020-90JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C020-90JC reliable?
The price and inventory of AT27C020-90JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C020-90JC is usually 5 days.
3.What payment methods are accepted for AT27C020-90JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C020-90JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C020-90JC?
AT27C020-90JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C020-90JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C020-90JC?
For technical support, including AT27C020-90JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C020-90JC requirements.
6.How does Aetrix verify that AT27C020-90JC is sourced from the original manufacturer or authorized distributors?
All AT27C020-90JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C020-90JC meets industry standards.
7.What is the process for return or replacement of AT27C020-90JC?
All AT27C020-90JC units undergo pre-shipment inspection (PSI). If there is an issue with AT27C020-90JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C020-90JC part is unused and in its original packaging.
Return procedure for AT27C020-90JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27C020-90JC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

