Microchip Technology AT27C080-90JU-T
- Part No.:
- AT27C080-90JU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT27C080-90JU-T.pdf
- Description:
- IC EPROM 8MBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:3,750
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27C080-90JU-T from Microchip Technology (formerly Atmel) is an 8 Mbit (1M × 8) one-time programmable EPROM with 90 ns read access time, 5V ±10% supply, and industrial temperature range (–40°C to +85°C). It features CMOS/TTL-compatible I/O, dual-line control (CE/OE), and rapid programming at 50 µs/byte - enabling firmware storage in microprocessor systems without wait states.
For engineers reviewing the AT27C080-90JU-T datasheet, AT27C080-90JU-T pinout, AT27C080-90JU-T application, or AT27C080-90JU-T equivalent, key selection criteria include JEDEC-standard PLCC-32 packaging, VPP-enabled programming mode, integrated product identification code, and standby current ≤100 µA for low-power embedded boot memory use.
Technical Context
The AT27C080-90JU-T implements a parallel-addressed OTP EPROM architecture with 20-bit address bus (A0–A19) and 8-bit bidirectional data bus (O0–O7), controlled via CE (chip enable) and OE/VPP (output enable/programming voltage). Its rapid programming algorithm uses 50 µs CE pulses at VCC = 6.5 V and OE/VPP = 13.0 V, with verification loops per byte.
It supports two distinct operating modes: standard 5V read mode (OE/VPP = VIL) and high-voltage programming mode (OE/VPP = 12.0 V ±0.5 V). The device integrates a manufacturer ID (0x1E) and device code (0x8A), accessible via A9 = VH and A0 toggled - used by industry-standard programmers for auto-algorithm selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 8,388,608 bits (1M × 8) - sufficient for full microcontroller boot firmware or BIOS images |
| Read access time | 90 ns max - eliminates wait states on 5 MHz–10 MHz microprocessor buses |
| Supply voltage | 5 V ±10% - compatible with legacy TTL/CMOS logic rails without regulation overhead |
| Standby current | ≤100 µA - enables low-power retention in always-on embedded control modules |
| Active current | ≤40 mA at 5 MHz - supports sustained burst reads without thermal derating |
| Programming voltage | VPP = 12.0 V ±0.5 V on OE/VPP pin - requires dedicated programmer HV supply, not system rail |
| Operating temperature | –40°C to +85°C - qualified for industrial-grade PCBs without thermal management |
Pinout & Package
AT27C080-90JU-T is supplied in a 32-lead plastic J-leaded chip carrier (PLCC-32), JEDEC MS-016 compliant, with gull-wing leads and pin 1 identifier notch. Package dimensions: 12.47 mm × 14.98 mm × 3.35 mm (max height).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A19 | Address inputs | 20-bit parallel address bus; latched on CE falling edge during read or program |
| O0–O7 | Data outputs/inputs | 8-bit bidirectional data path; outputs driven only when CE = OE = VIL (read), inputs sampled during programming |
| CE | Chip enable | Primary device select; active-low; controls power state transition and initiates programming pulse |
| OE/VPP | Output enable / Program supply | Dual-function pin: VIL enables output drivers (read); 12 V enables internal programming circuitry |
| VCC | Power supply | 5 V ±10% main supply; must be applied before/with OE/VPP and removed after |
| GND | Ground reference | Signal and power return; requires local 0.1 µF ceramic decoupling per device |
Key Features
| Feature | Design Value |
|---|---|
| Rapid programming algorithm | 50 µs/byte typical - reduces firmware update time by >90% vs. legacy EPROMs; includes automatic verify-and-reprogram loop |
| Integrated product ID code | Manufacturer ID (0x1E) and device code (0x8A) - enables plug-and-play recognition in automated programming stations |
| Two-line control interface | Separate CE and OE/VPP pins - prevents bus contention during partial-memory accesses and simplifies address decoding |
| ESD and latchup immunity | 2,000 V HBM ESD protection and 200 mA latchup immunity - ensures robustness during handling and in noisy industrial environments |
| Green packaging | Pb/halide-free PLCC-32 - complies with RoHS Directive 2011/65/EU without performance trade-offs |
Applications
| Industrial PLC Firmware Storage | Legacy Embedded System Boot ROM |
|---|---|
Use Scenario: Storing fixed ladder logic and I/O configuration in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Nonvolatile boot memory mapped to CPU address space; provides deterministic 90 ns instruction fetch timing. Use Value: Eliminates reliance on external EEPROM or flash, avoiding wear-out concerns and reducing BOM count by one discrete memory IC. | Use Scenario: Holding immutable startup code and hardware initialization routines in medical diagnostic equipment with long product lifecycles. IC Role / Device Role / Timing Role: OTP EPROM serving as primary boot ROM; accessed during cold reset before RAM initialization. Use Value: Guarantees firmware integrity across decades of operation - no risk of accidental overwrite or bit corruption from power glitches. |
| Avionics Test Equipment Calibration Data | Telecom Line Card Configuration Memory |
Use Scenario: Storing calibrated ADC/DAC offset/gain coefficients in ground-based avionics test sets requiring traceable, unalterable settings. IC Role / Device Role / Timing Role: Read-only configuration store; data accessed once per self-test cycle via parallel bus. Use Value: Meets DO-160E section 22 lightning-induced transient immunity requirements due to 200 mA latchup rating and 2 kV ESD hardening. | Use Scenario: Holding FPGA configuration bitstreams and port mapping tables in telecom DSLAM line cards operating in central office environments. IC Role / Device Role / Timing Role: Parallel-programmed OTP memory providing fast, deterministic configuration load at power-up. Use Value: Enables sub-100 ms system boot time - critical for carrier-grade 99.999% uptime SLAs - with no firmware update risk during field operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C080-90PU | Same die, PDIP-32 package instead of PLCC-32; 0.600" wide body; matte tin leads | Through-hole assembly only; higher board real estate; no surface-mount reflow compatibility | Select for legacy wave-soldered designs or prototyping where socketing is preferred. |
| MX29LV800CTTC-90G | 8 Mbit flash (not OTP); 3.0 V core; 90 ns access; 100k erase/write cycles; different command set | Field-upgradable firmware; requires write-enable sequencing and sector protection management | Select only if firmware updates are required post-deployment; not drop-in replaceable due to voltage and protocol mismatch. |
Compared with AT27C080-90PU and MX29LV800CTTC-90G, the AT27C080-90JU-T offers guaranteed data retention without refresh, zero write-cycle wear, and direct 5V bus compatibility - making it optimal for safety-critical, maintenance-free, or long-lifecycle applications where firmware immutability is mandatory.
Availability
AT27C080-90JU-T is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy embedded system boot ROM, and avionics test equipment calibration data requiring stable component supply over extended production lifecycles.
Supply support for AT27C080-90JU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and manufacturing continuity for the AT27C series. The company specializes in secure, reliable, and long-lifecycle semiconductor solutions for industrial, aerospace, and automotive markets.
The AT27C080 belongs to Atmel's legacy OTP EPROM product line, designed specifically for applications demanding permanent, tamper-proof firmware storage with zero risk of accidental modification - targeting industrial control, medical instrumentation, and defense electronics.
FAQ
What is the programming voltage requirement for AT27C080-90JU-T?
The AT27C080-90JU-T requires OE/VPP = 12.0 V ±0.5 V during programming, applied to the OE/VPP pin while CE is pulsed low for 47.5–52.5 µs. VCC must be raised to 6.5 V ±0.25 V concurrently. This high-voltage mode is strictly for factory or lab programming - the AT27C080-90JU-T operates at 5 V during normal read access and cannot be reprogrammed in-system.
Does AT27C080-90JU-T support read-modify-write operations?
No, the AT27C080-90JU-T is a one-time programmable (OTP) EPROM and does not support read-modify-write operations. Once programmed, its contents are permanently fixed. Any change requires physical replacement of the AT27C080-90JU-T device. This design ensures absolute firmware integrity but precludes field updates.
Can AT27C080-90JU-T be used in place of AT27C080-90PU?
Yes, the AT27C080-90JU-T and AT27C080-90PU share identical electrical specifications, timing, and pin functions. The only difference is package type: PLCC-32 vs. PDIP-32. Pinout is identical, so PCB layout changes are required only for footprint and soldering process - not signal routing. The AT27C080-90JU-T is surface-mount compatible; AT27C080-90PU is through-hole.
What decoupling capacitance is recommended for AT27C080-90JU-T?
A 0.1 µF high-frequency ceramic capacitor must be placed between VCC and GND, mounted as close as possible to the AT27C080-90JU-T's pins. For boards with multiple AT27C080-90JU-T devices or dense EPROM arrays, add a 4.7 µF bulk electrolytic capacitor near the power entry point. These values prevent transient excursions during CE switching that could violate absolute maximum ratings.
How is the product identification code accessed on AT27C080-90JU-T?
The AT27C080-90JU-T identification code is read by holding all address lines A1–A19 low, applying VH (11.5–12.5 V) to A9, and toggling A0: low (VIL) returns the manufacturer ID (0x1E); high (VIH) returns the device code (0x8A). This occurs only when CE = VIL and OE/VPP = VIL - no programming voltage needed for ID readback.
AT27C080-90JU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 8Mbit
- Memory Organization:
- 1M x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT27C080-90JU-T FAQ
1.How can I place an order for AT27C080-90JU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C080-90JU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C080-90JU-T reliable?
The price and inventory of AT27C080-90JU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C080-90JU-T is usually 5 days.
3.What payment methods are accepted for AT27C080-90JU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C080-90JU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C080-90JU-T?
AT27C080-90JU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C080-90JU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C080-90JU-T?
For technical support, including AT27C080-90JU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C080-90JU-T requirements.
6.How does Aetrix verify that AT27C080-90JU-T is sourced from the original manufacturer or authorized distributors?
All AT27C080-90JU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C080-90JU-T meets industry standards.
7.What is the process for return or replacement of AT27C080-90JU-T?
All AT27C080-90JU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT27C080-90JU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C080-90JU-T part is unused and in its original packaging.
Return procedure for AT27C080-90JU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27C080-90JU-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

