Microchip Technology AT27C1024-90JI
- Part No.:
- AT27C1024-90JI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
AT27C1024-90JI.pdf
- Description:
- IC EPROM 1MBIT PARALLEL 44PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:4,835
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Product details
Overview
AT27C1024-90JI from Microchip Technology (formerly Atmel) is a 1-Mbit one-time programmable EPROM organized as 64K × 16 bits, operating at 5V ±10%, with 90 ns read access time, CE/OE dual-line control, and industrial temperature range (–40°C to +85°C). It serves as nonvolatile firmware storage in legacy microprocessor systems requiring reliable boot code retention without battery backup.
For engineers reviewing the AT27C1024-90JI datasheet, AT27C1024-90JI pinout, AT27C1024-90JI application, or AT27C1024-90JI equivalent, key selection criteria include its OTP architecture, PDIP/PLCC/VSOP package compatibility, 5V-only read operation, rapid 100 µs/word programming, and integrated product identification code for automated programming equipment.
Technical Context
The AT27C1024-90JI implements a CMOS-based OTP memory array with address decoding logic, output buffers, and dual enable control (CE and OE) to support high-speed bus interfacing in 16-bit data width systems. Its Rapid™ programming algorithm uses precise 100 µs PGM pulses at VPP = 13.0 V and VCC = 6.5 V, with verification loops per word.
It features two GND pins requiring connection, A9 voltage sensing (11.5–12.5 V) for product ID readout, and strict sequencing requirements: VCC must be applied before and removed after VPP. Input/output levels are CMOS/TTL compatible, with VIH ≥ 2.0 V and VOL ≤ 0.4 V at IOL = 2.1 mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1,048,576 bits (64K × 16), enabling full 16-bit instruction/data fetches without byte-wide splitting |
| Read Access Time | 90 ns max - eliminates WAIT states in 10 MHz CPU bus cycles |
| Supply Voltage | 5 V ±10% - operates directly from standard logic rail, no auxiliary supplies needed |
| Active Current | 30 mA max at 5 MHz - supports sustained burst reads in embedded controllers |
| Standby Current | 100 µA max (CMOS CE) - enables low-power hold mode during processor sleep |
| Programming Voltage | VPP = 13.0 V ±0.25 V - requires dedicated programming supply, not generated internally |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade control and instrumentation environments |
Pinout & Package
AT27C1024-90JI is supplied in a 40-lead, 0.600" wide plastic dual inline package (PDIP), JEDEC MS-011 AC compliant. Pin 1 is marked by a notch or dot; both GND pins (Pin 11 and Pin 28) must be connected to system ground.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A15 | Address Inputs | 16-bit address bus interface; fully decoded to select one of 65,536 words |
| O0–O15 | Data Outputs | True 16-bit parallel data bus; high-impedance when CE or OE inactive |
| CE | Chip Enable | Primary device select; must be low for read or program operations |
| OE | Output Enable | Secondary output gate; controls data bus drive timing independently of CE |
| PGM | Program Strobe | Active-low pulse input triggering 100 µs programming cycle when VPP = 13 V |
| VPP | Programming Supply | 13 V input required only during programming; must be sequenced after VCC |
| VCC | Power Supply | 5 V supply for logic and memory array; powers internal decoders and buffers |
| GND (Pins 11, 28) | Ground Reference | Two independent ground connections required for noise immunity and current return path separation |
| NC | No Connect | Pin 22 (PDIP) is unconnected; must be left floating or tied to ground per board layout best practice |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/word typical programming time with auto-verify loop, reducing firmware burn time by >5× vs. legacy EPROMs |
| Integrated Product Identification Code | Manufacturer ID (001Eh) and Device Code (00F1h) readable via A9/A0 toggle, enabling automatic algorithm selection in production programmers |
| Two-Line Control Architecture | Independent CE and OE inputs allow precise bus contention management in multiprocessor or DMA systems |
| High-Reliability Process | 2000 V HBM ESD rating and 200 mA latchup immunity ensure robustness in manufacturing and field deployment |
| JEDEC-Standard Packaging | Available in PDIP, PLCC, and VSOP footprints - supports drop-in replacement across legacy board designs |
Applications
| Industrial PLC Firmware Storage | Legacy Embedded Boot ROM |
|---|---|
Use Scenario: Fixed logic controller storing ladder logic and I/O mapping tables in factory automation systems. IC Role / Device Role / Timing Role: Nonvolatile boot memory providing deterministic startup sequence and configuration persistence across power cycles. Use Value: 90 ns access ensures real-time response to sensor interrupts without CPU wait-state insertion. | Use Scenario: 16-bit microprocessor-based medical instrument initializing calibration constants and safety checks at power-on. IC Role / Device Role / Timing Role: Read-only firmware repository holding immutable startup routines and hardware initialization vectors. Use Value: OTP architecture prevents accidental overwrite or malware injection during service updates. |
| Military Communications Module BIOS | Automated Test Equipment (ATE) Pattern Memory |
Use Scenario: Secure radio transceiver loading encrypted bootloader and cryptographic keys during cold start. IC Role / Device Role / Timing Role: Tamper-resistant configuration store accessed only during reset sequence; no runtime write capability. Use Value: Industrial temperature rating (–40°C to +85°C) maintains reliability in unheated vehicle-mounted enclosures. | Use Scenario: High-speed digital pattern generator storing test vectors for semiconductor wafer probing. IC Role / Device Role / Timing Role: High-bandwidth stimulus source delivering 16-bit parallel patterns synchronized to system clock. Use Value: 64K × 16 organization matches typical ATE vector depth requirements without external multiplexing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C1024-90PI | Same die and timing, but in 40-lead PDIP with commercial temp range (0°C to 70°C) | Limited to climate-controlled lab or office environments; not rated for thermal cycling in industrial cabinets | Select only if ambient temperature remains within 0–70°C and cost sensitivity outweighs environmental qualification needs |
| AT27C1024-90VI | Same functionality in 40-lead VSOP (10 mm × 14 mm), 1.27 mm pitch, surface-mount package | Requires rework of PCB layout; eliminates through-hole assembly but increases solder-reflow process complexity | Choose for space-constrained designs where board area savings justify SMT conversion and requalification |
Compared with AT27C1024-90PI and AT27C1024-90VI, the AT27C1024-90JI uniquely combines industrial temperature tolerance with through-hole PDIP packaging-enabling direct replacement on existing industrial control boards without thermal derating or footprint redesign.
Availability
AT27C1024-90JI is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy embedded boot ROM, military communications module BIOS, and automated test equipment (ATE) pattern memory requiring stable component supply across extended lifecycle programs.
Supply support for AT27C1024-90JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and supply chain support for legacy Atmel memory products including the AT27C series.
The AT27C1024 belongs to Atmel's OTP EPROM product line, designed specifically for cost-sensitive, high-reliability firmware storage in systems where flash endurance or reprogrammability is unnecessary and data immutability is critical.
FAQ
What is the maximum allowed VPP voltage for programming the AT27C1024-90JI?
The AT27C1024-90JI requires VPP = 13.0 V ± 0.25 V during programming. Absolute maximum VPP is +14.0 V; exceeding this risks permanent damage to the oxide layer. The device specification mandates strict sequencing: VCC must be applied before VPP and removed after VPP. The AT27C1024-90JI datasheet defines VID on A9 as 11.5–12.5 V for product ID readout, distinct from VPP programming voltage.
Does the AT27C1024-90JI support read operations at 3.3 V?
No, the AT27C1024-90JI does not support 3.3 V operation. It requires a 5 V ±10% supply (4.5 V to 5.5 V) for all modes including read, standby, and programming verification. Input thresholds (VIH ≥ 2.0 V, VIL ≤ 0.8 V) and output drive strength (VOH ≥ 2.4 V at –400 µA) are specified only for 5 V operation. Using 3.3 V will result in undefined outputs and potential bus contention.
How many ground pins does the AT27C1024-90JI PDIP package have, and why are both required?
The AT27C1024-90JI in 40-lead PDIP has two dedicated ground pins: Pin 11 and Pin 28. Both must be connected to system ground to maintain signal integrity and minimize ground bounce during high-speed output transitions. The dual GND design separates core logic return current from output driver return paths, reducing noise coupling into address and control lines - a requirement explicitly stated in the AT27C1024-90JI datasheet.
Can the AT27C1024-90JI be used as a direct replacement for the AT27C516 EPROM?
Yes, the AT27C1024-90JI is a direct upgrade from the AT27C516 (512K-bit, 32K × 16), sharing identical pinout, control protocol (CE/OE/PGM), and 5 V operation. Its doubled capacity (64K × 16) allows migration without PCB changes, provided firmware fits the larger address space. The AT27C1024-90JI retains the same Rapid™ programming algorithm and product ID structure, ensuring compatibility with existing Atmel programming hardware.
What capacitor values are required for stable operation of the AT27C1024-90JI?
The AT27C1024-90JI requires two decoupling capacitors: a 0.1 µF ceramic capacitor placed between VCC and GND as close as possible to Pins 20 and 11/28, and a 4.7 µF bulk electrolytic capacitor near the power entry point of the EPROM array. These values are mandated in the AT27C1024-90JI datasheet to suppress transient excursions during CE switching and stabilize VCC under rapid output loading - failure to implement both risks data corruption or premature device failure.
AT27C1024-90JI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 44-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 1Mbit
- Memory Organization:
- 64K x 16
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.6x16.6)
AT27C1024-90JI FAQ
1.How can I place an order for AT27C1024-90JI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27C1024-90JI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27C1024-90JI reliable?
The price and inventory of AT27C1024-90JI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27C1024-90JI is usually 5 days.
3.What payment methods are accepted for AT27C1024-90JI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27C1024-90JI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27C1024-90JI?
AT27C1024-90JI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27C1024-90JI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27C1024-90JI?
For technical support, including AT27C1024-90JI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27C1024-90JI requirements.
6.How does Aetrix verify that AT27C1024-90JI is sourced from the original manufacturer or authorized distributors?
All AT27C1024-90JI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27C1024-90JI meets industry standards.
7.What is the process for return or replacement of AT27C1024-90JI?
All AT27C1024-90JI units undergo pre-shipment inspection (PSI). If there is an issue with AT27C1024-90JI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27C1024-90JI part is unused and in its original packaging.
Return procedure for AT27C1024-90JI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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