Microchip Technology AT27LV010A-90JC
- Part No.:
- AT27LV010A-90JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT27LV010A-90JC.pdf
- Description:
- IC EPROM 1MBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,399
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27LV010A-90JC from Atmel is a 1-Mbit (128K × 8) one-time programmable EPROM with 90 ns read access time, dual-voltage operation (3.0–3.6 V or 4.5–5.5 V), and JEDEC-standard PLCC-32 packaging. It delivers TTL-compatible outputs at 3.0 V and supports rapid programming at 100 µs/byte - ideal for battery-powered portable systems requiring low-power nonvolatile storage.
For engineers reviewing the AT27LV010A-90JC datasheet, AT27LV010A-90JC pinout, AT27LV010A-90JC application, or AT27LV010A-90JC equivalent, key selection criteria include its 90 ns tACC timing grade, 3.0–3.6 V / 4.5–5.5 V supply flexibility, 20 µA max standby current at 3.6 V, PLCC-32 mechanical compatibility, and OTP programming compatibility with AT27C010.
Technical Context
The AT27LV010A-90JC implements a CMOS-based OTP EPROM architecture with two-line control (CE/OE), enabling bus contention avoidance in shared-memory systems. Its Rapid™ programming algorithm uses 100 µs PGM pulses at VCC = 6.5 V and VPP = 13.0 V, with up to 10 retries per byte during verify-reprogram cycles.
It features integrated product identification (Manufacturer ID = 0x1E, Device ID = 0x05) accessed via A9 = 12.0 V and A0 toggling, ensuring compatibility with industry-standard programmers. Output drive meets LVTTL levels (VOH ≥ 2.4 V at IOH = −2.0 mA; VOL ≤ 0.4 V at IOL = 2.0 mA) across both voltage ranges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1,048,576-bit (128K × 8) OTP EPROM - fixed, non-erasable storage for firmware boot code or configuration data. |
| Read Access Time (tACC) | 90 ns max at VCC = 3.0–3.6 V or 4.5–5.5 V - enables direct interface with 10 MHz microcontrollers without wait states. |
| Supply Voltage Range | 3.0–3.6 V or 4.5–5.5 V - supports dual-supply system designs and hot-plug compatibility between 3.3 V and 5 V hosts. |
| Standby Current (ISB1) | 20 µA max at VCC = 3.6 V, CE = VCC ± 0.3 V - reduces power consumption in sleep-mode embedded systems. |
| Active Current (ICC) | 8 mA max at f = 5 MHz, VCC = 3.6 V - enables low-power operation in portable instrumentation and handheld devices. |
| Programming Speed | 100 µs/byte typical - cuts firmware update time by >5× versus legacy 5 V EPROMs using standard programmers. |
| ESD Protection | 2,000 V HBM - ensures robustness during board handling and in-circuit programming in industrial environments. |
Pinout & Package
AT27LV010A-90JC is supplied in a 32-lead Plastic Leaded Chip Carrier (PLCC) package per JEDEC MS-016 AE, with 1.27 mm pitch and body size 18.5 × 18.5 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 128K-word addressing; A0 least significant bit. |
| O0–O7 | Data Outputs | 8-bit bidirectional data bus in read mode; high-impedance when OE or CE inactive. |
| CE | Chip Enable | Active-low chip select; controls device activation and high-Z output state during standby. |
| OE | Output Enable | Active-low output gate; allows multiple devices on same data bus without contention. |
| PGM | Program Strobe | Active-low pulse input for programming; requires 100 µs width at VCC = 6.5 V, VPP = 13.0 V. |
| VCC | Power Supply | Main supply pin; accepts 3.0–3.6 V or 4.5–5.5 V; must be applied before/with VPP during programming. |
| VPP | Programming Voltage | 13.0 V ± 0.25 V programming supply; internally regulated for reliable OTP cell write. |
| GND | Ground | Reference return for all signals and supplies; requires local 0.1 µF ceramic decoupling. |
| NC | No Connect | Pin 6 (PLCC top view) is unconnected; must remain floating - no external tie required. |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/byte typical programming time with automatic verify-reprogram loop - eliminates manual reprogramming passes and improves production yield. |
| Dual-Voltage Read Operation | Full functionality at 3.0–3.6 V or 4.5–5.5 V - enables single BOM for 3.3 V and 5 V system variants without redesign. |
| LVTTL-Compatible I/O | VOH ≥ 2.4 V at −2.0 mA and VOL ≤ 0.4 V at 2.0 mA across both supply ranges - ensures interoperability with 5 V and 3.3 V logic families. |
| Integrated Product ID Code | Manufacturer ID 0x1E and Device ID 0x05 accessible via A9 = 12.0 V and A0 toggle - enables auto-detection and algorithm selection in universal programmers. |
| JEDEC-Standard PLCC-32 | Pinout and footprint identical to AT27C010-90JC - allows drop-in replacement in existing 5 V EPROM layouts with only VCC/VPP wiring updates. |
Applications
| Industrial Control Firmware Storage | Portable Medical Device Boot ROM |
|---|---|
Use Scenario: Storing immutable bootloader and safety-critical calibration tables in PLC modules operating in -40°C to +85°C environments. IC Role / Device Role / Timing Role: Nonvolatile memory providing deterministic 90 ns read access to initialization code during cold start. Use Value: 20 µA max standby current extends battery backup runtime; 2,000 V ESD rating ensures reliability in electrically noisy factory floors. |
Use Scenario: Holding FDA-approved firmware images in handheld glucose meters and portable ECG monitors powered by coin-cell batteries. IC Role / Device Role / Timing Role: OTP EPROM delivering guaranteed-read boot code with zero risk of accidental overwrite during field use. Use Value: 3.0 V operation enables direct connection to low-voltage MCU rails; 18 mW active power at 5 MHz minimizes thermal load in sealed enclosures. |
| Legacy System 5 V → 3.3 V Migration | Embedded Network Node Configuration |
Use Scenario: Upgrading aging 5 V industrial controllers to energy-efficient 3.3 V operation while retaining existing PCB layout and firmware binaries. IC Role / Device Role / Timing Role: Pin-compatible OTP replacement for AT27C010-90JC with identical PLCC-32 footprint and address/data mapping. Use Value: Dual-voltage support allows seamless transition: same part operates at 5 V during validation and 3.3 V in final deployment. |
Use Scenario: Storing node-specific MAC addresses, encryption keys, and protocol stack parameters in Zigbee and LoRaWAN edge sensors. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage for immutable identity and configuration data not exposed to software stack vulnerabilities. Use Value: One-time programmability prevents runtime corruption; integrated ID code enables automated provisioning verification during manufacturing test. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C010-90JC | 5 V-only operation (4.5–5.5 V); no 3.3 V support; identical 90 ns tACC and PLCC-32 pinout. | Requires dedicated 5 V rail; unsuitable for mixed-voltage or battery-operated systems. | Select when legacy 5 V design must retain exact electrical behavior and no low-voltage capability is needed. |
| MX29LV160CBTI-90G | 16 Mbit Flash (2M × 8), 3.0–3.6 V only, 90 ns access, TSOP-48 package - not OTP, supports erase/write cycles. | Enables field firmware updates but introduces complexity in write protection and endurance management. | Select when reprogrammability is required; not suitable as direct OTP replacement due to different density, command set, and package. |
Compared with AT27C010-90JC, the AT27LV010A-90JC adds 3.3 V operation and lower standby power but retains identical timing and pinout; versus MX29LV160CBTI-90G, it offers simpler interface and guaranteed immutability but lacks reprogrammability and uses PLCC instead of TSOP.
Availability
AT27LV010A-90JC is available at Aetrix Electronics and suitable for industrial control firmware storage, portable medical device boot ROM, and legacy system 5 V → 3.3 V migration requiring stable component supply and long-term obsolescence management.
Supply support for AT27LV010A-90JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer applications.
The AT27LV010A-90JC belongs to Atmel's low-voltage OTP EPROM product line, designed specifically to replace 5 V EPROMs in portable, battery-powered, and dual-supply embedded systems without sacrificing speed or compatibility.
FAQ
What is the maximum read access time specified for the AT27LV010A-90JC?
The AT27LV010A-90JC has a maximum read access time (tACC) of 90 ns under both 3.0–3.6 V and 4.5–5.5 V supply conditions. This value is guaranteed across the commercial temperature range (0°C to 70°C) and applies to all supported packages including the PLCC-32 variant used in AT27LV010A-90JC. The 90 ns rating ensures compatibility with 10 MHz bus systems without wait-state insertion.
Can the AT27LV010A-90JC operate with a 3.3 V supply in a system originally designed for 5 V EPROMs?
Yes, the AT27LV010A-90JC supports true dual-voltage operation: it functions correctly at 3.0–3.6 V or 4.5–5.5 V. When powered at 3.3 V, it produces TTL-compatible outputs (VOH ≥ 2.4 V) that interface directly with 5 V logic inputs. Its PLCC-32 pinout matches AT27C010-90JC, making AT27LV010A-90JC a drop-in replacement in many 5 V designs - only VCC and VPP connections require review for voltage level alignment.
What programming voltage and sequence are required for the AT27LV010A-90JC?
The AT27LV010A-90JC requires VCC = 6.5 V ± 0.25 V and VPP = 13.0 V ± 0.25 V during programming, with VCC applied simultaneously with or before VPP. A 100 µs ± 5% PGM pulse width is used per byte, and the Rapid™ algorithm performs automatic verify-reprogram cycles. A 0.1 µF capacitor must be placed between VPP and GND to suppress transients, as specified in the AT27LV010A-90JC datasheet.
Does the AT27LV010A-90JC support product identification codes, and how are they accessed?
Yes, the AT27LV010A-90JC includes an integrated product identification code: Manufacturer ID = 0x1E and Device ID = 0x05. These are accessed by setting A9 to 12.0 V (VID), holding A1–A16 low, and toggling A0 - low selects the Manufacturer ID byte, high selects the Device ID byte. This feature enables automatic recognition by industry-standard programming equipment, ensuring correct algorithm and voltage selection for AT27LV010A-90JC.
What is the standby current specification for the AT27LV010A-90JC, and under what conditions is it measured?
The AT27LV010A-90JC has a maximum standby current (ISB1) of 20 µA at VCC = 3.6 V, measured with CE = VCC ± 0.3 V (CMOS-level disable). This ultra-low quiescent draw is critical for battery-backed applications such as portable diagnostics equipment. Typical standby current is less than 1 µA at 3.3 V, confirming its suitability for multi-year operation in energy-constrained systems using AT27LV010A-90JC.
AT27LV010A-90JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 3V ~ 3.6V, 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT27LV010A-90JC FAQ
1.How can I place an order for AT27LV010A-90JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27LV010A-90JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27LV010A-90JC reliable?
The price and inventory of AT27LV010A-90JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27LV010A-90JC is usually 5 days.
3.What payment methods are accepted for AT27LV010A-90JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27LV010A-90JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27LV010A-90JC?
AT27LV010A-90JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27LV010A-90JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27LV010A-90JC?
For technical support, including AT27LV010A-90JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27LV010A-90JC requirements.
6.How does Aetrix verify that AT27LV010A-90JC is sourced from the original manufacturer or authorized distributors?
All AT27LV010A-90JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27LV010A-90JC meets industry standards.
7.What is the process for return or replacement of AT27LV010A-90JC?
All AT27LV010A-90JC units undergo pre-shipment inspection (PSI). If there is an issue with AT27LV010A-90JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27LV010A-90JC part is unused and in its original packaging.
Return procedure for AT27LV010A-90JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27LV010A-90JC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

