Microchip Technology AT27LV020A-90TI
- Part No.:
- AT27LV020A-90TI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT27LV020A-90TI.pdf
- Description:
- IC EPROM 2MBIT PARALLEL 32TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:223
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Product details
Overview
AT27LV020A-90TI from Atmel is a 2-Mbit (256K × 8) one-time programmable EPROM optimized for low-voltage battery-powered systems, featuring 90 ns read access time at VCC = 3.0–3.6 V, dual-voltage operation (3.0–3.6 V or 4.5–5.5 V), and JEDEC-standard PLCC/TSOP/VSOP packaging. It serves as nonvolatile program storage in embedded controllers and legacy system upgrades.
For engineers reviewing the AT27LV020A-90TI datasheet, AT27LV020A-90TI pinout, AT27LV020A-90TI application, or AT27LV020A-90TI equivalent, key selection criteria include 90 ns read timing at 3.3 V, <1 µA typical standby current, 32-pin TSOP (8 × 20 mm) industrial-grade packaging, and compatibility with AT27C020 programming infrastructure.
Technical Context
The AT27LV020A-90TI implements a CMOS OTP EPROM architecture with two-line control (CE/OE), enabling bus contention avoidance in shared-memory systems. Its Rapid™ programming algorithm uses 100 µs/byte pulses at VPP = 13.0 V and VCC = 6.5 V, with integrated product identification (Manufacturer ID = 0x1E, Device ID = 0x86) for automated programmer recognition.
It supports TTL- and CMOS-compatible I/O levels across both supply ranges: outputs meet VOH ≥ 2.4 V at IOH = −2.0 mA (3.6 V) and −400 µA (5 V), while inputs accept VIH ≥ 2.0 V and VIL ≤ 0.8 V. System-level design requires 0.1 µF ceramic decoupling per device and 4.7 µF bulk capacitance for EPROM arrays.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2,097,152 bits (256K × 8) - fixed OTP storage capacity for firmware or boot code |
| Read Access Time | 90 ns max at VCC = 3.0–3.6 V - enables direct replacement of 5 V EPROMs in timing-critical designs |
| Supply Voltage Range | 3.0–3.6 V or 4.5–5.5 V - supports dual-supply host systems and battery-backed portable devices |
| Standby Current | 20 µA max (CMOS mode), <1 µA typical at 3.3 V - extends battery life in always-on embedded applications |
| Programming Voltage | VPP = 13.0 ± 0.25 V, VCC = 6.5 ± 0.25 V - requires dedicated high-voltage programming circuitry |
| Operating Temperature | −40°C to +85°C - qualified for industrial environments without derating |
| Package Type | 32-lead TSOP (8 × 20 mm, JEDEC MO-142 BD) - surface-mount compatible with standard reflow profiles |
Pinout & Package
AT27LV020A-90TI is supplied in a 32-lead Thin Small Outline Package (TSOP, Type 1, JEDEC MO-142 BD), 8 mm × 20 mm body, 0.5 mm lead pitch, gull-wing leads. Pin 1 index mark located at top-left corner when viewed from top with marking side up.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A17 | Address Inputs | 256K-word addressing (18-bit bus); A0 least significant bit, A17 most significant |
| O0–O7 | Data Outputs | 8-bit bidirectional data bus; outputs driven only during CE=OE=low read cycles |
| CE | Chip Enable | Active-low global enable; controls power state transition between active and standby modes |
| OE | Output Enable | Active-low output gate; allows multiple devices on same data bus without external logic |
| PGM | Program Strobe | Active-low pulse input (100 µs width) initiating byte programming under VPP = 13 V |
| VPP | Programming Supply | 13.0 V programming voltage input; must be applied simultaneously with or after VCC |
| VCC | Power Supply | 3.0–3.6 V (low-voltage mode) or 4.5–5.5 V (standard mode); powers core and I/O |
| GND | Ground | Reference return path for all signals and supplies; requires local 0.1 µF ceramic decoupling |
Key Features
| Feature | Design Value |
|---|---|
| Rapid™ Programming Algorithm | 100 µs/byte typical programming time - reduces production burn-in cycle duration by >5× vs. legacy EPROMs |
| Integrated Product ID Code | Manufacturer ID = 0x1E, Device ID = 0x86 - enables automatic algorithm selection in industry-standard programmers |
| Two-Line Control Architecture | CE + OE independent gating - eliminates need for external address latches or bus transceivers in simple memory maps |
| JEDEC LVTTL Compatibility | VOH ≥ 2.4 V at IOH = −2.0 mA (3.6 V), VIH ≥ 2.0 V - interoperates directly with 5 V TTL logic without level shifters |
| High-Reliability Process | 2000 V HBM ESD rating, 200 mA latchup immunity - suitable for manufacturing environments with minimal handling controls |
Applications
| Industrial PLC Firmware Storage | Legacy PC BIOS Replacement |
|---|---|
|
Use Scenario: Storing ladder logic firmware in programmable logic controllers operating in factory-floor environments with wide temperature swings and electrical noise. IC Role / Device Role / Timing Role: Nonvolatile program memory holding boot code and runtime logic; accessed via parallel address/data bus during cold start and watchdog reset. Use Value: −40°C to +85°C operation ensures reliability in unconditioned enclosures; 90 ns access meets real-time scan cycle deadlines in sub-millisecond PLC cycles. |
Use Scenario: Replacing obsolete 5 V EPROMs in vintage desktop motherboards where space-constrained TSOP footprint is required. IC Role / Device Role / Timing Role: Boot ROM storing POST routines and hardware initialization sequences; mapped to fixed 0xE0000–0xFFFFF address range. Use Value: JEDEC AT27C020 compatibility allows drop-in replacement using existing programming equipment; 3.3 V operation reduces board-level power dissipation versus 5 V alternatives. |
| Portable Medical Device Bootloader | Automated Test Equipment (ATE) Pattern Memory |
|
Use Scenario: Holding secure bootloader code in handheld diagnostic instruments powered by single-cell Li-ion batteries (3.0–3.6 V nominal). IC Role / Device Role / Timing Role: Read-only execution memory for initial secure boot verification before loading application firmware from flash. Use Value: <1 µA typical standby current extends battery shelf life to >5 years; CMOS-compatible I/O eliminates need for external level translators. |
Use Scenario: Storing test vector patterns in semiconductor ATE systems requiring deterministic, glitch-free parallel data reads at 10 MHz equivalent clock rates. IC Role / Device Role / Timing Role: High-speed pattern store accessed synchronously by pattern generator logic; CE/OE controlled by state machine sequencer. Use Value: 90 ns tACC guarantees setup margin for 10 MHz pattern clocks; 20 µA max ISB prevents thermal drift in densely packed test head modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C020-90JC | 5 V only (4.5–5.5 V), no low-voltage mode; identical 90 ns speed and 32-pin PLCC package | Requires 5 V supply rail; unsuitable for battery-powered or mixed-voltage systems | Select when legacy 5 V infrastructure exists and board redesign is prohibited |
| MX29LV040CTI-90G | 4 Mbit (512K × 8) Flash, 3.0–3.6 V only, 32-pin TSOP; supports erase/rewrite, not OTP | Enables field firmware updates; requires different programming protocol and command sequences | Select when reprogrammability is required and security against accidental overwrite is managed externally |
Compared with AT27LV020A-90TI, AT27C020-90JC lacks low-voltage operation but offers identical pinout and programming compatibility, while MX29LV040CTI-90G provides double density and reprogrammability at the cost of OTP simplicity and guaranteed write-once integrity.
Availability
AT27LV020A-90TI is available at Aetrix Electronics and suitable for industrial automation, legacy system repair, and medical device manufacturing requiring stable component supply across extended product lifecycles.
Supply support for AT27LV020A-90TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT27LV020A product line was designed for cost-sensitive, high-reliability embedded systems needing compact, low-power OTP memory with JEDEC-standard compatibility and industrial temperature support.
FAQ
What is the maximum operating frequency supported by AT27LV020A-90TI?
The AT27LV020A-90TI does not operate at a clock frequency; it is an asynchronous parallel EPROM. Its performance is defined by access timing: tACC ≤ 90 ns at VCC = 3.0–3.6 V means it can reliably serve systems with bus cycles ≥ 90 ns. For example, in a 5 MHz bus (200 ns period), AT27LV020A-90TI provides ample timing margin for read operations without wait states.
Can AT27LV020A-90TI be used in place of AT27C020 in existing designs?
Yes, AT27LV020A-90TI is functionally and pin-compatible with AT27C020 for read operations and shares identical programming algorithms and product ID codes. However, AT27LV020A-90TI supports dual-voltage operation (3.0–3.6 V or 4.5–5.5 V), whereas AT27C020 is 5 V only. Verify VCC rail stability and decoupling when substituting in 5 V systems.
What programming voltage is required for AT27LV020A-90TI?
AT27LV020A-90TI requires VPP = 13.0 ± 0.25 V and VCC = 6.5 ± 0.25 V during programming, with PGM pulse width of 95–105 µs. These voltages must be applied simultaneously - VCC must be present before or concurrently with VPP, and removed after or concurrently with VPP. Standard 3.3 V or 5 V supplies cannot be used for programming.
Does AT27LV020A-90TI support read-modify-write operations?
No, AT27LV020A-90TI is a one-time programmable (OTP) EPROM. Once programmed, its contents cannot be altered, erased, or rewritten. It lacks internal erase circuitry or flash memory architecture. Data integrity is permanent after programming, making it suitable for immutable firmware or calibration tables where tamper resistance is critical.
What is the purpose of the NC pins on AT27LV020A-90TI?
AT27LV020A-90TI has no NC (No Connect) pins in its 32-lead TSOP package. All 32 pins are assigned functions: A0–A17 (18 address lines), O0–O7 (8 data outputs), CE, OE, PGM, VPP, VCC, and GND. Pin count matches JEDEC MO-142 BD specification exactly; unused pins do not exist in this variant's pinout.
AT27LV020A-90TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 3V ~ 3.6V, 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT27LV020A-90TI FAQ
1.How can I place an order for AT27LV020A-90TI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27LV020A-90TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27LV020A-90TI reliable?
The price and inventory of AT27LV020A-90TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27LV020A-90TI is usually 5 days.
3.What payment methods are accepted for AT27LV020A-90TI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27LV020A-90TI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27LV020A-90TI?
AT27LV020A-90TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27LV020A-90TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27LV020A-90TI?
For technical support, including AT27LV020A-90TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27LV020A-90TI requirements.
6.How does Aetrix verify that AT27LV020A-90TI is sourced from the original manufacturer or authorized distributors?
All AT27LV020A-90TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27LV020A-90TI meets industry standards.
7.What is the process for return or replacement of AT27LV020A-90TI?
All AT27LV020A-90TI units undergo pre-shipment inspection (PSI). If there is an issue with AT27LV020A-90TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27LV020A-90TI part is unused and in its original packaging.
Return procedure for AT27LV020A-90TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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