Microchip Technology AT27LV256A-90JU-T
- Part No.:
- AT27LV256A-90JU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT27LV256A-90JU-T.pdf
- Description:
- IC EPROM 256KBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:1,632
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT27LV256A-90JU-T from Microchip Technology (formerly Atmel) is a 32K × 8-bit, one-time programmable EPROM with 90 ns read access time, dual-voltage operation (3.0–3.6 V or 4.5–5.5 V), and JEDEC-standard 32-lead PLCC packaging. It delivers TTL-compatible outputs at 3.0 V and supports rapid programming at 100 µs/byte, making it suitable for battery-powered portable systems requiring low-power nonvolatile storage.
For engineers reviewing the AT27LV256A-90JU-T datasheet, AT27LV256A-90JU-T pinout, AT27LV256A-90JU-T application, or AT27LV256A-90JU-T equivalent, key selection considerations include industrial temperature support (−40°C to +85°C), CMOS/TTL I/O compatibility, standby current <1 µA (typical), and direct programming equivalence with AT27C256R using standard 5 V programmers.
Technical Context
The AT27LV256A-90JU-T implements a single-supply OTP EPROM architecture with two-line control (CE/OE) enabling bus contention avoidance in shared-memory systems. Its dual-voltage design allows seamless integration into mixed 3.3 V/5 V platforms without level-shifting circuitry.
It features integrated product identification code (0x1E8C), 2,000 V ESD protection, and 200 mA latchup immunity-critical for industrial environments. Programming uses a 100 µs CE pulse at VCC = 6.5 V and VPP = 13.0 V, with automatic verify-and-reprogram loops per byte.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 262,144 bits (32K × 8), sufficient for firmware boot code or configuration data in embedded controllers |
| Read access time | 90 ns max at VCC = 3.0–3.6 V, enabling real-time execution in 11 MHz CPU systems |
| Supply voltage range | 3.0–3.6 V or 4.5–5.5 V - supports dual-rail host systems without external regulators |
| Standby current | 20 µA max (CMOS mode), <1 µA typical at 3.3 V - extends battery life in portable devices |
| Active power dissipation | 29 mW max at 5 MHz and VCC = 3.6 V - reduces thermal load vs. legacy 5 V EPROMs |
| Operating temperature | −40°C to +85°C - qualified for industrial-grade PCB deployment |
| Programming speed | 100 µs/byte typical - cuts production programming time by >5× vs. conventional EPROMs |
Pinout & Package
AT27LV256A-90JU-T is housed in a 32-lead plastic J-leaded chip carrier (PLCC), JEDEC MS-016 variation AE compliant, with pins 1 and 17 designated as no-connect. The package measures 12.47 mm × 14.99 mm × 3.35 mm (max height) and features matte tin lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32K memory space; TTL/CMOS compatible thresholds |
| O0–O7 | Data outputs | 8-bit bidirectional data bus; VOH ≥ 2.4 V at IOH = −2.0 mA (3.3 V), ensuring robust logic-high drive into TTL loads |
| CE | Chip Enable | Active-low global enable; controls device activation and standby entry - critical for multi-device memory mapping |
| OE | Output Enable | Active-low output gate; enables high-impedance tri-state during bus sharing or write cycles |
| VCC | Power supply | Primary supply pin accepting either 3.0–3.6 V or 4.5–5.5 V; must be applied before/with VPP during programming |
| VPP | Programming voltage | 13.0 V ± 0.25 V input for OTP programming; requires 0.1 µF decoupling to ground per datasheet |
| GND | Ground reference | Signal and power return path; decoupling capacitor (0.1 µF ceramic) required adjacent to this pin |
| NC | No Connect | Pins 1, 4, 17, and 20 are internally unconnected - must remain floating per JEDEC PLCC layout |
Key Features
| Feature | Design Value |
|---|---|
| Rapid programming algorithm | 100 µs/byte typical with auto-verify loop - eliminates manual reprogramming steps and improves production yield |
| Integrated product ID code | 0x1E8C (manufacturer + device code) - enables automated programmer recognition and algorithm selection |
| Dual-voltage I/O compatibility | TTL-level outputs at 3.0 V supply - interoperates directly with 5 V logic without translators in mixed-supply systems |
| High-reliability process | 2,000 V HBM ESD rating and 200 mA latchup immunity - ensures robustness in industrial handling and operation |
| Green packaging | Pb/halide-free PLCC - meets RoHS Directive 2011/65/EU and facilitates environmentally compliant manufacturing |
Applications
| Industrial PLC Firmware Storage | Medical Device Boot ROM |
|---|---|
Use Scenario: Storing immutable boot firmware and safety-critical configuration parameters in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile program memory providing deterministic startup sequence and fail-safe recovery vectors. Use Value: 90 ns access time enables immediate instruction fetch upon reset; industrial temperature rating ensures reliability across wide ambient swings. | Use Scenario: Holding certified bootloader and calibration constants in Class II medical instruments requiring long-term data retention and regulatory traceability. IC Role / Device Role / Timing Role: One-time programmable ROM used for immutable firmware image storage prior to final device certification. Use Value: OTP architecture prevents field corruption; integrated ID code (0x1E8C) supports automated verification during manufacturing test. |
| Avionics Data Logger Memory | Test Equipment Configuration Module |
Use Scenario: Capturing flight-critical sensor initialization tables and fault history logs in airborne data acquisition units operating on 28 V DC converted to 3.3 V. IC Role / Device Role / Timing Role: Low-power EPROM supplying static configuration data to microcontrollers during cold-start sequences. Use Value: <1 µA standby current minimizes parasitic drain on backup batteries; dual-voltage support simplifies power architecture. | Use Scenario: Storing instrument-specific calibration coefficients and interface protocol settings in benchtop oscilloscopes and signal generators. IC Role / Device Role / Timing Role: Factory-programmed memory module delivering verified configuration data to host FPGA or MCU at power-on. Use Value: Rapid 100 µs/byte programming accelerates final test station throughput; PLCC package allows socket-based rework if calibration updates required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OTP EPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT27C256R-90PU | 5 V only operation (4.5–5.5 V); no low-voltage mode; same 32K × 8 organization and 90 ns speed | Requires dedicated 5 V rail; unsuitable for battery-powered or mixed-voltage systems | Select when legacy 5 V infrastructure exists and low-voltage operation is unnecessary |
| MX27C256 (Macronix) | Pin-compatible 32K × 8 OTP EPROM; 120 ns access time; 5 V only; different ID code and programming voltage | Lacks 3.3 V operation and rapid programming algorithm; requires separate programming setup | Choose for cost-sensitive designs where 90 ns timing and dual-voltage are not mandatory |
Compared with AT27C256R-90PU and MX27C256, the AT27LV256A-90JU-T uniquely supports both 3.3 V and 5 V operation while maintaining 90 ns performance and rapid programming-enabling single-BOM flexibility across portable and fixed industrial platforms.
Availability
AT27LV256A-90JU-T is available at Aetrix Electronics and suitable for industrial PLC firmware storage, medical device boot ROM, and avionics data logger memory requiring stable component supply and long-lifecycle support.
Supply support for AT27LV256A-90JU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and manufacturing continuity for legacy Atmel memory products including the AT27LV series.
The AT27LV256A-90JU-T belongs to Atmel's low-voltage OTP EPROM product line, designed specifically for portable, battery-operated, and mixed-supply embedded systems needing reliable, low-power nonvolatile storage without flash endurance limitations.
FAQ
What is the maximum operating voltage for AT27LV256A-90JU-T during normal read operation?
The AT27LV256A-90JU-T supports two distinct read voltage ranges: 3.0 V to 3.6 V (low-voltage mode) and 4.5 V to 5.5 V (standard 5 V mode). It does not operate at intermediate voltages like 4.0 V. During programming, VCC must be set to 6.5 V ± 0.25 V and VPP to 13.0 V ± 0.25 V - these are strictly programming-only conditions and not for read operation. The AT27LV256A-90JU-T must never be operated outside these specified ranges to ensure data integrity and device reliability.
Is AT27LV256A-90JU-T pin-compatible with AT27C256R-90PU?
Yes, the AT27LV256A-90JU-T is physically and functionally pin-compatible with the AT27C256R-90PU in 32-lead PLCC packages. Both share identical pinout, address/data bus mapping, and CE/OE control logic. However, the AT27LV256A-90JU-T adds dual-voltage operation and lower standby current, while retaining full programming compatibility - meaning the same programmer hardware and algorithms used for AT27C256R-90PU can be applied directly to the AT27LV256A-90JU-T without modification.
Does AT27LV256A-90JU-T require external pull-up resistors on its output pins?
No, the AT27LV256A-90JU-T does not require external pull-up resistors on O0–O7 outputs. Its outputs are actively driven to valid TTL/CMOS logic levels (VOH ≥ 2.4 V, VOL ≤ 0.4 V) under specified load conditions (IOH = −2.0 mA, IOL = 2.0–2.1 mA). Pull-ups would interfere with proper bus contention management and violate the device's tri-state behavior during OE/CE deactivation. External termination is only needed if interfacing with unterminated transmission lines - not for standard parallel memory bus operation.
Can AT27LV256A-90JU-T be reprogrammed after initial programming?
No, the AT27LV256A-90JU-T is a one-time programmable (OTP) EPROM. Once programmed, its memory cells cannot be erased or rewritten electrically or optically. The "LV" designation refers to low-voltage operation, not reprogrammability. UV erasure is not supported - unlike UV-erasable EPROMs (e.g., AT27C256), the AT27LV256A-90JU-T uses a fused-link or floating-gate structure permanently altered during the initial programming cycle. Therefore, the AT27LV256A-90JU-T must be programmed with final, verified data before system integration.
What decoupling capacitors are required for stable operation of AT27LV256A-90JU-T?
The AT27LV256A-90JU-T requires two decoupling capacitors: a 0.1 µF high-frequency ceramic capacitor placed between VCC and GND as close as possible to the device's pins, and a 4.7 µF bulk electrolytic capacitor located near the power supply entry point for boards containing multiple EPROMs. These values are mandated in the datasheet to suppress transient voltage excursions during CE transitions and stabilize VCC under dynamic load. Failure to implement both capacitors risks timing violations, data corruption, or premature device failure - especially during rapid read or programming cycles. The AT27LV256A-90JU-T will not meet its 90 ns specification without proper decoupling.
AT27LV256A-90JU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EPROM
- Technology:
- EPROM - OTP
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 90 ns
- Voltage - Supply:
- 3V ~ 3.6V, 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT27LV256A-90JU-T FAQ
1.How can I place an order for AT27LV256A-90JU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT27LV256A-90JU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT27LV256A-90JU-T reliable?
The price and inventory of AT27LV256A-90JU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT27LV256A-90JU-T is usually 5 days.
3.What payment methods are accepted for AT27LV256A-90JU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT27LV256A-90JU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT27LV256A-90JU-T?
AT27LV256A-90JU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT27LV256A-90JU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT27LV256A-90JU-T?
For technical support, including AT27LV256A-90JU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT27LV256A-90JU-T requirements.
6.How does Aetrix verify that AT27LV256A-90JU-T is sourced from the original manufacturer or authorized distributors?
All AT27LV256A-90JU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT27LV256A-90JU-T meets industry standards.
7.What is the process for return or replacement of AT27LV256A-90JU-T?
All AT27LV256A-90JU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT27LV256A-90JU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT27LV256A-90JU-T part is unused and in its original packaging.
Return procedure for AT27LV256A-90JU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT27LV256A-90JU-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

