Microchip Technology AT28BV256-20TU
- Part No.:
- AT28BV256-20TU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28BV256-20TU.pdf
- Description:
- IC EEPROM 256KBIT PAR 28TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,869
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Product details
Overview
AT28BV256-20TU from Atmel is a 256 Kbit (32K × 8) battery-voltage parallel EEPROM with JEDEC-standard byte-wide pinout, 200 ns read access time, 2.7–3.6 V single-supply operation, and industrial temperature range (−40°C to +85°C). It supports automatic 1–64-byte page writes with internal latching and timer, and features hardware/software data protection for embedded nonvolatile storage in microcontroller systems.
For engineers reviewing the AT28BV256-20TU datasheet, AT28BV256-20TU pinout, AT28BV256-20TU application, or AT28BV256-20TU equivalent, key selection criteria include page-write timing (≤10 ms), CMOS standby current (≤50 µA), Data Polling/Toggle Bit write-completion detection, and TSOP-28 packaging compatibility with legacy SRAM-style bus interfacing.
Technical Context
The AT28BV256-20TU operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on WE or CE low pulse with OE high. Its internal 64-byte page register latches address and data, freeing the bus during autonomous programming.
Write completion is verified via two deterministic methods: Data Polling (I/O7 complement toggle) and Toggle Bit (I/O6 state alternation), both usable at any point during tWC (max 10 ms). Software Data Protection requires a mandatory 3-byte unlock sequence before each write, preventing corruption during power transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 256 Kbit (32,768 × 8 bits); sufficient for firmware patch storage or configuration tables in resource-constrained controllers. |
| Read Access Time | 200 ns max; enables direct replacement of fast SRAM in legacy 8-bit bus systems without timing redesign. |
| Page Write Cycle | ≤10 ms; allows burst programming of up to 64 bytes per cycle, reducing host CPU overhead vs. byte-by-byte writes. |
| Supply Voltage | 2.7 V – 3.6 V; compatible with 3.3 V logic rails and battery-backed operation down to 2.7 V. |
| Standby Current | ≤50 µA (CMOS); critical for low-power IoT edge nodes requiring years of battery life in sleep mode. |
| Data Retention | 10 years minimum; ensures long-term reliability in unattended industrial logging applications. |
| Endurance | 10,000 write/erase cycles; supports frequent calibration data updates in test equipment or field-programmable devices. |
Pinout & Package
AT28BV256-20TU uses a 28-lead Plastic Thin Small Outline Package (TSOP, Type I, 8 mm × 13.4 mm), compliant with JEDEC MO-183. Pin 1 is marked by a beveled corner; package is Pb/halide-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus; selects one of 32,768 memory locations (A14–A0), with A6–A14 defining page boundaries for 64-byte writes. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; carries read data output or write data input; supports true SRAM-style bus sharing. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; low with OE high and WE low for write initiation. |
| OE | Output Enable | Active-low output control; places I/O pins in high-impedance state when high, preventing bus contention. |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; rising edge triggers internal programming timer. |
| VCC | Power Supply | 2.7–3.6 V supply; includes internal VCC power-on delay (~10 ms) to inhibit writes until stable. |
| GND | Ground Reference | Signal and power return; decoupling capacitor required within 10 mm of VCC pin for noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct hardware compatibility with existing 8-bit microcontroller address/data buses-no glue logic required. |
| Automatic Page Write | Internal 64-byte latch and timer eliminate host timing constraints; enables efficient bulk updates without external sequencing. |
| Dual Write-Completion Detection | Data Polling (I/O7) and Toggle Bit (I/O6) provide redundant, software-accessible status-no dedicated BUSY pin needed. |
| Hardware + Software Data Protection | VCC delay, noise filtering (<15 ns), and 3-byte unlock sequence prevent spurious writes during power-up/down or EMI events. |
| Industrial Temperature Range | −40°C to +85°C operation validated across full voltage and timing specs-suitable for factory automation and outdoor electronics. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables and operational parameters in programmable logic controllers deployed in factory environments with wide ambient temperature swings. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus; retains settings across power cycles and supports field updates via page writes. Use Value: 10,000-cycle endurance and 10-year data retention ensure reliable parameter persistence over multi-year maintenance intervals without backup batteries. | Use Scenario: Holding sensor calibration coefficients and device-specific correction factors in portable diagnostic equipment requiring FDA-compliant data integrity. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage element; software data protection prevents accidental overwrite during boot or firmware update sequences. Use Value: Dual write-detection methods (Data Polling + Toggle Bit) enable deterministic firmware verification-critical for audit-trail compliance in regulated medical systems. |
| Automotive Body Control Module | Test & Measurement Equipment |
Use Scenario: Saving user preferences, fault logs, and adaptive learning values in automotive body control units operating under engine-bay thermal stress. IC Role / Device Role / Timing Role: Battery-voltage EEPROM interfaced directly to MCU's external memory bus; operates reliably at 2.7 V during cranking transients. Use Value: 2.7–3.6 V supply range and −40°C to +85°C rating meet AEC-Q100 Class 2 requirements for under-hood electronics without derating. | Use Scenario: Storing instrument calibration constants and self-test results in benchtop multimeters and signal generators subject to frequent recalibration. IC Role / Device Role / Timing Role: High-reliability nonvolatile memory with deterministic write timing (≤10 ms page write); enables fast calibration save operations without blocking main processor. Use Value: 200 ns read access allows real-time retrieval of calibration data during measurement cycles-no performance penalty versus volatile RAM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W256F | 512 Kbit density, 120 ns read, 3.3 V only, no software protection; requires external write-enable logic. | Larger capacity but lacks integrated page-write automation and dual-status detection-increases firmware complexity. | Select when higher density is required and host can manage timing-critical byte writes without polling. |
| Microchip 25LC256 | 256 Kbit SPI interface, 5 MHz clock, 2.5–5.5 V supply; serial protocol adds latency but reduces pin count. | Requires SPI master controller and software driver; unsuitable for SRAM-bus systems needing parallel access. | Select for space-constrained designs where board area savings from 8-pin SOIC outweigh parallel bus speed benefits. |
Compared with ST M28W256F and Microchip 25LC256, the AT28BV256-20TU uniquely delivers SRAM-compatible parallel timing, autonomous page writes, and dual-status detection in a TSOP-28 package-enabling drop-in upgrades in legacy 8-bit systems without PCB or firmware rework.
Availability
AT28BV256-20TU is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, automotive body control modules, and test equipment requiring stable component supply, long-life data retention, and proven legacy bus compatibility.
Supply support for AT28BV256-20TU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28BV256 product line was designed for embedded systems requiring pin-compatible, low-voltage parallel EEPROM replacements with enhanced reliability, integrated write protection, and industrial-grade temperature performance.
FAQ
What is the maximum page write cycle time for AT28BV256-20TU?
The AT28BV256-20TU has a maximum page write cycle time of 10 ms, as specified in the AC characteristics table. This value applies to all 1–64-byte page writes and is guaranteed across the full industrial temperature range (−40°C to +85°C) and supply voltage (2.7–3.6 V). The internal control timer manages this duration autonomously after the final byte is latched.
Does AT28BV256-20TU support both hardware and software data protection?
Yes, AT28BV256-20TU implements dual-layer protection: hardware features include VCC power-on delay (~10 ms), write-inhibit logic (OE high/CE high/WE high), and noise filtering (<15 ns pulses rejected); software protection requires a mandatory 3-byte unlock sequence (AAh→55h→A0h) before any write operation, preventing corruption during power transitions.
What package type is used by AT28BV256-20TU?
AT28BV256-20TU uses a 28-lead Plastic Thin Small Outline Package (TSOP, Type I), measuring 8 mm × 13.4 mm, with lead pitch of 0.55 mm. This package conforms to JEDEC MO-183 and is Pb/halide-free. Pin 1 is identified by a beveled corner on the package body.
How does AT28BV256-20TU indicate write completion?
AT28BV256-20TU provides two independent, software-readable methods: Data Polling monitors I/O7, which outputs the complement of the last written byte until completion, then returns true data; Toggle Bit monitors I/O6, which toggles between 0 and 1 during programming and stabilizes upon completion-both usable at any time during the write cycle.
What is the endurance and data retention specification for AT28BV256-20TU?
AT28BV256-20TU guarantees 10,000 write/erase cycles and 10 years of data retention at temperatures up to +85°C. These specifications are validated using Atmel's advanced nonvolatile CMOS process and internal error correction, ensuring reliability in long-deployment industrial and medical applications.
AT28BV256-20TU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28BV256-20TU FAQ
1.How can I place an order for AT28BV256-20TU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28BV256-20TU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28BV256-20TU reliable?
The price and inventory of AT28BV256-20TU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28BV256-20TU is usually 5 days.
3.What payment methods are accepted for AT28BV256-20TU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28BV256-20TU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28BV256-20TU?
AT28BV256-20TU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28BV256-20TU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28BV256-20TU?
For technical support, including AT28BV256-20TU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28BV256-20TU requirements.
6.How does Aetrix verify that AT28BV256-20TU is sourced from the original manufacturer or authorized distributors?
All AT28BV256-20TU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28BV256-20TU meets industry standards.
7.What is the process for return or replacement of AT28BV256-20TU?
All AT28BV256-20TU units undergo pre-shipment inspection (PSI). If there is an issue with AT28BV256-20TU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28BV256-20TU part is unused and in its original packaging.
Return procedure for AT28BV256-20TU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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