Microchip Technology AT28BV64-30SC
- Part No.:
- AT28BV64-30SC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28BV64-30SC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,249
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Product details
Overview
AT28BV64-30SC from Atmel is a 64K (8K × 8) parallel EEPROM designed for battery-powered systems, operating at 2.7V–3.6V with 300 ns read access time, 3 ms byte write cycle, and 50 µA CMOS standby current. It supports direct microprocessor control via DATA polling and open-drain RDY/BUSY output, and is qualified for commercial temperature range (0°C to 70°C) in 28-pin SOIC package.
For engineers reviewing the AT28BV64-30SC datasheet, AT28BV64-30SC pinout, AT28BV64-30SC application, or AT28BV64-30SC equivalent, key selection considerations include low-voltage operation, JEDEC-standard byte-wide parallel interface, built-in write protection, endurance of 100,000 cycles, and compatibility with SRAM-like bus timing without external logic.
Technical Context
The AT28BV64-30SC implements a nonvolatile CMOS EEPROM architecture with internal self-timed write cycles, supporting both WE-controlled and CE-controlled byte writes. It uses VCC sensing and power-on delay to prevent inadvertent writes and includes error correction for enhanced data retention.
Its dual-line chip enable (CE) and output enable (OE) control enables flexible bus arbitration, while RDY/BUSY open-drain output and I/O7 DATA polling provide two independent methods to detect write completion-critical for deterministic firmware timing in embedded controllers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), directly addressable as byte-wide SRAM-compatible memory space |
| Supply Voltage | 2.7V–3.6V - enables operation from single Li-ion or 3-cell alkaline batteries without regulation |
| Read Access Time | 300 ns - meets timing requirements for 3.3 MHz bus interfaces without wait states |
| Byte Write Cycle | 3 ms - internally timed; frees CPU bus after address/data latching for concurrent operations |
| Standby Current | 50 µA - supports multi-year battery life in always-on low-power monitoring nodes |
| Endurance | 100,000 write/erase cycles - sufficient for firmware parameter logging in industrial controllers |
| Data Retention | 10 years at 85°C - validated for long-term storage in unregulated ambient environments |
Pinout & Package
AT28BV64-30SC is packaged in a 28-lead, 0.300" wide plastic gull-wing small outline (SOIC) per JEDEC MS-012 standard, with pin 1 marked by notch and index area. Pin functions are fully compatible with industry-standard parallel EEPROM footprints.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus for full 8K-word decoding; TTL/CMOS compatible |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; high-impedance when disabled; supports DATA polling on I/O7 |
| CE | Chip Enable | Active-low device select; required low for read/write; enables CE-controlled write mode |
| OE | Output Enable | Active-low output gate; controls data bus tristate; used with CE for bus contention avoidance |
| WE | Write Enable | Active-low write strobe; initiates WE-controlled byte write; must be held stable during tWP |
| RDY/BUSY | Open-Drain Status Output | Actively pulled low during write; released high-Z at completion; supports wired-OR multi-device monitoring |
| VCC, GND | Power Supply | Single 2.7–3.6V supply; no separate VPP or programming voltage required |
| NC | No Connect | Pin 16 in SOIC package - must remain unconnected; not internally bonded |
Key Features
| Feature | Design Value |
|---|---|
| Direct Microprocessor Interface | Operates like SRAM - no external address latches or timing generators needed |
| Two Write Completion Detection Methods | Hardware RDY/BUSY signal + software DATA polling on I/O7 - provides firmware flexibility and hardware simplicity |
| VCC Sense & Power-On Delay Protection | Automatically inhibits writes below 1.8V and enforces 10 ms delay after VCC reaches 2.0V - prevents corruption during brown-out or power ramp-up |
| JEDEC Byte-Wide Pinout | Pin-compatible with industry-standard 28-pin parallel EEPROMs - enables drop-in replacement in existing designs |
| Internal Error Correction | Enhances endurance and data retention beyond standard EEPROM process limits - verified over 100,000 cycles and 10-year retention |
Applications
| Smart Meter Firmware Storage | Industrial PLC Configuration Memory |
|---|---|
Use Scenario: Storing tariff tables, calibration coefficients, and event logs in electricity/water meters powered by primary lithium batteries. IC Role / Device Role / Timing Role: Nonvolatile configuration and parameter storage with infrequent writes and decade-long data retention. Use Value: 50 µA standby current extends battery life beyond 10 years; 2.7V minimum operation avoids need for boost regulators. | Use Scenario: Holding user-defined ladder logic parameters, I/O mapping, and alarm thresholds in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Field-updatable configuration memory accessed via microcontroller parallel bus during commissioning or maintenance. Use Value: 300 ns read access enables real-time parameter fetch without CPU stalls; RDY/BUSY signaling simplifies interrupt-driven write handling. |
| Medical Device Calibration Data | Point-of-Sale Terminal Settings |
Use Scenario: Storing sensor calibration offsets and diagnostic history in portable blood glucose monitors and infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage of safety-critical calibration values requiring guaranteed 10-year retention. Use Value: Internal error correction and 100,000-cycle endurance ensure reliability across repeated recalibrations over product lifetime. | Use Scenario: Maintaining tax rates, receipt templates, and operator permissions in retail terminals operating 24/7 with periodic firmware updates. IC Role / Device Role / Timing Role: Persistent settings storage updated during nightly maintenance windows; accessed randomly during transaction processing. Use Value: JEDEC-standard pinout allows seamless integration into legacy terminal PCBs; 3 ms write time fits within maintenance timeout windows. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-15PU | 5V-only operation (4.5–5.5V); 150 ns access; PDIP package; no RDY/BUSY pin | Requires 5V rail; lacks hardware busy signaling; suited for legacy 5V systems with tight timing | Select only if system runs at 5V and does not require low-power standby or write status feedback |
| MN63C64-30PL | Same 2.7–3.6V range and 300 ns access; PLCC-32 package; includes additional 32-byte ID area | Larger footprint; extra ID space useful for traceability but increases board area | Prefer when board layout accommodates PLCC and device serialization is required |
Compared with AT28C64B-15PU and MN63C64-30PL, the AT28BV64-30SC uniquely balances low-voltage operation, hardware RDY/BUSY signaling, and SOIC packaging - making it optimal for space-constrained, battery-powered designs where deterministic write completion detection and ultra-low standby current are mandatory.
Availability
AT28BV64-30SC is available at Aetrix Electronics and suitable for smart meter firmware storage, industrial PLC configuration memory, and medical device calibration data applications requiring stable component supply, long-lifecycle availability, and consistent parametric performance across production batches.
Supply support for AT28BV64-30SC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for embedded and industrial applications.
The AT28BV64 product line was engineered for battery-operated systems needing reliable, low-power parallel EEPROM with SRAM-like interface simplicity and robust write protection - targeting metering, instrumentation, and industrial control markets.
FAQ
What is the maximum operating voltage for the AT28BV64-30SC?
The AT28BV64-30SC has an absolute maximum VCC rating of +6.25V, but its specified operational range is strictly 2.7V to 3.6V. Operating outside this window risks data corruption or reduced endurance. The device includes VCC sense circuitry that disables writes below ~1.8V, and the AT28BV64-30SC must be powered within its rated range to guarantee 300 ns read access, 3 ms write timing, and 50 µA standby current.
Does the AT28BV64-30SC require an external programming voltage (VPP)?
No, the AT28BV64-30SC does not require an external VPP. All write operations are performed using only the standard VCC supply (2.7V–3.6V). Internal charge pumps generate the necessary high-voltage programming signals, eliminating the need for dedicated VPP pins, external regulators, or complex power sequencing - a key design advantage confirmed in the AT28BV64-30SC datasheet Section "Device Operation".
How is write completion detected on the AT28BV64-30SC?
The AT28BV64-30SC provides two independent write completion detection methods: (1) the RDY/BUSY pin goes high-Z at completion (active-low during write), and (2) DATA polling reads the complement of the written data on I/O7 until completion, then returns true data. Both mechanisms are fully supported in the AT28BV64-30SC and allow firmware to choose between interrupt-driven or polling-based timing control without external components.
Is the AT28BV64-30SC pin-compatible with standard 28-pin parallel EEPROMs?
Yes, the AT28BV64-30SC uses a JEDEC-approved byte-wide pinout and is pin-compatible with industry-standard 28-pin parallel EEPROMs such as the AT28C64B and X28C64. Its SOIC-28 footprint, signal assignments (A0–A12, I/O0–I/O7, CE/OE/WE, RDY/BUSY), and DC/AC timing behavior make it a functional drop-in replacement in most existing designs - provided the host system operates within the 2.7–3.6V range and leverages RDY/BUSY or DATA polling.
What is the endurance specification for the AT28BV64-30SC?
The AT28BV64-30SC is rated for 100,000 write/erase cycles per memory location, as verified under standard operating conditions (2.7–3.6V, 0°C to 70°C). This endurance is achieved through internal error correction circuitry and advanced CMOS process optimization. The specification applies uniformly across the full 8K × 8 array and is guaranteed for the AT28BV64-30SC across its commercial temperature range.
AT28BV64-30SC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- 300 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28BV64-30SC FAQ
1.How can I place an order for AT28BV64-30SC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28BV64-30SC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28BV64-30SC reliable?
The price and inventory of AT28BV64-30SC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28BV64-30SC is usually 5 days.
3.What payment methods are accepted for AT28BV64-30SC?
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AT28BV64-30SC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28BV64-30SC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28BV64-30SC?
For technical support, including AT28BV64-30SC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28BV64-30SC requirements.
6.How does Aetrix verify that AT28BV64-30SC is sourced from the original manufacturer or authorized distributors?
All AT28BV64-30SC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28BV64-30SC meets industry standards.
7.What is the process for return or replacement of AT28BV64-30SC?
All AT28BV64-30SC units undergo pre-shipment inspection (PSI). If there is an issue with AT28BV64-30SC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28BV64-30SC part is unused and in its original packaging.
Return procedure for AT28BV64-30SC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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