Microchip Technology AT28BV64-30SI
- Part No.:
- AT28BV64-30SI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28BV64-30SI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,393
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28BV64-30SI from Atmel is a 64K (8K × 8) parallel EEPROM designed for battery-powered systems, operating at 2.7V–3.6V with 300 ns read access time, 3 ms byte write cycle, and 50 µA CMOS standby current. It supports direct microprocessor control via READY/BUSY open-drain output and DATA polling, and is qualified for industrial temperature range (−40°C to +85°C).
For engineers reviewing the AT28BV64-30SI datasheet, AT28BV64-30SI pinout, AT28BV64-30SI application, or AT28BV64-30SI equivalent, key selection considerations include its JEDEC-approved byte-wide parallel interface, low-voltage operation, endurance of 100,000 write cycles, and compatibility with SRAM-like bus timing in embedded control and data logging systems.
Technical Context
The AT28BV64-30SI implements a self-timed byte-write architecture with internal clear-and-write sequencing, eliminating external timing components. It uses CMOS nonvolatile technology with built-in error correction for enhanced data retention and endurance.
Two hardware-based write completion detection methods are supported: level-sensitive RDY/BUSY (open-drain) and DATA polling on I/O7. Write protection includes VCC sense (<1.8V inhibit), 10 ms power-on delay, and logic-level inhibition via CE/OE/WE states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), organized as byte-addressable parallel EEPROM |
| Supply Voltage | 2.7V–3.6V - enables direct integration into 3.3V systems and battery-backed designs without level shifting |
| Read Access Time | 300 ns - compatible with 3.3 MHz bus timing without wait states in microcontroller interfaces |
| Byte Write Cycle | 3 ms - deterministic self-timed programming; no external erase/write pulse required |
| Standby Current | 50 µA - supports multi-year operation in coin-cell–powered data loggers and RTC backup memory |
| Endurance | 100,000 write cycles - sufficient for firmware parameter storage and infrequent configuration updates |
| Data Retention | 10 years at 85°C - validated for industrial deployment in uncooled enclosures |
Pinout & Package
AT28BV64-30SI is supplied in a 28-lead SOIC (28S) package per JEDEC MS-012, 0.300" wide body, with 1.27 mm pitch. Pin 1 is marked by index notch; pin 14 is GND, pin 28 is VCC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus for 8K-word addressing; latched on WE/CE falling edge during write |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; supports DATA polling on I/O7 during write completion detection |
| CE | Chip Enable | Active-low chip select; must be low for read/write; high disables outputs and enables standby mode |
| OE | Output Enable | Active-low output gate; controls data bus tristate; used with CE for bus contention avoidance |
| WE | Write Enable | Active-low write strobe; initiates byte write on falling edge; latches address and data |
| RDY/BUSY | Open-Drain Status Output | Low during write cycle; released high at completion; supports wired-OR of multiple devices |
| NC | No Connect | Pin 11 (SOIC) is unconnected; must be left floating or tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| SRAM-compatible read/write interface | Eliminates need for external address/data latches or timing controllers in 8-bit microprocessor systems |
| DATA polling on I/O7 | Enables software-driven write completion detection without dedicated status lines or interrupts |
| VCC sense write inhibit | Prevents corruption during brown-out or power-up by blocking writes until VCC ≥ 1.8V |
| JEDEC byte-wide pinout | Ensures drop-in compatibility with legacy 28-series parallel EEPROMs and existing PCB footprints |
| Industrial temperature rating | Validated operation from −40°C to +85°C supports deployment in automotive body control modules and industrial PLCs |
Applications
| Smart Meter Firmware Storage | Industrial PLC Configuration Memory |
|---|---|
Use Scenario: Storing tariff tables, calibration coefficients, and firmware update staging in electricity/water meters deployed outdoors. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed asynchronously via 8051 or ARM Cortex-M3 parallel bus during boot and field updates. Use Value: 50 µA standby current extends battery life beyond 10 years; 100,000-cycle endurance accommodates daily firmware patching over 27 years. | Use Scenario: Retaining I/O mapping, PID tuning parameters, and alarm thresholds in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Parallel EEPROM interfaced to FPGA or microcontroller bus for fast, deterministic read access during scan cycle initialization. Use Value: 300 ns access time ensures parameter load completes within first 10 µs of scan cycle; industrial temp rating guarantees reliability in cabinet environments up to 85°C. |
| Medical Device Calibration Data | Automotive Body Control Module NVM |
Use Scenario: Storing sensor offset/gain values and user preferences in portable diagnostic equipment with coin-cell backup. IC Role / Device Role / Timing Role: Low-power nonvolatile memory mapped to microcontroller's external memory space for post-power-up calibration loading. Use Value: 2.7V minimum supply allows operation down to single-cell Li-ion voltage; 10-year data retention meets FDA Class II device archival requirements. | Use Scenario: Holding door lock actuator profiles, mirror position presets, and lighting dimming curves in vehicle BCMs. IC Role / Device Role / Timing Role: Byte-erasable EEPROM directly connected to 8-bit automotive MCU (e.g., Infineon XC800) for runtime configuration access. Use Value: VCC-sense write protection prevents corruption during engine cranking dips; RDY/BUSY signaling simplifies interrupt-driven write handling in safety-critical contexts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECB90N6 | 64 Mbit (8M × 8), 90 ns access, 3.3V-only supply, requires external write enable timing | Higher density and speed but lacks DATA polling and VCC-sense protection; not pin-compatible | Select only when >64K capacity and sub-100 ns timing are required; redesign needed for interface and layout |
| Microchip 28C64B-25I/P | 64 Kbit, 250 ns access, 4.5–5.5V supply, no RDY/BUSY or DATA polling, PDIP-only packaging | Legacy 5V-only part; incompatible voltage domain and missing modern write-detection features | Use only for 5V legacy system repair; not suitable for new 3.3V designs or battery operation |
Compared with ST M28W640ECB90N6 and Microchip 28C64B-25I/P, the AT28BV64-30SI uniquely balances 3.3V operation, robust write-integrity features (VCC sense, RDY/BUSY, DATA polling), industrial temperature support, and JEDEC pin compatibility-making it optimal for new battery-powered and industrial embedded designs requiring proven reliability and minimal interface overhead.
Availability
AT28BV64-30SI is available at Aetrix Electronics and suitable for smart meter firmware storage, industrial PLC configuration memory, and medical device calibration data requiring stable component supply across extended product lifecycles.
Supply support for AT28BV64-30SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for embedded systems.
The AT28BV64 family was designed specifically for low-voltage, battery-operated applications requiring reliable, byte-erasable nonvolatile storage with SRAM-like simplicity and industrial-grade environmental tolerance.
FAQ
What is the maximum operating frequency supported by the AT28BV64-30SI?
The AT28BV64-30SI does not operate at a clock frequency-it is an asynchronous parallel EEPROM. Its 300 ns read access time corresponds to a maximum effective bus toggle rate of approximately 3.3 MHz under ideal conditions. System timing must comply with AC specifications including tCE (300 ns), tOE (150 ns), and tDF (60 ns), and no external clock signal is required for operation.
Does the AT28BV64-30SI support page or block writes?
No, the AT28BV64-30SI supports only byte-level writes. Each write cycle targets a single 8-bit location and takes 3 ms to complete. There is no page write, sector erase, or bulk programming capability. This design prioritizes simplicity and predictability over speed, making it suitable for infrequent parameter updates rather than high-throughput data logging.
Can the AT28BV64-30SI be used in a 5V system?
No, the AT28BV64-30SI is rated exclusively for 2.7V to 3.6V operation. Applying 5V to VCC or any input pin exceeds absolute maximum ratings and will cause permanent damage. For 5V systems, legacy parts like the AT28C64B (5V-only) are required-but they lack the low-power features and write-protection mechanisms of the AT28BV64-30SI.
How is write completion detected on the AT28BV64-30SI?
Write completion on the AT28BV64-30SI can be detected using either hardware or software methods: (1) monitor the open-drain RDY/BUSY pin, which goes high when the 3 ms internal write completes; or (2) perform DATA polling by reading the target address and checking I/O7-when true data appears (not complement), the write is finished. Both methods are fully supported and may be used interchangeably.
Is the AT28BV64-30SI RoHS compliant?
Yes, the AT28BV64-30SI manufactured in SOIC (28S) packaging is RoHS compliant per EU Directive 2011/65/EU. Atmel's official documentation confirms lead-free terminations and halogen-free molding compounds for this variant. Compliance applies to units shipped after October 2006; earlier date codes may require verification against specific lot documentation.
AT28BV64-30SI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- 300 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28BV64-30SI FAQ
1.How can I place an order for AT28BV64-30SI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28BV64-30SI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28BV64-30SI reliable?
The price and inventory of AT28BV64-30SI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28BV64-30SI is usually 5 days.
3.What payment methods are accepted for AT28BV64-30SI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28BV64-30SI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28BV64-30SI?
AT28BV64-30SI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28BV64-30SI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28BV64-30SI?
For technical support, including AT28BV64-30SI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28BV64-30SI requirements.
6.How does Aetrix verify that AT28BV64-30SI is sourced from the original manufacturer or authorized distributors?
All AT28BV64-30SI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28BV64-30SI meets industry standards.
7.What is the process for return or replacement of AT28BV64-30SI?
All AT28BV64-30SI units undergo pre-shipment inspection (PSI). If there is an issue with AT28BV64-30SI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28BV64-30SI part is unused and in its original packaging.
Return procedure for AT28BV64-30SI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28BV64-30SI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

