My Inquiry
My Account
Microchip Technology AT28BV64B-20SU-T
- Part No.:
- AT28BV64B-20SU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28BV64B-20SU-T.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,037
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The AT28BV64B-20SU-T from Microchip Technology (formerly Atmel) is a 64K-bit (8K × 8) parallel EEPROM with battery-voltage operation (2.7V–3.6V), 200 ns read access time, 10 ms maximum page write cycle, hardware/software data protection, and industrial temperature range (−40°C to +85°C). It supports 1–64-byte page writes and is used in embedded systems for firmware storage, configuration retention, and calibration data logging where nonvolatile byte-level rewrite capability is required.
For engineers reviewing the AT28BV64B-20SU-T datasheet, AT28BV64B-20SU-T pinout, AT28BV64B-20SU-T application, or AT28BV64B-20SU-T equivalent, key selection considerations include JEDEC-standard byte-wide parallel interface compatibility, DATA polling and toggle-bit write completion detection, software data protection (SDP) command sequence requirement, and SOIC-28 green packaging with 200 ns timing.
Technical Context
The AT28BV64B-20SU-T operates as a static RAM-compatible parallel EEPROM: reads require CE and OE low with WE high; writes initiate on WE or CE low pulse with OE high. Its internal 64-byte page register latches address and data, enabling burst writes without bus hold.
Write completion is verified via I/O7 DATA polling (complement-to-data during write, true data after completion) or I/O6 toggle-bit behavior. Software Data Protection mandates a three-byte command sequence (0xAA→0x55→0xA0 at addresses 0x1555/0x0AAA/0x1555) before each write operation - no data is written during this sequence.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); supports byte- and page-level erase/write without block erasure. |
| Read Access Time | 200 ns max; enables direct replacement of SRAM in legacy 8-bit microcontroller systems with no wait-state insertion. |
| Page Write Cycle | 10 ms max; allows up to 64 bytes to be committed atomically, reducing host CPU overhead vs. byte-by-byte writes. |
| Supply Voltage | 2.7V–3.6V; compatible with 3.3V logic systems and battery-backed operation without level shifting. |
| Endurance & Retention | 100,000 write cycles / 10-year data retention; validated for long-life industrial control and metering applications. |
| Standby Current | 20 µA typical CMOS standby; minimizes power draw in always-on embedded devices during idle periods. |
| Operating Temperature | −40°C to +85°C; qualified for industrial environments including factory automation and outdoor instrumentation. |
Pinout & Package
AT28BV64B-20SU-T is supplied in a 28-lead, 0.300" wide plastic gull-wing small outline (SOIC) package per JEDEC MS-013, with lead finish RoHS-compliant and halide-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus; selects one of 8,192 memory locations (A12–A0). |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; carries data during read (output) or write (input) cycles. |
| CE | Chip Enable | Active-low chip select; device responds only when CE is low (with OE/WE conditions met). |
| OE | Output Enable | Active-low output control; places I/O pins in high-impedance state when high, preventing bus contention. |
| WE | Write Enable | Active-low write strobe; initiates byte or page write when low with CE low and OE high. |
| GND / VCC | Power Terminals | Ground reference and 2.7–3.6V supply; decoupling capacitor required near VCC pin for noise immunity. |
| NC | No Connect | Pins 1 and 17 are unconnected; must remain floating - no external connection permitted. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-wide Pinout | Direct drop-in compatibility with industry-standard 28-pin parallel EEPROM sockets and legacy SRAM-based designs. |
| Software Data Protection (SDP) | Three-step unlock sequence prevents accidental writes during power-up/down or EMI events - no external hardware lock needed. |
| DATA Polling & Toggle Bit | Dual asynchronous write-complete detection (I/O7 complement, I/O6 toggle) eliminates need for fixed delay timers in host firmware. |
| 64-byte Page Register | Reduces host-side write transaction count by up to 64× versus byte writes, improving system throughput and reducing bus arbitration overhead. |
| Device Identification Area | 64 extra bytes accessible via A9 = 12V; usable for unique serialization, calibration coefficients, or manufacturing traceability. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers that power-cycle frequently. IC Role / Device Role / Timing Role: Nonvolatile configuration register providing immediate parameter availability at boot without host reinitialization. Use Value: Eliminates reliance on backup batteries or supercapacitors while ensuring deterministic 200 ns read latency for real-time control loops. |
Use Scenario: Retaining sensor calibration offsets, patient-specific therapy settings, and usage logs in portable diagnostic equipment. IC Role / Device Role / Timing Role: Secure, tamper-resistant data vault with SDP-enforced write gating to prevent corruption during brown-out conditions. Use Value: Meets IEC 62304 Class B software safety requirements through deterministic 100,000-cycle endurance and 10-year retention under thermal stress. |
| Telecom Line Card Firmware | Automotive Body Control Module (BCM) |
Use Scenario: Holding field-upgradable boot code and protocol stack parameters in carrier-grade DSLAM line cards operating 24/7. IC Role / Device Role / Timing Role: Parallel EEPROM acting as primary firmware store interfaced directly to 8-bit microcontroller address/data bus. Use Value: Enables in-system programming via JTAG or UART without requiring external programmer hardware or PCB redesign. |
Use Scenario: Storing seat position memory, mirror presets, and lighting profiles in automotive BCMs exposed to −40°C cold cranking and 85°C under-hood heat. IC Role / Device Role / Timing Role: Industrial-temperature-rated nonvolatile memory supporting CAN bus-initiated parameter updates during vehicle runtime. Use Value: Guarantees reliable operation across full automotive ambient range with <20 µA standby current to meet ISO 16750-2 quiescent power limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Microchip AT28C64B-15PU | 5V-only supply (4.5–5.5V); 150 ns access; no software data protection; 28-pin PDIP package. | Requires 5V rail; lacks SDP and low-voltage operation; suited for legacy 5V industrial boards only. | Select only if system uses 5V logic and cannot accommodate voltage translation or SDP workflow. |
| ON Semiconductor CAT28C64B-20LE | 2.7–5.5V supply; 200 ns access; hardware-only protection (WP pin); 28-pin SOIC package. | Supports wider voltage range but lacks software data protection; WP pin requires external pull-up control. | Choose when design needs dual-voltage flexibility and prefers hardware write-protection over command-based security. |
Compared with AT28C64B-15PU and CAT28C64B-20LE, the AT28BV64B-20SU-T uniquely combines 2.7–3.6V operation, integrated software data protection, and JEDEC-standard SOIC-28 footprint - making it optimal for new 3.3V embedded designs requiring robust, battery-voltage nonvolatile storage without external protection circuitry.
Availability
AT28BV64B-20SU-T is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, and telecom line cards requiring stable component supply, long-term lifecycle support, and RoHS-compliant green packaging.
Supply support for AT28BV64B-20SU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and qualification for the AT28BV64B family. The company specializes in microcontrollers, analog, and memory solutions for industrial, automotive, and consumer markets.
The AT28BV64B series was designed as a drop-in upgrade path for legacy 5V EEPROMs in 3.3V systems, delivering battery-voltage operation, enhanced data integrity features, and industrial temperature reliability without sacrificing parallel interface simplicity.
FAQ
What is the required software data protection (SDP) sequence for AT28BV64B-20SU-T?
The AT28BV64B-20SU-T requires a precise three-byte unlock sequence before any write: write 0xAA to address 0x1555, then 0x55 to address 0x0AAA, then 0xA0 to address 0x1555. This sequence must be repeated before every byte or page write operation. The AT28BV64B-20SU-T ignores data written during the unlock phase - only subsequent writes are committed to memory.
Does AT28BV64B-20SU-T support true 3.3V-only operation without 5V or 12V rails?
Yes, the AT28BV64B-20SU-T operates fully within 2.7V–3.6V and requires no auxiliary voltages for normal read/write functions. The 12V on A9 is strictly optional and only needed for accessing the 64-byte device identification area - standard memory operations use only VCC, GND, and logic-level signals. The AT28BV64B-20SU-T is certified for industrial temperature range under these conditions.
How does write completion detection work on AT28BV64B-20SU-T?
The AT28BV64B-20SU-T provides two independent methods: DATA polling monitors I/O7 - it outputs the complement of the last written byte until completion, then true data. Toggle bit monitors I/O6 - it toggles between 0 and 1 during write, then stabilizes to valid data. Both methods allow the host to poll asynchronously without fixed delays. The AT28BV64B-20SU-T guarantees detection within the 10 ms max write cycle time.
Can AT28BV64B-20SU-T replace a standard SRAM in an existing design?
Yes - the AT28BV64B-20SU-T uses identical JEDEC byte-wide pinout and behaves like SRAM during reads (CE/OE low, WE high). However, writes require the SDP unlock sequence and generate longer write cycles (10 ms page vs. nanosecond SRAM writes). The AT28BV64B-20SU-T is ideal for replacing SRAM where nonvolatility is added without board layout changes, provided firmware handles write sequencing.
What is the purpose of the NC pins on AT28BV64B-20SU-T?
Pins 1 and 17 on the AT28BV64B-20SU-T SOIC package are designated No Connect (NC) and must remain unconnected - they serve no internal function and are not bonded. Connecting them risks latch-up or undefined behavior. The AT28BV64B-20SU-T datasheet explicitly prohibits routing traces or applying voltage to these pins, and they are excluded from all timing and electrical specifications.
AT28BV64B-20SU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28BV64B-20SU-T FAQ
1.How can I place an order for AT28BV64B-20SU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28BV64B-20SU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28BV64B-20SU-T reliable?
The price and inventory of AT28BV64B-20SU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28BV64B-20SU-T is usually 5 days.
3.What payment methods are accepted for AT28BV64B-20SU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28BV64B-20SU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28BV64B-20SU-T?
AT28BV64B-20SU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28BV64B-20SU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28BV64B-20SU-T?
For technical support, including AT28BV64B-20SU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28BV64B-20SU-T requirements.
6.How does Aetrix verify that AT28BV64B-20SU-T is sourced from the original manufacturer or authorized distributors?
All AT28BV64B-20SU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28BV64B-20SU-T meets industry standards.
7.What is the process for return or replacement of AT28BV64B-20SU-T?
All AT28BV64B-20SU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28BV64B-20SU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28BV64B-20SU-T part is unused and in its original packaging.
Return procedure for AT28BV64B-20SU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28BV64B-20SU-T Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
