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Microchip Technology AT28BV64B-20TU-T
- Part No.:
- AT28BV64B-20TU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28BV64B-20TU-T.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,327
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Product details
Overview
AT28BV64B-20TU-T from Microchip Technology (formerly Atmel) is a 64K-bit (8K × 8) parallel EEPROM with battery-voltage operation (2.7V–3.6V), 200 ns read access time, 10 ms maximum page write cycle, hardware/software data protection, and industrial temperature range (−40°C to +85°C). It supports 1–64 byte page writes and is used in embedded systems requiring nonvolatile storage for configuration, calibration, or firmware patch retention.
For engineers reviewing the AT28BV64B-20TU-T datasheet, AT28BV64B-20TU-T pinout, AT28BV64B-20TU-T application, or AT28BV64B-20TU-T equivalent, key selection criteria include JEDEC byte-wide pin compatibility, DATA polling/toggle bit write completion detection, software data protection (SDP) command sequence requirement, and TSOP-28 packaging for space-constrained PCB layouts.
Technical Context
The AT28BV64B-20TU-T implements a static RAM-compatible interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance in multi-device systems. Its internal 64-byte page register latches addresses and data during write cycles, freeing the address/data bus for concurrent operations.
Write operations require a three-byte software data protection (SDP) command sequence (0xAA → 0x55 → 0xA0) before each byte or page write. End-of-write detection is supported via DATA polling on I/O7 (complement-to-data) or toggle-bit behavior on I/O6, both usable at any point during the internal 10 ms programming period.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for storing device configuration tables or small firmware patches in resource-limited microcontrollers. |
| Read Access Time | 200 ns max; enables direct replacement of SRAM in legacy designs without timing redesign. |
| Page Write Cycle | 10 ms max; allows efficient bulk updates of up to 64 bytes per internal programming operation. |
| Supply Voltage | 2.7V–3.6V; compatible with 3.3V logic systems and eliminates need for separate 5V supply rails. |
| Standby Current | 20 µA typical; reduces power consumption in always-on industrial monitoring nodes. |
| Data Retention | 10 years minimum; ensures long-term reliability in unattended equipment like utility meters or remote sensors. |
| Endurance | 100,000 write/erase cycles; supports frequent field-updatable parameters in test instrumentation or programmable logic controllers. |
Pinout & Package
AT28BV64B-20TU-T is housed in a 28-lead Plastic Thin Small Outline Package (TSOP, Type I, 8 mm × 13.4 mm), compliant with JEDEC MO-183. Pin 1 is marked by a beveled corner; pins 14 and 28 are GND and VCC respectively. The package features gull-wing leads with 0.55 mm pitch and 0.10 mm max coplanarity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; A6–A12 define page boundaries for 64-byte page writes. |
| I/O0–I/O7 | Bidirectional Data Bus | Byte-wide parallel interface; I/O7 provides DATA polling feedback, I/O6 delivers toggle-bit status during writes. |
| CE | Chip Enable | Active-low global select; must be low with OE low and WE high for read access; initiates write when pulsed low with OE high. |
| OE | Output Enable | Active-low output control; high during write operations to place outputs in high-impedance state and prevent bus conflicts. |
| WE | Write Enable | Active-low write strobe; falling edge latches address; rising edge latches data; controls SDP command entry and page write sequencing. |
| GND / VCC | Power Terminals | Pin 14 = GND, Pin 28 = VCC; decoupling capacitor placement near these pins is critical for stable 200 ns read timing and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-wide Pinout | Direct drop-in replacement for industry-standard 28-pin parallel EEPROMs and EPROMs in existing PCB layouts. |
| Software Data Protection (SDP) | Three-byte unlock sequence (0xAA/0x55/0xA0) prevents accidental writes during power transitions or firmware glitches. |
| DATA Polling & Toggle Bit | Dual asynchronous write-completion detection methods eliminate need for fixed delay timers in host firmware. |
| 64-byte Page Register | Enables burst programming of configuration blocks without repeated address setup, reducing host CPU overhead. |
| Industrial Temperature Range | −40°C to +85°C operation validated across full voltage and timing specs, suitable for factory automation and outdoor electronics. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
|
Use Scenario: Storing sensor calibration coefficients and operational thresholds in programmable logic controllers deployed in manufacturing lines. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during boot and runtime parameter updates via parallel bus. Use Value: 100,000-cycle endurance supports daily recalibration; 200 ns read speed enables real-time parameter lookup without interrupt latency. |
Use Scenario: Retaining patient-specific calibration settings and safety-critical device parameters in portable diagnostic instruments. IC Role / Device Role / Timing Role: Secure, tamper-resistant data vault using SDP to prevent unauthorized firmware or calibration modification. Use Value: 10-year data retention ensures long-term accuracy without battery backup; green Pb/halide-free packaging meets medical RoHS requirements. |
| Telecom Line Card Firmware Patching | Automated Test Equipment (ATE) Setup Profiles |
|
Use Scenario: Hosting hot-fix patches for FPGA configuration bitstreams or microcontroller firmware in carrier-grade line cards. IC Role / Device Role / Timing Role: Field-upgradable code repository accessed over shared system bus during maintenance windows. Use Value: Page write capability allows atomic 64-byte patch updates; DATA polling enables deterministic host synchronization without timeout guesswork. |
Use Scenario: Storing test fixture-specific timing offsets, probe compensation values, and DUT-specific test sequences in benchtop ATE systems. IC Role / Device Role / Timing Role: High-reliability parameter store interfaced directly to test controller's parallel address/data bus. Use Value: Low 20 µA standby current minimizes thermal drift in precision analog test environments; JEDEC pinout simplifies board-level repair. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT | 64 Mbit (8M × 8), 120 ns access, 3.3V-only, no software data protection; requires external hardware write protect. | Larger density but lacks SDP; unsuitable where firmware update security is required. | Select only if higher capacity and faster access outweigh absence of built-in write protection. |
| ON Semiconductor CAT28C64B | 64 Kbit, 250 ns access, 5V operation only, no page write mode; supports only byte writes. | Incompatible voltage domain; slower timing; no burst programming capability. | Consider only for legacy 5V systems where TSOP-28 footprint and 200 ns timing are not mandatory. |
Compared with ST M28W640ECT and CAT28C64B, the AT28BV64B-20TU-T uniquely combines 3.3V operation, 200 ns speed, 64-byte page writes, and mandatory SDP - making it the only option among the three that satisfies simultaneous requirements for low-voltage compatibility, fast read performance, efficient bulk updates, and secure write control in modern industrial designs.
Availability
AT28BV64B-20TU-T is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, telecom infrastructure, and automated test equipment requiring stable component supply and long-term obsolescence management.
Supply support for AT28BV64B-20TU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT28BV64B family.
The AT28BV64B series was designed as a drop-in upgrade path for legacy 5V parallel EEPROMs, delivering battery-voltage operation, enhanced data protection, and industrial-grade reliability for embedded control and instrumentation applications.
FAQ
What is the required software data protection (SDP) sequence for AT28BV64B-20TU-T?
The AT28BV64B-20TU-T mandates a three-byte unlock sequence before every write operation: first write 0xAA to address 0x5555, then write 0x55 to address 0x2AAA, then write 0xA0 to address 0x5555. This SDP sequence must be repeated prior to each byte or page write; omission results in ignored data while the internal timer still consumes tWC (10 ms).
Does AT28BV64B-20TU-T support true 3.3V-only operation without 5V tolerance?
Yes, AT28BV64B-20TU-T operates exclusively within 2.7V–3.6V and is not 5V-tolerant. All inputs (including CE, OE, WE, and address/data lines) must remain within VCC + 0.6V, meaning they must be driven by 3.3V logic. Applying 5V signals will exceed absolute maximum ratings and may damage the device.
How does the page write function work in AT28BV64B-20TU-T?
The AT28BV64B-20TU-T supports 1–64 byte page writes within the same 128-byte physical page (defined by A6–A12). After the SDP sequence, the first byte write latches the starting address; subsequent bytes must be written within 100 µs (tBLC) and reside on the same page. A0–A5 select which bytes within the page are updated - unused bytes retain prior data.
Can AT28BV64B-20TU-T be used in place of a standard 28-pin SOIC EEPROM?
No - AT28BV64B-20TU-T uses a 28-lead TSOP package (28T), not SOIC (28S). While pin functions match JEDEC byte-wide definitions, the TSOP's 8 mm × 13.4 mm footprint, gull-wing lead geometry, and 0.55 mm pitch are mechanically incompatible with SOIC sockets or land patterns. Use AT28BV64B-20SU for SOIC-28 compatibility.
What is the purpose of the extra 64 bytes of EEPROM in AT28BV64B-20TU-T?
The AT28BV64B-20TU-T includes 64 dedicated bytes (addresses 0x0000–0x003F) accessible only when A9 is raised to 12.0V ± 0.5V. These bytes serve as a secure device identification area for serialization, calibration traceability, or manufacturer-specific metadata - isolated from normal read/write operations to prevent accidental overwrite.
AT28BV64B-20TU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28BV64B-20TU-T FAQ
1.How can I place an order for AT28BV64B-20TU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28BV64B-20TU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28BV64B-20TU-T reliable?
The price and inventory of AT28BV64B-20TU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28BV64B-20TU-T is usually 5 days.
3.What payment methods are accepted for AT28BV64B-20TU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28BV64B-20TU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28BV64B-20TU-T?
AT28BV64B-20TU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28BV64B-20TU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28BV64B-20TU-T?
For technical support, including AT28BV64B-20TU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28BV64B-20TU-T requirements.
6.How does Aetrix verify that AT28BV64B-20TU-T is sourced from the original manufacturer or authorized distributors?
All AT28BV64B-20TU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28BV64B-20TU-T meets industry standards.
7.What is the process for return or replacement of AT28BV64B-20TU-T?
All AT28BV64B-20TU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28BV64B-20TU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28BV64B-20TU-T part is unused and in its original packaging.
Return procedure for AT28BV64B-20TU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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