Microchip Technology AT28C010-12PC
- Part No.:
- AT28C010-12PC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-DIP (0.600", 15.24mm)
- Datasheet:
-
AT28C010-12PC.pdf
- Description:
- IC EEPROM 1MBIT PARALLEL 32DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,369
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Product details
Overview
AT28C010-12PC from Atmel is a 1-Mbit (128K × 8) paged parallel EEPROM with JEDEC-standard byte-wide pinout, 120 ns read access time, 10 ms maximum page write cycle, and single 5V ±10% supply operation. It supports hardware/software data protection, DATA polling, and toggle-bit write completion detection for embedded firmware storage in industrial control and instrumentation systems.
For engineers reviewing the AT28C010-12PC datasheet, AT28C010-12PC pinout, AT28C010-12PC application, or AT28C010-12PC equivalent, key selection considerations include its 128-byte page register architecture, CMOS/TTL-compatible I/O, VCC-sense write inhibit, and industrial temperature range support (-40°C to +85°C).
Technical Context
The AT28C010-12PC operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on WE or CE falling edge with OE high. Its internal 128-byte page register latches address and data simultaneously, freeing the bus during autonomous internal programming timed by an on-chip control timer.
Write completion is verified via DATA polling (I/O7 complement-to-data behavior) or toggle-bit detection (I/O6 toggling), both usable at any point during tWC. Hardware protection includes VCC sense (<3.8V inhibition), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE state-based write inhibit logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 Mbit (131,072 × 8), enabling firmware image or configuration storage without external address multiplexing |
| Read Access Time | 120 ns max - supports direct interface with 8-MHz microcontrollers without wait states |
| Page Write Cycle | 10 ms max for 1–128 bytes - reduces system latency vs. byte-by-byte programming |
| Supply Voltage | 5V ±10% - compatible with legacy 5V logic families and eliminates need for auxiliary voltage rails |
| Active Current | 40 mA max - enables use in power-constrained industrial modules with thermal budget ≤220 mW |
| Standby Current | 200 µA CMOS - suitable for battery-backed applications requiring multi-year retention |
| Data Retention | 10 years minimum - ensures long-term reliability in unattended equipment like remote sensors |
| Endurance | 10,000 write cycles (standard version) - sufficient for infrequent field-upgrade scenarios |
Pinout & Package
AT28C010-12PC uses a 32-lead PDIP (32P6) package with 0.600" width, JEDEC MS-011 compliant footprint, and through-hole mounting. Pin 1 is index-marked; pins 17 and 32 are GND and VCC respectively.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 128K-word addressing; A7–A16 define page boundaries for 128-byte writes |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit data path; I/O7 used for DATA polling, I/O6 for toggle-bit detection |
| CE | Chip Enable | Active-low chip select; must be low for read/write; high disables outputs and inhibits writes |
| OE | Output Enable | Active-low output control; high places I/O pins in high-impedance state to prevent bus contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; combined with CE for dual-control write safety |
| NC | No Connect | Pins 1, 3, 4, 30, 31 - electrically isolated; no routing or grounding required |
Key Features
| Feature | Design Value |
|---|---|
| Automatic Page Write | 128-byte internal latching eliminates host CPU overhead during multi-byte writes and enables background bus release |
| DATA Polling & Toggle Bit | Dual asynchronous write-completion detection methods eliminate fixed-delay polling loops and reduce firmware complexity |
| VCC Sense Protection | Hardware-enforced write disable below 3.8V prevents corruption during brown-out or power ramp-up conditions |
| Software Data Protection (SDP) | User-configurable 3-byte command sequence (AAh/55h/A0h) enables selective lock/unlock of entire memory array |
| Device Identification Area | Dedicated 128-byte EEPROM region (1FF80H–1FFFFH) accessible via 12V A9 bias for unique device serialization |
Applications
| Industrial PLC Firmware Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing firmware update images and boot code in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile program memory providing SRAM-like read interface and deterministic 120 ns access for real-time instruction fetch. Use Value: Enables field-upgradable firmware without external programming hardware; 10-year data retention ensures reliability across maintenance cycles. |
Use Scenario: Holding calibrated sensor offsets and gain coefficients in portable diagnostic equipment subject to regulatory audit. IC Role / Device Role / Timing Role: Secure configuration memory with hardware write-inhibit and software protection preventing accidental parameter overwrite. Use Value: Meets IEC 62304 traceability requirements via dedicated 128-byte ID area for device serialization and calibration timestamping. |
| Telecom Line Card Bootloader | Automotive Body Control Module |
Use Scenario: Hosting bootloader code and fail-safe recovery routines in carrier-grade telecom line cards operating continuously for >10 years. IC Role / Device Role / Timing Role: High-reliability boot memory with 10,000-cycle endurance and -40°C to +85°C industrial temperature rating. Use Value: Eliminates need for external UV-erasable EPROM sockets; 200 µA standby current extends uptime during power-loss events. |
Use Scenario: Storing vehicle-specific configuration tables (e.g., door lock timing, mirror position presets) in body control units. IC Role / Device Role / Timing Role: Parameter memory interfaced directly to 8-bit microcontrollers via standard parallel bus with no glue logic. Use Value: JEDEC byte-wide pinout ensures PCB compatibility with legacy designs; 5V tolerance simplifies integration with automotive 5V power domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C010-12JI | Same die and timing, but PLCC (32J) package and industrial temperature range (-40°C to +85°C) | Required for surface-mount assembly or extended thermal environments where PDIP is unsuitable | Select AT28C010-12JI when board space constraints or reflow soldering mandates PLCC packaging |
| AT28C010E-12PC | Same PDIP package and speed grade, but enhanced endurance (100,000 cycles vs. 10,000) | Suitable for applications requiring frequent field updates (e.g., IoT gateway firmware patching) | Choose AT28C010E-12PC only if write-cycle count exceeds 10K over product lifetime |
Compared with AT28C010-12PC, the AT28C010-12JI offers identical electrical performance in a surface-mount package for automated assembly, while AT28C010E-12PC trades higher cost for 10× endurance-neither is pin-compatible without layout revision due to differing package footprints or internal feature enablement.
Availability
AT28C010-12PC is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, and telecom infrastructure requiring stable component supply with guaranteed long-term availability and consistent parametric performance.
Supply support for AT28C010-12PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial and embedded markets.
The AT28C010 product line was designed as a pin-compatible, SRAM-drop-in replacement EEPROM targeting legacy 5V systems needing field-upgradable firmware storage without redesigning memory interfaces.
FAQ
What is the maximum page write size supported by the AT28C010-12PC?
The AT28C010-12PC supports up to 128 bytes per page write operation. This is enabled by its internal 128-byte page register, which latches address and data simultaneously during the initial write strobe. All bytes written within a single page write must reside on the same 128-byte boundary defined by address bits A7–A16, and successive bytes must be loaded within 150 µs of each other to maintain page mode operation.
Does the AT28C010-12PC require a 12V programming voltage?
No, the AT28C010-12PC operates exclusively from a single 5V ±10% supply for all read, write, and erase operations. The 12V requirement applies only to the optional device identification area (1FF80H–1FFFFH), which is separate from main memory and accessed by raising A9 to 12V ±0.5V - standard firmware storage uses only 5V.
How does hardware write protection work on the AT28C010-12PC?
Hardware protection on the AT28C010-12PC includes four mechanisms: (1) VCC sense disabling writes below 3.8V, (2) automatic 5 ms power-on delay before write enable, (3) write inhibition when CE is high, OE is low, or WE is high, and (4) noise filtering rejecting input pulses under 15 ns. These operate independently of software settings and ensure robustness during power transients.
Can the AT28C010-12PC be used as a direct replacement for SRAM in existing designs?
Yes, the AT28C010-12PC is designed for SRAM-compatible read operation: when CE and OE are low and WE is high, it behaves identically to a static RAM with 120 ns access time. However, write cycles require proper WE/CE timing and write-completion detection (DATA polling or toggle bit), so existing SRAM write logic must be modified to accommodate EEPROM timing.
What is the difference between AT28C010-12PC and AT28C010-12JC?
The AT28C010-12PC uses a 32-lead PDIP (32P6) package with 0.600" width, while AT28C010-12JC uses a 32-lead PLCC (32J) package. Both share identical electrical specifications, timing (120 ns access), and temperature range (commercial 0°C to 70°C), but differ in mounting method (through-hole vs. surface-mount), footprint, and thermal characteristics - they are not mechanically interchangeable without PCB redesign.
AT28C010-12PC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 32-PDIP
AT28C010-12PC FAQ
1.How can I place an order for AT28C010-12PC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C010-12PC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C010-12PC reliable?
The price and inventory of AT28C010-12PC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C010-12PC is usually 5 days.
3.What payment methods are accepted for AT28C010-12PC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C010-12PC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C010-12PC?
AT28C010-12PC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C010-12PC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C010-12PC?
For technical support, including AT28C010-12PC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C010-12PC requirements.
6.How does Aetrix verify that AT28C010-12PC is sourced from the original manufacturer or authorized distributors?
All AT28C010-12PC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C010-12PC meets industry standards.
7.What is the process for return or replacement of AT28C010-12PC?
All AT28C010-12PC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C010-12PC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C010-12PC part is unused and in its original packaging.
Return procedure for AT28C010-12PC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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