Microchip Technology AT28C010-15TI
- Part No.:
- AT28C010-15TI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT28C010-15TI.pdf
- Description:
- IC EEPROM 1MBIT PARALLEL 32TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT28C010-15TI from Atmel is a 1-Mbit (128K × 8) paged parallel EEPROM with JEDEC-standard byte-wide pinout, 150 ns read access time, 10 ms maximum page write cycle, and CMOS/TTL-compatible I/O. It operates on single 5V ±10% supply and supports industrial temperature range (–40°C to +85°C), enabling use in embedded control firmware storage and configuration memory for industrial PLCs.
For engineers reviewing the AT28C010-15TI datasheet, AT28C010-15TI pinout, AT28C010-15TI application, or AT28C010-15TI equivalent, key selection criteria include verified page-write endurance (10⁴ cycles), DATA polling and TOGGLE BIT write completion detection, hardware/software data protection, and PLCC-32 package compatibility with legacy board layouts.
Technical Context
The AT28C010-15TI implements a paged architecture with a 128-byte internal page register, allowing up to 128 bytes to be latched and written in a single internal programming period. Address latching occurs on the falling edge of CE or WE, and data latching on the first rising edge of either control signal.
Write completion is confirmed via DATA polling (I/O7 complement behavior) or TOGGLE BIT (I/O6 toggling), both operable at any point during the write cycle. Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE state-based write inhibition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 Mbit (131,072 × 8), supporting full firmware image or parameter table storage without external expansion |
| Read Access Time | 150 ns max - enables direct replacement of SRAM in legacy 8-bit microcontroller systems |
| Page Write Cycle | 10 ms max - allows burst configuration updates with minimal system stall time |
| Endurance | 10,000 write/erase cycles - validated for field-updatable calibration data in industrial sensors |
| Data Retention | 10 years at +85°C - ensures long-term reliability in unattended equipment |
| Supply Voltage | 5 V ±10% - compatible with standard TTL/CMOS logic rails without regulation overhead |
| Operating Temperature | –40°C to +85°C - qualified for industrial automation and motor drive control environments |
Pinout & Package
AT28C010-15TI is packaged in a 32-lead Plastic J-leaded Chip Carrier (PLCC), JEDEC MS-016 AE compliant, with pin 1 marked and designated as "Don't Connect" (DC). The package is lead-free compatible and designed for surface-mount reflow assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 128K-word addressing; A7–A16 define page boundaries for 128-byte writes |
| I/O0–I/O7 | Bidirectional Data Bus | Byte-wide data path; I/O7 used for DATA polling, I/O6 for TOGGLE BIT status indication |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; write inhibited if high |
| OE | Output Enable | Active-low output control; high-Z when high, enabling bus sharing without external transceivers |
| WE | Write Enable | Active-low write strobe; falling edge latches address; rising edge latches data in byte/page mode |
| NC / DC | No Connect / Don't Connect | Pin 1 (PLCC) is DC per datasheet; other NC pins must remain unconnected to avoid latch-up or timing violation |
| VCC, GND | Power Supply | Single 5V supply with <200 µA CMOS standby current - reduces system power budget in sleep modes |
Key Features
| Feature | Design Value |
|---|---|
| Automatic Page Write | 128-byte internal latching eliminates host CPU wait states during multi-byte writes |
| DATA Polling & TOGGLE BIT | Dual asynchronous write-complete detection avoids fixed timeout delays and improves real-time responsiveness |
| Hardware + Software Data Protection | VCC-sense, noise filtering, and 3-byte SDP command prevent corruption during brown-out or EMI events |
| JEDEC Byte-wide Pinout | Direct drop-in replacement for industry-standard EPROMs and SRAMs in existing PCB footprints |
| Industrial Temperature Range | Validated operation from –40°C to +85°C supports deployment in harsh factory-floor environments |
Applications
| Industrial PLC Configuration Storage | Embedded Firmware Bootloader Memory |
|---|---|
Use Scenario: Storing user-configurable I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during startup and runtime via parallel bus; 150 ns read latency meets deterministic scan-cycle timing. Use Value: Enables field-upgradable settings without firmware reflashing; 10⁴ endurance supports daily parameter adjustments over 10+ years. |
Use Scenario: Holding boot code and secure bootloader images for microcontrollers in medical diagnostic devices. IC Role / Device Role / Timing Role: Primary boot memory mapped into CPU address space; JEDEC pinout allows reuse of legacy SRAM layout. Use Value: Single 5V supply simplifies power design; hardware write protection prevents accidental overwrite during power transitions. |
| Motor Drive Calibration Data Storage | Network Node Identity & Settings |
Use Scenario: Retaining factory-calibrated motor phase offsets, current limits, and thermal compensation curves across power cycles. IC Role / Device Role / Timing Role: Dedicated EEPROM partition accessed only during initialization; page write minimizes update time during recalibration. Use Value: 10-year data retention ensures accuracy over product lifetime; software data protection prevents unauthorized tampering. |
Use Scenario: Storing MAC address, node ID, and communication protocol settings in industrial Ethernet I/O modules. IC Role / Device Role / Timing Role: Configuration memory initialized once at manufacturing and rarely modified; accessed via parallel interface during network stack bring-up. Use Value: PLCC-32 package fits constrained board areas; 200 µA standby current extends battery backup duration in fail-safe modes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C010-15PI | Same die and timing specs; uses 32-lead PDIP (32P6) instead of PLCC (32J) | Through-hole mounting required; incompatible with surface-mount PLCC footprint | Select only if legacy through-hole assembly is mandated and board redesign is not feasible |
| AT28C010-15TC | Same die and timing specs; uses 32-lead TSOP (32T) package with 0.5 mm pitch | Smaller footprint and lower profile; requires fine-pitch reflow process and different pad layout | Choose for space-constrained designs where height and area are critical, and TSOP assembly capability exists |
Compared with AT28C010-15TI, the AT28C010-15PI offers identical electrical performance but demands through-hole assembly and board-level mechanical redesign, while the AT28C010-15TC provides identical functionality in a smaller surface-mount package requiring updated stencil and placement tooling - neither is pin-compatible with the PLCC variant.
Availability
AT28C010-15TI is available at Aetrix Electronics and suitable for industrial automation, embedded firmware storage, and motor control applications requiring stable component supply, long-lifecycle support, and guaranteed availability of legacy PLCC-packaged EEPROMs.
Supply support for AT28C010-15TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer applications.
The AT28C010 product line was designed as a high-reliability, paged parallel EEPROM family targeting firmware storage, configuration memory, and calibration data retention in resource-constrained embedded systems with legacy parallel bus interfaces.
FAQ
What is the maximum page write size supported by the AT28C010-15TI?
The AT28C010-15TI supports a maximum page write size of 128 bytes. This is enabled by its internal 128-byte page register, which latches address and data simultaneously. Each byte in a page write must be loaded within 150 µs of the previous one (tBLC), and all addresses must reside on the same page defined by A7–A16. The AT28C010-15TI does not support partial-page or cross-page writes in a single operation.
Does the AT28C010-15TI require a 12V programming voltage?
No, the AT28C010-15TI operates exclusively from a single 5V ±10% supply for both read and write operations. A 12V supply is required only for optional device identification memory (128 bytes at 1FF80H–1FFFFH), which is separate from main array programming. Standard byte and page writes for the AT28C010-15TI use only 5V - no high-voltage pump or external charge circuitry is needed.
How is write completion detected on the AT28C010-15TI?
The AT28C010-15TI provides two independent, asynchronous methods: DATA polling (monitoring I/O7 for complement-to-data behavior) and TOGGLE BIT (observing I/O6 toggling until it stabilizes). Both methods can be initiated at any time during the write cycle and eliminate the need for fixed timeout waits. For the AT28C010-15TI, these mechanisms are fully functional across its industrial temperature range and require no additional hardware.
Is software data protection (SDP) enabled by default on the AT28C010-15TI?
No, the AT28C010-15TI ships with software data protection disabled. SDP must be explicitly enabled by issuing a three-byte command sequence (AAh to 5555h, 55h to 2AAAh, A0h to 5555h). Once enabled, all subsequent writes require repeating this sequence before data. Power cycling does not disable SDP - it remains active until the dedicated disable command (80h/5555h → 55h/2AAAh → 20h/5555h) is executed on the AT28C010-15TI.
What package type is used for the AT28C010-15TI?
The AT28C010-15TI uses a 32-lead Plastic J-leaded Chip Carrier (PLCC), designated as package code "32J" per Atmel's ordering guide. Pin 1 is marked and defined as "Don't Connect" (DC). This surface-mount package complies with JEDEC standard MS-016 AE and is distinct from the PDIP (32P6) and TSOP (32T) variants offered for the same AT28C010-15 speed grade.
AT28C010-15TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 150 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT28C010-15TI FAQ
1.How can I place an order for AT28C010-15TI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C010-15TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C010-15TI reliable?
The price and inventory of AT28C010-15TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C010-15TI is usually 5 days.
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AT28C010-15TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C010-15TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C010-15TI?
For technical support, including AT28C010-15TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C010-15TI requirements.
6.How does Aetrix verify that AT28C010-15TI is sourced from the original manufacturer or authorized distributors?
All AT28C010-15TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C010-15TI meets industry standards.
7.What is the process for return or replacement of AT28C010-15TI?
All AT28C010-15TI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C010-15TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C010-15TI part is unused and in its original packaging.
Return procedure for AT28C010-15TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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