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Microchip Technology AT28C010-20EM/883
- Part No.:
- AT28C010-20EM/883
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-CLCC
- Datasheet:
-
AT28C010-20EM/883.pdf
- Description:
- IC EEPROM 1MBIT PARALLEL 32LCC
- Quantity:
- Payment:
- Shipping:
Inventory:2,644
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Product details
Overview
AT28C010-20EM/883 from Microchip Technology is a military-grade 1-Mbit (131,072 × 8) paged parallel EEPROM with 200 ns read access time, single 5V ±10% supply operation, and JEDEC-approved byte-wide pinout. It supports 1–128-byte page writes with 10 ms max cycle time and delivers 300 µA CMOS standby current. Used in avionics control modules for nonvolatile configuration storage requiring radiation-tolerant, long-retention memory.
For engineers reviewing the AT28C010-20EM/883 datasheet, AT28C010-20EM/883 pinout, AT28C010-20EM/883 application, or AT28C010-20EM/883 equivalent, this page provides verified military-spec electrical parameters, MIL-STD-883 Class B packaging details, page write timing constraints, hardware/software data protection implementation, and direct alternatives for high-reliability embedded systems.
Technical Context
The AT28C010-20EM/883 implements a paged architecture with a 128-byte internal latch, enabling burst writes without bus hold. Its dual-line chip enable (CE) and output enable (OE) control allows precise bus contention management in multiprocessor backplanes.
It integrates VCC sense circuitry (write inhibit below 3.8 V), 5 ms power-on delay, noise filtering on WE/CE inputs (<15 ns pulse rejection), and optional software data protection via three-byte command sequences to A5555H/A2AAAH addresses - all validated under MIL-STD-883 test conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 131,072 × 8 bits (1 Mbit); enables full system boot code or FPGA configuration storage in single device |
| Read Access Time | 200 ns maximum; meets timing budget for 5 MHz synchronous bus interfaces in MIL-STD-1553 subsystems |
| Page Write Cycle | ≤10 ms; reduces firmware update latency vs. byte-write-only EEPROMs in field-programmable logic controllers |
| Standby Current | 300 µA at CMOS levels; supports low-power dormant modes in battery-backed telemetry recorders |
| Endurance | 10,000 write/erase cycles; sufficient for mission-critical parameter logging over 15-year service life |
| Data Retention | 10 years at +125°C; qualified for extended deployment in engine-mounted sensor nodes |
| Operating Temp | −55°C to +125°C case temperature; compliant with MIL-PRF-38535 Class B screening requirements |
Pinout & Package
AT28C010-20EM/883 is packaged in a 32-lead CLCC (Ceramic Leadless Chip Carrier) per MIL-STD-1835 C-12, marked "AT28C010-20EM/883" with military date code YQyywwl and CAGE code 0HSW3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus; A7–A16 define 128-byte page boundaries for atomic writes |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit interface; I/O7 used for DATA Polling, I/O6 for Toggle Bit status monitoring |
| CE | Chip Enable | Active-low global select; must remain asserted ≥50 ns during reads to prevent data corruption |
| OE | Output Enable | Active-low read control; combined with CE for three-state output management in shared bus architectures |
| WE | Write Enable | Active-low write strobe; initiates byte or page write; filtered against <15 ns noise transients |
| VCC / GND | Power Supply | Single 5V ±10% supply; internal VCC sense disables writes below 3.8 V to prevent partial programming |
| NC | No Connect | Pins 1 and 30 are unconnected; no internal bonding - must be left floating or tied to ground per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Data Protection | VCC sense + 5 ms power-on delay + noise-filtered WE/CE inputs prevent spurious writes during brown-out or EMI events |
| Software Data Protection | Three-byte unlock sequence (AAh/55h/A0h to 5555h/2AAAh/5555h) enables selective write-lock of entire array |
| Page Write Architecture | 128-byte internal latch frees address/data bus after initial byte load - enables concurrent host processing during 10 ms internal programming |
| End-of-Write Detection | DATA Polling (I/O7 complement) and Toggle Bit (I/O6 toggling) provide dual deterministic methods to synchronize firmware with write completion |
| MIL-STD-883 Compliance | Qualified to Class B per 5962-38267; includes temperature cycling, hermeticity, and radiation hardness assurance for space-qualified platforms |
Applications
| Avionics Flight Control | Tactical Radio Configuration |
|---|---|
|
Use Scenario: Storing real-time trim calibration tables and fault history logs in fly-by-wire actuator controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank with deterministic 200 ns read latency for servo loop initialization. Use Value: Eliminates external backup battery; 10-year data retention ensures log integrity across aircraft depot maintenance cycles. |
Use Scenario: Holding frequency-hopping encryption keys and channel mapping tables in manpack radios operating in jamming environments. IC Role / Device Role / Timing Role: Secure parameter store accessed during cold start; page write enables rapid key updates in <10 ms. Use Value: Hardware/software write protection prevents key corruption during RF-induced power glitches on vehicle-mounted units. |
| Missile Guidance System | Subsea Sensor Node |
|
Use Scenario: Retaining inertial measurement unit (IMU) bias compensation coefficients across launch thermal transients and post-impact recovery. IC Role / Device Role / Timing Role: Radiation-tolerant memory element rated for >100 krad(Si); operates continuously at +125°C during boost phase. Use Value: MIL-STD-883 Class B qualification guarantees functional stability under neutron/gamma exposure in strategic delivery systems. |
Use Scenario: Logging pressure, temperature, and salinity data in autonomous underwater vehicles (AUVs) deployed for 6-month missions. IC Role / Device Role / Timing Role: Low-power nonvolatile buffer; 300 µA standby current extends battery life while preserving data during deep-sleep intervals. Use Value: Hermetic CLCC package prevents moisture ingress at 6,000 m depth; 10,000-cycle endurance supports daily archival writes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C010-20DM/883 | Identical electrical specs but 32-lead CERDIP package (0.600" width); different thermal resistance and mounting method | Preferred for through-hole prototyping or legacy board rework where CLCC reflow is unavailable | Select when mechanical compatibility with existing DIP footprints or manual soldering is required |
| AT28C010-25EM/883 | Slower 250 ns read access; otherwise identical pinout, page write, and MIL-STD-883 Class B qualification | Suitable for cost-sensitive subsystems where 5 MHz bus timing margin permits relaxed access time | Choose when system timing budget allows 50 ns additional read latency to reduce procurement cost |
Compared with AT28C010-20EM/883, the -20DM/883 offers identical functionality in a through-hole ceramic package for legacy integration, while the -25EM/883 trades 50 ns read speed for lower unit cost - both retain full software/hardware data protection and 10,000-cycle endurance.
Availability
AT28C010-20EM/883 is available at Aetrix Electronics and suitable for avionics flight control, tactical radio configuration, missile guidance systems, and subsea sensor nodes requiring stable component supply across extended production lifecycles.
Supply support for AT28C010-20EM/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions with emphasis on reliability and long-term product support.
The AT28C010 belongs to Microchip's military-grade parallel EEPROM product line, designed specifically for high-reliability applications in aerospace, defense, and industrial systems demanding extended temperature operation and MIL-STD-883 qualification.
FAQ
What is the maximum page write size supported by the AT28C010-20EM/883?
The AT28C010-20EM/883 supports up to 128 bytes per page write operation. All bytes must reside within the same 128-byte page boundary defined by address lines A7–A16, and each successive byte must be loaded within 150 µs of the prior one. This capability is implemented via an internal 128-byte latch that decouples host bus activity from the 10 ms internal programming period.
How does hardware data protection work on the AT28C010-20EM/883?
The AT28C010-20EM/883 incorporates four hardware safeguards: (1) VCC sense circuitry inhibits writes below 3.8 V, (2) a 5 ms internal power-on delay prevents early writes during voltage ramp-up, (3) write inhibition if OE is low, CE is high, or WE is high, and (4) noise filtering rejecting pulses <15 ns on WE or CE inputs. These features are active at all times and require no firmware intervention.
Can the AT28C010-20EM/883 be used in place of standard SRAM in a memory-mapped interface?
Yes - the AT28C010-20EM/883 is accessed like Static RAM for read operations: when CE and OE are low and WE is high, valid data appears on I/O0–I/O7 within 200 ns. However, write operations require explicit WE strobing and end-of-write detection (via DATA Polling or Toggle Bit), unlike SRAM's transparent write behavior. Bus timing must accommodate tWC (10 ms) for page writes.
What is the purpose of the extra 128 bytes of EEPROM in the AT28C010-20EM/883?
The AT28C010-20EM/883 includes 128 bytes of dedicated identification memory at addresses 1FF80H–1FFFFH. Accessed by raising A9 to 12.0 V ±0.5 V, this area stores device-specific information such as calibration constants, serial numbers, or manufacturing trace codes - separate from main array writes and protected from standard erase commands.
Does the AT28C010-20EM/883 support chip erase, and how is it performed?
Yes - the AT28C010-20EM/883 supports full-chip erase via a 6-byte software command sequence. It requires applying 12.0 V ±0.5 V to A9 while issuing specific address/data patterns to designated locations. The process takes ≥10 ms and is documented in Microchip's Software Chip Erase application note. Unlike page writes, chip erase clears all 131,072 bytes simultaneously.
AT28C010-20EM/883 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-CLCC
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LCC (11.43x13.97)
AT28C010-20EM/883 FAQ
1.How can I place an order for AT28C010-20EM/883 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C010-20EM/883 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C010-20EM/883 reliable?
The price and inventory of AT28C010-20EM/883 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C010-20EM/883 is usually 5 days.
3.What payment methods are accepted for AT28C010-20EM/883?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C010-20EM/883 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C010-20EM/883?
AT28C010-20EM/883 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C010-20EM/883 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C010-20EM/883?
For technical support, including AT28C010-20EM/883 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C010-20EM/883 requirements.
6.How does Aetrix verify that AT28C010-20EM/883 is sourced from the original manufacturer or authorized distributors?
All AT28C010-20EM/883 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C010-20EM/883 meets industry standards.
7.What is the process for return or replacement of AT28C010-20EM/883?
All AT28C010-20EM/883 units undergo pre-shipment inspection (PSI). If there is an issue with AT28C010-20EM/883, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C010-20EM/883 part is unused and in its original packaging.
Return procedure for AT28C010-20EM/883:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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